tny_a9260.h 4.7 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian.pop@leadtechdesign.com>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * Copyright (C) 2009
  7. * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
  8. *
  9. * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. #ifndef __CONFIG_H
  30. #define __CONFIG_H
  31. #if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9260_EEPROM)
  32. #define CONFIG_TNY_A9260
  33. #elif defined(CONFIG_TNY_A9G20_NANDFLASH) || defined(CONFIG_TNY_A9G20_EEPROM)
  34. #define CONFIG_TNY_A9G20
  35. #endif
  36. #ifdef CONFIG_TNY_A9260
  37. #define CONFIG_AT91SAM9260
  38. #else
  39. #define CONFIG_AT91SAM9G20
  40. #endif
  41. #if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
  42. #define CONFIG_ENV_IS_IN_NAND
  43. #else
  44. #define CONFIG_ENV_IS_IN_EEPROM
  45. #endif
  46. /* ARM asynchronous clock */
  47. #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
  48. #define CONFIG_SYS_HZ 1000
  49. #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
  50. #define CONFIG_ARCH_CPU_INIT
  51. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  52. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  53. #define CONFIG_SETUP_MEMORY_TAGS 1
  54. #define CONFIG_INITRD_TAG 1
  55. #define CONFIG_SKIP_LOWLEVEL_INIT
  56. #define CONFIG_SKIP_RELOCATE_UBOOT
  57. /*
  58. * Hardware drivers
  59. */
  60. #define CONFIG_ATMEL_USART 1
  61. #undef CONFIG_USART0
  62. #undef CONFIG_USART1
  63. #undef CONFIG_USART2
  64. #define CONFIG_USART3 1 /* USART 3 is DBGU */
  65. #define CONFIG_BOOTDELAY 3
  66. /*
  67. * Command line configuration.
  68. */
  69. #include <config_cmd_default.h>
  70. #undef CONFIG_CMD_BDI
  71. #undef CONFIG_CMD_FPGA
  72. #undef CONFIG_CMD_IMI
  73. #undef CONFIG_CMD_IMLS
  74. #undef CONFIG_CMD_LOADS
  75. #undef CONFIG_CMD_NET
  76. #undef CONFIG_CMD_SOURCE
  77. #undef CONFIG_CMD_USB
  78. /* SDRAM */
  79. #define CONFIG_NR_DRAM_BANKS 1
  80. #define PHYS_SDRAM 0x20000000
  81. #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
  82. /* SPI EEPROM */
  83. #define CONFIG_SPI
  84. #define CONFIG_CMD_SPI
  85. #define CONFIG_ATMEL_SPI
  86. #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
  87. #define CONFIG_CMD_EEPROM
  88. #define CONFIG_SPI_M95XXX
  89. #define CONFIG_SYS_EEPROM_SIZE 0x10000
  90. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
  91. /* NAND flash */
  92. #define CONFIG_CMD_NAND
  93. #define CONFIG_NAND_ATMEL
  94. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  95. #define CONFIG_SYS_NAND_BASE 0x40000000
  96. #define CONFIG_SYS_NAND_DBW_8 1
  97. /* our ALE is AD21 */
  98. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  99. /* our CLE is AD22 */
  100. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  101. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  102. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
  103. /* NOR flash - no real flash on this board */
  104. #define CONFIG_SYS_NO_FLASH 1
  105. #define CONFIG_DOS_PARTITION 1
  106. #define CONFIG_CMD_FAT 1
  107. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  108. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  109. #define CONFIG_SYS_MEMTEST_END 0x23e00000
  110. /* Env in EEPROM, bootstrap + u-boot in NAND*/
  111. #ifdef CONFIG_ENV_IS_IN_EEPROM
  112. #define CONFIG_ENV_OFFSET 0x20
  113. #define CONFIG_ENV_SIZE 0x1000
  114. #endif
  115. /* Env, bootstrap and u-boot in NAND */
  116. #ifdef CONFIG_ENV_IS_IN_NAND
  117. #define CONFIG_ENV_OFFSET 0x60000
  118. #define CONFIG_ENV_OFFSET_REDUND 0x80000
  119. #define CONFIG_ENV_SIZE 0x20000
  120. #endif
  121. #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
  122. #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
  123. "root=/dev/mtdblock1 " \
  124. "mtdparts=atmel_nand:16M(kernel)ro," \
  125. "120M(rootfs),-(other) " \
  126. "rw rootfstype=jffs2"
  127. #define CONFIG_BAUDRATE 115200
  128. #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
  129. #define CONFIG_SYS_PROMPT "U-Boot> "
  130. #define CONFIG_SYS_CBSIZE 256
  131. #define CONFIG_SYS_MAXARGS 16
  132. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  133. #define CONFIG_SYS_LONGHELP 1
  134. #define CONFIG_CMDLINE_EDITING 1
  135. /*
  136. * Size of malloc() pool
  137. */
  138. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
  139. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
  140. #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
  141. #ifdef CONFIG_USE_IRQ
  142. #error CONFIG_USE_IRQ not supported
  143. #endif
  144. #endif