smdk6400.h 9.7 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. * Gary Jennejohn <garyj@denx.de>
  6. * David Mueller <d.mueller@elsoft.ch>
  7. *
  8. * (C) Copyright 2008
  9. * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  10. *
  11. * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
  12. *
  13. * See file CREDITS for list of people who contributed to this
  14. * project.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2 of
  19. * the License, or (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. */
  31. #ifndef __CONFIG_H
  32. #define __CONFIG_H
  33. /*
  34. * High Level Configuration Options
  35. * (easy to change)
  36. */
  37. #define CONFIG_S3C6400 1 /* in a SAMSUNG S3C6400 SoC */
  38. #define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
  39. #define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
  40. #define CONFIG_SYS_SDRAM_BASE 0x50000000
  41. /* input clock of PLL: SMDK6400 has 12MHz input clock */
  42. #define CONFIG_SYS_CLK_FREQ 12000000
  43. #if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
  44. #define CONFIG_ENABLE_MMU
  45. #endif
  46. #define CONFIG_SETUP_MEMORY_TAGS
  47. #define CONFIG_CMDLINE_TAG
  48. #define CONFIG_INITRD_TAG
  49. /*
  50. * Architecture magic and machine type
  51. */
  52. #define MACH_TYPE 1270
  53. #define CONFIG_DISPLAY_CPUINFO
  54. #define CONFIG_DISPLAY_BOARDINFO
  55. #undef CONFIG_SKIP_RELOCATE_UBOOT
  56. /*
  57. * Size of malloc() pool
  58. */
  59. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  60. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
  61. /*
  62. * Hardware drivers
  63. */
  64. #define CONFIG_NET_MULTI
  65. #define CONFIG_CS8900 /* we have a CS8900 on-board */
  66. #define CONFIG_CS8900_BASE 0x18800300
  67. #define CONFIG_CS8900_BUS16 /* follow the Linux driver */
  68. /*
  69. * select serial console configuration
  70. */
  71. #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */
  72. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  73. #ifdef CONFIG_SYS_HUSH_PARSER
  74. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  75. #endif
  76. #define CONFIG_CMDLINE_EDITING
  77. /* allow to overwrite serial and ethaddr */
  78. #define CONFIG_ENV_OVERWRITE
  79. #define CONFIG_BAUDRATE 115200
  80. /***********************************************************
  81. * Command definition
  82. ***********************************************************/
  83. #include <config_cmd_default.h>
  84. #define CONFIG_CMD_CACHE
  85. #define CONFIG_CMD_REGINFO
  86. #define CONFIG_CMD_LOADS
  87. #define CONFIG_CMD_LOADB
  88. #define CONFIG_CMD_SAVEENV
  89. #define CONFIG_CMD_NAND
  90. #if defined(CONFIG_BOOT_ONENAND)
  91. #define CONFIG_CMD_ONENAND
  92. #endif
  93. #define CONFIG_CMD_PING
  94. #define CONFIG_CMD_ELF
  95. #define CONFIG_CMD_FAT
  96. #define CONFIG_CMD_EXT2
  97. #define CONFIG_BOOTDELAY 3
  98. #define CONFIG_ZERO_BOOTDELAY_CHECK
  99. #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
  100. #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
  101. #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
  102. #endif
  103. /*
  104. * Miscellaneous configurable options
  105. */
  106. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  107. #define CONFIG_SYS_PROMPT "SMDK6400 # " /* Monitor Command Prompt */
  108. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  109. #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
  110. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  111. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  112. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
  113. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
  114. #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
  115. #define CONFIG_SYS_HZ 1000
  116. /* valid baudrates */
  117. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  118. /*-----------------------------------------------------------------------
  119. * Stack sizes
  120. *
  121. * The stack sizes are set up in start.S using the settings below
  122. */
  123. #define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */
  124. /**********************************
  125. Support Clock Settings
  126. **********************************
  127. Setting SYNC ASYNC
  128. ----------------------------------
  129. 667_133_66 X O
  130. 533_133_66 O O
  131. 400_133_66 X O
  132. 400_100_50 O O
  133. **********************************/
  134. /*#define CONFIG_CLK_667_133_66*/
  135. #define CONFIG_CLK_533_133_66
  136. /*
  137. #define CONFIG_CLK_400_100_50
  138. #define CONFIG_CLK_400_133_66
  139. #define CONFIG_SYNC_MODE
  140. */
  141. /* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
  142. #define CONFIG_NR_DRAM_BANKS 1
  143. #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
  144. #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
  145. #define CONFIG_SYS_FLASH_BASE 0x10000000
  146. #define CONFIG_SYS_MONITOR_BASE 0x00000000
  147. /*-----------------------------------------------------------------------
  148. * FLASH and environment organization
  149. */
  150. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  151. /* AM29LV160B has 35 sectors, AM29LV800B - 19 */
  152. #define CONFIG_SYS_MAX_FLASH_SECT 40
  153. #define CONFIG_AMD_LV800
  154. #define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */
  155. /* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
  156. #define CONFIG_FLASH_CFI_DRIVER 1
  157. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  158. #define CONFIG_FLASH_CFI_LEGACY
  159. #define CONFIG_SYS_FLASH_LEGACY_512Kx16
  160. /* timeout values are in ticks */
  161. #define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  162. #define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
  163. #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
  164. /*
  165. * SMDK6400 board specific data
  166. */
  167. #define CONFIG_IDENT_STRING " for SMDK6400"
  168. /* base address for uboot */
  169. #define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
  170. /* total memory available to uboot */
  171. #define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
  172. /* Put environment copies after the end of U-Boot owned RAM */
  173. #define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
  174. #ifdef CONFIG_ENABLE_MMU
  175. #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
  176. #define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \
  177. "bootm 0xc0018000"
  178. #else
  179. #define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
  180. #define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \
  181. "bootm 0x50018000"
  182. #endif
  183. /* NAND U-Boot load and start address */
  184. #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
  185. #define CONFIG_ENV_OFFSET 0x0040000
  186. /* NAND configuration */
  187. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  188. #define CONFIG_SYS_NAND_BASE 0x70200010
  189. #define CONFIG_SYS_S3C_NAND_HWECC
  190. #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
  191. #define CONFIG_SYS_NAND_WP 1
  192. #define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */
  193. #define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */
  194. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */
  195. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */
  196. #define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */
  197. #define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */
  198. /* NAND chip page size */
  199. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  200. /* NAND chip block size */
  201. #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
  202. /* NAND chip page per block count */
  203. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  204. /* Location of the bad-block label */
  205. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
  206. /* Extra address cycle for > 128MiB */
  207. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  208. /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
  209. #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
  210. /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
  211. #define CONFIG_SYS_NAND_ECCBYTES 4
  212. /* Number of ECC-blocks per NAND page */
  213. #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
  214. /* Size of a single OOB region */
  215. #define CONFIG_SYS_NAND_OOBSIZE 64
  216. /* Number of ECC bytes per page */
  217. #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
  218. /* ECC byte positions */
  219. #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
  220. 48, 49, 50, 51, 52, 53, 54, 55, \
  221. 56, 57, 58, 59, 60, 61, 62, 63}
  222. /* Boot configuration (define only one of next 3) */
  223. #define CONFIG_BOOT_NAND
  224. /* None of these are currently implemented. Left from the original Samsung
  225. * version for reference
  226. #define CONFIG_BOOT_NOR
  227. #define CONFIG_BOOT_MOVINAND
  228. #define CONFIG_BOOT_ONENAND
  229. */
  230. #define CONFIG_NAND
  231. #define CONFIG_NAND_S3C64XX
  232. /* Unimplemented or unsupported. See comment above.
  233. #define CONFIG_ONENAND
  234. #define CONFIG_MOVINAND
  235. */
  236. /* Settings as above boot configuration */
  237. #define CONFIG_ENV_IS_IN_NAND
  238. #define CONFIG_BOOTARGS "console=ttySAC,115200"
  239. #if !defined(CONFIG_ENABLE_MMU)
  240. #define CONFIG_CMD_USB 1
  241. #define CONFIG_USB_S3C64XX
  242. #define CONFIG_USB_OHCI_NEW 1
  243. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
  244. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
  245. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
  246. #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
  247. #define CONFIG_USB_STORAGE 1
  248. #endif
  249. #define CONFIG_DOS_PARTITION 1
  250. #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
  251. # error "usb_ohci.c is currently broken with MMU enabled."
  252. #endif
  253. #endif /* __CONFIG_H */