omap3_pandora.h 9.0 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Grazvydas Ignotas <notasas@gmail.com>
  4. *
  5. * Configuration settings for the OMAP3 Pandora.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __CONFIG_H
  23. #define __CONFIG_H
  24. /*
  25. * High Level Configuration Options
  26. */
  27. #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
  28. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  29. #define CONFIG_OMAP34XX 1 /* which is a 34XX */
  30. #define CONFIG_OMAP3430 1 /* which is in a 3430 */
  31. #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
  32. #include <asm/arch/cpu.h> /* get chip and board defs */
  33. #include <asm/arch/omap3.h>
  34. /*
  35. * Display CPU and Board information
  36. */
  37. #define CONFIG_DISPLAY_CPUINFO 1
  38. #define CONFIG_DISPLAY_BOARDINFO 1
  39. /* Clock Defines */
  40. #define V_OSCK 26000000 /* Clock output from T2 */
  41. #define V_SCLK (V_OSCK >> 1)
  42. #undef CONFIG_USE_IRQ /* no support for IRQs */
  43. #define CONFIG_MISC_INIT_R
  44. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  45. #define CONFIG_SETUP_MEMORY_TAGS 1
  46. #define CONFIG_INITRD_TAG 1
  47. #define CONFIG_REVISION_TAG 1
  48. /*
  49. * Size of malloc() pool
  50. */
  51. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
  52. /* Sector */
  53. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  54. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
  55. /* initial data */
  56. /*
  57. * Hardware drivers
  58. */
  59. /*
  60. * NS16550 Configuration
  61. */
  62. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  63. #define CONFIG_SYS_NS16550
  64. #define CONFIG_SYS_NS16550_SERIAL
  65. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  66. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  67. /*
  68. * select serial console configuration
  69. */
  70. #define CONFIG_CONS_INDEX 3
  71. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  72. #define CONFIG_SERIAL3 3
  73. /* allow to overwrite serial and ethaddr */
  74. #define CONFIG_ENV_OVERWRITE
  75. #define CONFIG_BAUDRATE 115200
  76. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
  77. 115200}
  78. #define CONFIG_MMC 1
  79. #define CONFIG_OMAP3_MMC 1
  80. #define CONFIG_DOS_PARTITION 1
  81. /* DDR - I use Micron DDR */
  82. #define CONFIG_OMAP3_MICRON_DDR 1
  83. /* commands to include */
  84. #include <config_cmd_default.h>
  85. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  86. #define CONFIG_CMD_FAT /* FAT support */
  87. #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
  88. #define CONFIG_CMD_I2C /* I2C serial bus support */
  89. #define CONFIG_CMD_MMC /* MMC support */
  90. #define CONFIG_CMD_NAND /* NAND support */
  91. #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
  92. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  93. #undef CONFIG_CMD_IMI /* iminfo */
  94. #undef CONFIG_CMD_IMLS /* List all found images */
  95. #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
  96. #undef CONFIG_CMD_NFS /* NFS support */
  97. #define CONFIG_SYS_NO_FLASH
  98. #define CONFIG_HARD_I2C 1
  99. #define CONFIG_SYS_I2C_SPEED 100000
  100. #define CONFIG_SYS_I2C_SLAVE 1
  101. #define CONFIG_SYS_I2C_BUS 0
  102. #define CONFIG_SYS_I2C_BUS_SELECT 1
  103. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  104. /*
  105. * TWL4030
  106. */
  107. #define CONFIG_TWL4030_POWER 1
  108. #define CONFIG_TWL4030_LED 1
  109. /*
  110. * Board NAND Info.
  111. */
  112. #define CONFIG_NAND_OMAP_GPMC
  113. #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
  114. /* to access nand */
  115. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  116. /* to access nand */
  117. /* at CS0 */
  118. #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
  119. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
  120. /* devices */
  121. #define CONFIG_JFFS2_NAND
  122. /* nand device jffs2 lives on */
  123. #define CONFIG_JFFS2_DEV "nand0"
  124. /* start of jffs2 partition */
  125. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  126. #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
  127. /* partition */
  128. /* Environment information */
  129. #define CONFIG_BOOTDELAY 1
  130. #define CONFIG_EXTRA_ENV_SETTINGS \
  131. "loadaddr=0x82000000\0" \
  132. "console=ttyS0,115200n8\0" \
  133. "videospec=omapfb:vram:2M,vram:4M\0" \
  134. "mmcargs=setenv bootargs console=${console} " \
  135. "video=${videospec} " \
  136. "root=/dev/mmcblk0p2 rw " \
  137. "rootfstype=ext3 rootwait\0" \
  138. "nandargs=setenv bootargs console=${console} " \
  139. "video=${videospec} " \
  140. "root=/dev/mtdblock4 rw " \
  141. "rootfstype=jffs2\0" \
  142. "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
  143. "bootscript=echo Running bootscript from mmc ...; " \
  144. "source ${loadaddr}\0" \
  145. "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
  146. "mmcboot=echo Booting from mmc ...; " \
  147. "run mmcargs; " \
  148. "bootm ${loadaddr}\0" \
  149. "nandboot=echo Booting from nand ...; " \
  150. "run nandargs; " \
  151. "nand read ${loadaddr} 280000 400000; " \
  152. "bootm ${loadaddr}\0" \
  153. #define CONFIG_BOOTCOMMAND \
  154. "if mmc init; then " \
  155. "if run loadbootscript; then " \
  156. "run bootscript; " \
  157. "else " \
  158. "if run loaduimage; then " \
  159. "run mmcboot; " \
  160. "else run nandboot; " \
  161. "fi; " \
  162. "fi; " \
  163. "else run nandboot; fi"
  164. #define CONFIG_AUTO_COMPLETE 1
  165. /*
  166. * Miscellaneous configurable options
  167. */
  168. #define V_PROMPT "Pandora # "
  169. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  170. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  171. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  172. #define CONFIG_SYS_PROMPT V_PROMPT
  173. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  174. /* Print Buffer Size */
  175. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  176. sizeof(CONFIG_SYS_PROMPT) + 16)
  177. #define CONFIG_SYS_MAXARGS 16 /* max number of command */
  178. /* args */
  179. /* Boot Argument Buffer Size */
  180. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  181. /* memtest works on */
  182. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
  183. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  184. 0x01F00000) /* 31MB */
  185. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
  186. /* address */
  187. /*
  188. * OMAP3 has 12 GP timers, they can be driven by the system clock
  189. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  190. * This rate is divided by a local divisor.
  191. */
  192. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  193. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  194. #define CONFIG_SYS_HZ 1000
  195. /*-----------------------------------------------------------------------
  196. * Stack sizes
  197. *
  198. * The stack sizes are set up in start.S using the settings below
  199. */
  200. #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
  201. #ifdef CONFIG_USE_IRQ
  202. #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
  203. #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
  204. #endif
  205. /*-----------------------------------------------------------------------
  206. * Physical Memory Map
  207. */
  208. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  209. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  210. #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
  211. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  212. /* SDRAM Bank Allocation method */
  213. #define SDRC_R_B_C 1
  214. /*-----------------------------------------------------------------------
  215. * FLASH and environment organization
  216. */
  217. /* **** PISMO SUPPORT *** */
  218. /* Configure the PISMO */
  219. #define PISMO1_NAND_SIZE GPMC_SIZE_128M
  220. #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
  221. #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
  222. /* one chip */
  223. #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
  224. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  225. #define CONFIG_SYS_FLASH_BASE boot_flash_base
  226. /* Monitor at start of flash */
  227. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  228. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  229. #define CONFIG_ENV_IS_IN_NAND 1
  230. #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
  231. #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
  232. #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
  233. #define CONFIG_ENV_OFFSET boot_flash_off
  234. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  235. /*-----------------------------------------------------------------------
  236. * CFI FLASH driver setup
  237. */
  238. /* timeout values are in ticks */
  239. #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
  240. #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
  241. /* Flash banks JFFS2 should use */
  242. #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
  243. CONFIG_SYS_MAX_NAND_DEVICE)
  244. #define CONFIG_SYS_JFFS2_MEM_NAND
  245. /* use flash_info[2] */
  246. #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
  247. #define CONFIG_SYS_JFFS2_NUM_BANKS 1
  248. #ifndef __ASSEMBLY__
  249. extern struct gpmc *gpmc_cfg;
  250. extern unsigned int boot_flash_base;
  251. extern volatile unsigned int boot_flash_env_addr;
  252. extern unsigned int boot_flash_off;
  253. extern unsigned int boot_flash_sec;
  254. extern unsigned int boot_flash_type;
  255. #endif
  256. #endif /* __CONFIG_H */