meesc.h 5.0 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian.pop@leadtechdesign.com>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2009
  7. * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
  8. * esd electronic system design gmbh <www.esd.eu>
  9. *
  10. * Configuation settings for the esd MEESC board.
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #ifndef __CONFIG_H
  31. #define __CONFIG_H
  32. /* Common stuff */
  33. #define CONFIG_SYS_HZ 1000 /* decrementer freq */
  34. #define CONFIG_MEESC 1 /* Board is esd MEESC */
  35. #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
  36. #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
  37. #define CONFIG_DISPLAY_BOARDINFO 1
  38. #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
  39. #define CONFIG_PREBOOT /* enable preboot variable */
  40. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  41. #define CONFIG_SETUP_MEMORY_TAGS 1
  42. #define CONFIG_INITRD_TAG 1
  43. #define CONFIG_SERIAL_TAG 1
  44. #define CONFIG_REVISION_TAG 1
  45. #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
  46. #define CONFIG_SKIP_LOWLEVEL_INIT
  47. #define CONFIG_SKIP_RELOCATE_UBOOT
  48. #define CONFIG_ARCH_CPU_INIT
  49. /*
  50. * Hardware drivers
  51. */
  52. /* Console output */
  53. #define CONFIG_ATMEL_USART 1
  54. #undef CONFIG_USART0
  55. #undef CONFIG_USART1
  56. #undef CONFIG_USART2
  57. #define CONFIG_USART3 1 /* USART 3 is DBGU */
  58. #define CONFIG_BOOTDELAY 3
  59. #define CONFIG_ZERO_BOOTDELAY_CHECK 1
  60. /*
  61. * BOOTP options
  62. */
  63. #define CONFIG_BOOTP_BOOTFILESIZE 1
  64. #define CONFIG_BOOTP_BOOTPATH 1
  65. #define CONFIG_BOOTP_GATEWAY 1
  66. #define CONFIG_BOOTP_HOSTNAME 1
  67. /*
  68. * Command line configuration.
  69. */
  70. #include <config_cmd_default.h>
  71. #undef CONFIG_CMD_BDI
  72. #undef CONFIG_CMD_AUTOSCRIPT
  73. #undef CONFIG_CMD_FPGA
  74. #undef CONFIG_CMD_LOADS
  75. #undef CONFIG_CMD_IMLS
  76. #undef CONFIG_CMD_USB
  77. #define CONFIG_CMD_PING 1
  78. #define CONFIG_CMD_DHCP 1
  79. #define CONFIG_CMD_NAND 1
  80. /* LED */
  81. #define CONFIG_AT91_LED 1
  82. /* SDRAM */
  83. #define CONFIG_NR_DRAM_BANKS 1
  84. #define PHYS_SDRAM 0x20000000
  85. /* DataFlash */
  86. #define CONFIG_ATMEL_DATAFLASH_SPI
  87. #define CONFIG_HAS_DATAFLASH 1
  88. #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
  89. #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
  90. #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
  91. #define AT91_SPI_CLK 15000000
  92. #define DATAFLASH_TCSS (0x1a << 16)
  93. #define DATAFLASH_TCHS (0x1 << 24)
  94. /* NOR flash is not populated, disable it */
  95. #define CONFIG_SYS_NO_FLASH 1
  96. /* NAND flash */
  97. #ifdef CONFIG_CMD_NAND
  98. #define CONFIG_NAND_ATMEL
  99. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  100. #define CONFIG_SYS_NAND_BASE 0x40000000
  101. #define CONFIG_SYS_NAND_DBW_8 1
  102. /* our ALE is AD21 */
  103. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  104. /* our CLE is AD22 */
  105. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  106. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
  107. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
  108. #endif
  109. /* Ethernet */
  110. #define CONFIG_MACB 1
  111. #define CONFIG_RMII 1
  112. #define CONFIG_NET_MULTI 1
  113. #define CONFIG_NET_RETRY_COUNT 20
  114. #undef CONFIG_RESET_PHY_R
  115. #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
  116. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  117. #define CONFIG_SYS_MEMTEST_END 0x21e00000
  118. #define CONFIG_SYS_USE_DATAFLASH 1
  119. #undef CONFIG_SYS_USE_NANDFLASH
  120. /* CAN */
  121. #define CONFIG_AT91_CAN 1
  122. /* hw-controller addresses */
  123. #define CONFIG_ET1100_BASE 0x70000000
  124. /* bootstrap + u-boot + env in dataflash on CS0 */
  125. #define CONFIG_ENV_IS_IN_DATAFLASH 1
  126. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
  127. 0x8400)
  128. #define CONFIG_ENV_OFFSET 0x4200
  129. #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
  130. CONFIG_ENV_OFFSET)
  131. #define CONFIG_ENV_SIZE 0x4200
  132. #define CONFIG_BAUDRATE 115200
  133. #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
  134. #define CONFIG_SYS_PROMPT "=> "
  135. #define CONFIG_SYS_CBSIZE 256
  136. #define CONFIG_SYS_MAXARGS 16
  137. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  138. sizeof(CONFIG_SYS_PROMPT) + 16)
  139. #define CONFIG_SYS_LONGHELP 1
  140. #define CONFIG_CMDLINE_EDITING 1
  141. /*
  142. * Size of malloc() pool
  143. */
  144. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
  145. 128*1024, 0x1000)
  146. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
  147. #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
  148. #ifdef CONFIG_USE_IRQ
  149. #error CONFIG_USE_IRQ not supported
  150. #endif
  151. #endif