mpc8xx_lcd.c 12 KB

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  1. /*
  2. * (C) Copyright 2001-2002
  3. * Wolfgang Denk, DENX Software Engineering -- wd@denx.de
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /************************************************************************/
  8. /* ** HEADER FILES */
  9. /************************************************************************/
  10. /* #define DEBUG */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <command.h>
  14. #include <watchdog.h>
  15. #include <stdarg.h>
  16. #include <lcdvideo.h>
  17. #include <linux/types.h>
  18. #include <stdio_dev.h>
  19. #if defined(CONFIG_POST)
  20. #include <post.h>
  21. #endif
  22. #include <lcd.h>
  23. #ifdef CONFIG_LCD
  24. /************************************************************************/
  25. /* ** CONFIG STUFF -- should be moved to board config file */
  26. /************************************************************************/
  27. #ifndef CONFIG_LCD_INFO
  28. #define CONFIG_LCD_INFO /* Display Logo, (C) and system info */
  29. #endif
  30. /*----------------------------------------------------------------------*/
  31. #ifdef CONFIG_KYOCERA_KCS057QV1AJ
  32. /*
  33. * Kyocera KCS057QV1AJ-G23. Passive, color, single scan.
  34. */
  35. #define LCD_BPP LCD_COLOR4
  36. vidinfo_t panel_info = {
  37. 640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  38. LCD_BPP, 1, 0, 1, 0, 5, 0, 0, 0
  39. /* wbl, vpw, lcdac, wbf */
  40. };
  41. #endif /* CONFIG_KYOCERA_KCS057QV1AJ */
  42. /*----------------------------------------------------------------------*/
  43. /*----------------------------------------------------------------------*/
  44. #ifdef CONFIG_HITACHI_SP19X001_Z1A
  45. /*
  46. * Hitachi SP19X001-. Active, color, single scan.
  47. */
  48. vidinfo_t panel_info = {
  49. 640, 480, 154, 116, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  50. LCD_COLOR8, 1, 0, 1, 0, 0, 0, 0, 0
  51. /* wbl, vpw, lcdac, wbf */
  52. };
  53. #endif /* CONFIG_HITACHI_SP19X001_Z1A */
  54. /*----------------------------------------------------------------------*/
  55. /*----------------------------------------------------------------------*/
  56. #ifdef CONFIG_NEC_NL6448AC33
  57. /*
  58. * NEC NL6448AC33-18. Active, color, single scan.
  59. */
  60. vidinfo_t panel_info = {
  61. 640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  62. 3, 0, 0, 1, 1, 144, 2, 0, 33
  63. /* wbl, vpw, lcdac, wbf */
  64. };
  65. #endif /* CONFIG_NEC_NL6448AC33 */
  66. /*----------------------------------------------------------------------*/
  67. #ifdef CONFIG_NEC_NL6448BC20
  68. /*
  69. * NEC NL6448BC20-08. 6.5", 640x480. Active, color, single scan.
  70. */
  71. vidinfo_t panel_info = {
  72. 640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  73. 3, 0, 0, 1, 1, 144, 2, 0, 33
  74. /* wbl, vpw, lcdac, wbf */
  75. };
  76. #endif /* CONFIG_NEC_NL6448BC20 */
  77. /*----------------------------------------------------------------------*/
  78. #ifdef CONFIG_NEC_NL6448BC33_54
  79. /*
  80. * NEC NL6448BC33-54. 10.4", 640x480. Active, color, single scan.
  81. */
  82. vidinfo_t panel_info = {
  83. 640, 480, 212, 158, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  84. 3, 0, 0, 1, 1, 144, 2, 0, 33
  85. /* wbl, vpw, lcdac, wbf */
  86. };
  87. #endif /* CONFIG_NEC_NL6448BC33_54 */
  88. /*----------------------------------------------------------------------*/
  89. #ifdef CONFIG_SHARP_LQ104V7DS01
  90. /*
  91. * SHARP LQ104V7DS01. 6.5", 640x480. Active, color, single scan.
  92. */
  93. vidinfo_t panel_info = {
  94. 640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_LOW,
  95. 3, 0, 0, 1, 1, 25, 1, 0, 33
  96. /* wbl, vpw, lcdac, wbf */
  97. };
  98. #endif /* CONFIG_SHARP_LQ104V7DS01 */
  99. /*----------------------------------------------------------------------*/
  100. #ifdef CONFIG_SHARP_16x9
  101. /*
  102. * Sharp 320x240. Active, color, single scan. It isn't 16x9, and I am
  103. * not sure what it is.......
  104. */
  105. vidinfo_t panel_info = {
  106. 320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  107. 3, 0, 0, 1, 1, 15, 4, 0, 3
  108. };
  109. #endif /* CONFIG_SHARP_16x9 */
  110. /*----------------------------------------------------------------------*/
  111. #ifdef CONFIG_SHARP_LQ057Q3DC02
  112. /*
  113. * Sharp LQ057Q3DC02 display. Active, color, single scan.
  114. */
  115. #undef LCD_DF
  116. #define LCD_DF 12
  117. vidinfo_t panel_info = {
  118. 320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  119. 3, 0, 0, 1, 1, 15, 4, 0, 3
  120. /* wbl, vpw, lcdac, wbf */
  121. };
  122. #define CONFIG_LCD_INFO_BELOW_LOGO
  123. #endif /* CONFIG_SHARP_LQ057Q3DC02 */
  124. /*----------------------------------------------------------------------*/
  125. #ifdef CONFIG_SHARP_LQ64D341
  126. /*
  127. * Sharp LQ64D341 display, 640x480. Active, color, single scan.
  128. */
  129. vidinfo_t panel_info = {
  130. 640, 480, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  131. 3, 0, 0, 1, 1, 128, 16, 0, 32
  132. /* wbl, vpw, lcdac, wbf */
  133. };
  134. #endif /* CONFIG_SHARP_LQ64D341 */
  135. #ifdef CONFIG_SHARP_LQ065T9DR51U
  136. /*
  137. * Sharp LQ065T9DR51U display, 400x240. Active, color, single scan.
  138. */
  139. vidinfo_t panel_info = {
  140. 400, 240, 143, 79, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  141. 3, 0, 0, 1, 1, 248, 4, 0, 35
  142. /* wbl, vpw, lcdac, wbf */
  143. };
  144. #define CONFIG_LCD_INFO_BELOW_LOGO
  145. #endif /* CONFIG_SHARP_LQ065T9DR51U */
  146. #ifdef CONFIG_SHARP_LQ084V1DG21
  147. /*
  148. * Sharp LQ084V1DG21 display, 640x480. Active, color, single scan.
  149. */
  150. vidinfo_t panel_info = {
  151. 640, 480, 171, 129, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_LOW,
  152. 3, 0, 0, 1, 1, 160, 3, 0, 48
  153. /* wbl, vpw, lcdac, wbf */
  154. };
  155. #endif /* CONFIG_SHARP_LQ084V1DG21 */
  156. /*----------------------------------------------------------------------*/
  157. #ifdef CONFIG_HLD1045
  158. /*
  159. * HLD1045 display, 640x480. Active, color, single scan.
  160. */
  161. vidinfo_t panel_info = {
  162. 640, 480, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  163. 3, 0, 0, 1, 1, 160, 3, 0, 48
  164. /* wbl, vpw, lcdac, wbf */
  165. };
  166. #endif /* CONFIG_HLD1045 */
  167. /*----------------------------------------------------------------------*/
  168. #ifdef CONFIG_PRIMEVIEW_V16C6448AC
  169. /*
  170. * Prime View V16C6448AC
  171. */
  172. vidinfo_t panel_info = {
  173. 640, 480, 130, 98, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  174. 3, 0, 0, 1, 1, 144, 2, 0, 35
  175. /* wbl, vpw, lcdac, wbf */
  176. };
  177. #endif /* CONFIG_PRIMEVIEW_V16C6448AC */
  178. /*----------------------------------------------------------------------*/
  179. #ifdef CONFIG_OPTREX_BW
  180. /*
  181. * Optrex CBL50840-2 NF-FW 99 22 M5
  182. * or
  183. * Hitachi LMG6912RPFC-00T
  184. * or
  185. * Hitachi SP14Q002
  186. *
  187. * 320x240. Black & white.
  188. */
  189. #define OPTREX_BPP 0 /* 0 - monochrome, 1 bpp */
  190. /* 1 - 4 grey levels, 2 bpp */
  191. /* 2 - 16 grey levels, 4 bpp */
  192. vidinfo_t panel_info = {
  193. 320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW,
  194. OPTREX_BPP, 0, 0, 0, 0, 0, 0, 0, 0, 4
  195. };
  196. #endif /* CONFIG_OPTREX_BW */
  197. /************************************************************************/
  198. /* ----------------- chipset specific functions ----------------------- */
  199. /************************************************************************/
  200. /*
  201. * Calculate fb size for VIDEOLFB_ATAG.
  202. */
  203. ulong calc_fbsize (void)
  204. {
  205. ulong size;
  206. int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
  207. size = line_length * panel_info.vl_row;
  208. return size;
  209. }
  210. void lcd_ctrl_init (void *lcdbase)
  211. {
  212. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  213. volatile lcd823_t *lcdp = &immr->im_lcd;
  214. uint lccrtmp;
  215. uint lchcr_hpc_tmp;
  216. /* Initialize the LCD control register according to the LCD
  217. * parameters defined. We do everything here but enable
  218. * the controller.
  219. */
  220. lccrtmp = LCDBIT (LCCR_BNUM_BIT,
  221. (((panel_info.vl_row * panel_info.vl_col) * (1 << LCD_BPP)) / 128));
  222. lccrtmp |= LCDBIT (LCCR_CLKP_BIT, panel_info.vl_clkp) |
  223. LCDBIT (LCCR_OEP_BIT, panel_info.vl_oep) |
  224. LCDBIT (LCCR_HSP_BIT, panel_info.vl_hsp) |
  225. LCDBIT (LCCR_VSP_BIT, panel_info.vl_vsp) |
  226. LCDBIT (LCCR_DP_BIT, panel_info.vl_dp) |
  227. LCDBIT (LCCR_BPIX_BIT, panel_info.vl_bpix) |
  228. LCDBIT (LCCR_LBW_BIT, panel_info.vl_lbw) |
  229. LCDBIT (LCCR_SPLT_BIT, panel_info.vl_splt) |
  230. LCDBIT (LCCR_CLOR_BIT, panel_info.vl_clor) |
  231. LCDBIT (LCCR_TFT_BIT, panel_info.vl_tft);
  232. #if 0
  233. lccrtmp |= ((SIU_LEVEL5 / 2) << 12);
  234. lccrtmp |= LCCR_EIEN;
  235. #endif
  236. lcdp->lcd_lccr = lccrtmp;
  237. lcdp->lcd_lcsr = 0xFF; /* Clear pending interrupts */
  238. /* Initialize LCD controller bus priorities.
  239. */
  240. immr->im_siu_conf.sc_sdcr &= ~0x0f; /* RAID = LAID = 0 */
  241. /* set SHFT/CLOCK division factor 4
  242. * This needs to be set based upon display type and processor
  243. * speed. The TFT displays run about 20 to 30 MHz.
  244. * I was running 64 MHz processor speed.
  245. * The value for this divider must be chosen so the result is
  246. * an integer of the processor speed (i.e., divide by 3 with
  247. * 64 MHz would be bad).
  248. */
  249. immr->im_clkrst.car_sccr &= ~0x1F;
  250. immr->im_clkrst.car_sccr |= LCD_DF; /* was 8 */
  251. /* Enable LCD on port D.
  252. */
  253. immr->im_ioport.iop_pdpar |= 0x1FFF;
  254. immr->im_ioport.iop_pddir |= 0x1FFF;
  255. /* Enable LCD_A/B/C on port B.
  256. */
  257. immr->im_cpm.cp_pbpar |= 0x00005001;
  258. immr->im_cpm.cp_pbdir |= 0x00005001;
  259. /* Load the physical address of the linear frame buffer
  260. * into the LCD controller.
  261. * BIG NOTE: This has to be modified to load A and B depending
  262. * upon the split mode of the LCD.
  263. */
  264. lcdp->lcd_lcfaa = (ulong)lcdbase;
  265. lcdp->lcd_lcfba = (ulong)lcdbase;
  266. /* MORE HACKS...This must be updated according to 823 manual
  267. * for different panels.
  268. * Udi Finkelstein - done - see below:
  269. * Note: You better not try unsupported combinations such as
  270. * 4-bit wide passive dual scan LCD at 4/8 Bit color.
  271. */
  272. lchcr_hpc_tmp =
  273. (panel_info.vl_col *
  274. (panel_info.vl_tft ? 8 :
  275. (((2 - panel_info.vl_lbw) << /* 4 bit=2, 8-bit = 1 */
  276. /* use << to mult by: single scan = 1, dual scan = 2 */
  277. panel_info.vl_splt) *
  278. (panel_info.vl_bpix | 1)))) >> 3; /* 2/4 BPP = 1, 8/16 BPP = 3 */
  279. lcdp->lcd_lchcr = LCHCR_BO |
  280. LCDBIT (LCHCR_AT_BIT, 4) |
  281. LCDBIT (LCHCR_HPC_BIT, lchcr_hpc_tmp) |
  282. panel_info.vl_wbl;
  283. lcdp->lcd_lcvcr = LCDBIT (LCVCR_VPW_BIT, panel_info.vl_vpw) |
  284. LCDBIT (LCVCR_LCD_AC_BIT, panel_info.vl_lcdac) |
  285. LCDBIT (LCVCR_VPC_BIT, panel_info.vl_row) |
  286. panel_info.vl_wbf;
  287. }
  288. /*----------------------------------------------------------------------*/
  289. #if LCD_BPP == LCD_COLOR8
  290. void
  291. lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
  292. {
  293. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  294. volatile cpm8xx_t *cp = &(immr->im_cpm);
  295. unsigned short colreg, *cmap_ptr;
  296. cmap_ptr = (unsigned short *)&cp->lcd_cmap[regno * 2];
  297. colreg = ((red & 0x0F) << 8) |
  298. ((green & 0x0F) << 4) |
  299. (blue & 0x0F) ;
  300. *cmap_ptr = colreg;
  301. debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %02X%02X\n",
  302. regno, &(cp->lcd_cmap[regno * 2]),
  303. red, green, blue,
  304. cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]);
  305. }
  306. #endif /* LCD_COLOR8 */
  307. /*----------------------------------------------------------------------*/
  308. ushort *configuration_get_cmap(void)
  309. {
  310. immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  311. cpm8xx_t *cp = &(immr->im_cpm);
  312. return (ushort *)&(cp->lcd_cmap[255 * sizeof(ushort)]);
  313. }
  314. #if defined(CONFIG_MPC823)
  315. void fb_put_byte(uchar **fb, uchar **from)
  316. {
  317. *(*fb)++ = (255 - *(*from)++);
  318. }
  319. #endif
  320. #ifdef CONFIG_LCD_LOGO
  321. #include <bmp_logo.h>
  322. void lcd_logo_set_cmap(void)
  323. {
  324. int i;
  325. ushort *cmap;
  326. immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  327. cpm8xx_t *cp = &(immr->im_cpm);
  328. cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET * sizeof(ushort)]);
  329. for (i = 0; i < BMP_LOGO_COLORS; ++i)
  330. *cmap++ = bmp_logo_palette[i];
  331. }
  332. #endif
  333. void lcd_enable (void)
  334. {
  335. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  336. volatile lcd823_t *lcdp = &immr->im_lcd;
  337. /* Enable the LCD panel */
  338. immr->im_siu_conf.sc_sdcr |= (1 << (31 - 25)); /* LAM = 1 */
  339. lcdp->lcd_lccr |= LCCR_PON;
  340. }
  341. /************************************************************************/
  342. #endif /* CONFIG_LCD */