Kconfig 55 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. imply SPL_SEPARATE_BSS
  10. config ARM64_CRC32
  11. bool "Enable support for CRC32 instruction"
  12. depends on ARM64 && CC_IS_GCC
  13. default y
  14. help
  15. ARMv8 implements dedicated crc32 instruction for crc32 calculation.
  16. This is faster than software crc32 calculation. This instruction may
  17. not be present on all ARMv8.0, but is always present on ARMv8.1 and
  18. newer.
  19. config COUNTER_FREQUENCY
  20. int "Timer clock frequency"
  21. depends on ARM64 || CPU_V7A
  22. default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
  23. default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
  24. ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
  25. default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
  26. default 100000000 if ARCH_ZYNQMP
  27. default 0
  28. help
  29. For platforms with ARMv8-A and ARMv7-A which features a system
  30. counter, those platforms needs software to program the counter
  31. frequency. Setup time clock frequency for certain platform.
  32. 0 means no need to configure the system counter frequency.
  33. For platforms needs the frequency set in U-Boot with a
  34. pre-defined value, should have the macro defined as a non-zero value.
  35. config POSITION_INDEPENDENT
  36. bool "Generate position-independent pre-relocation code"
  37. depends on ARM64 || CPU_V7A
  38. help
  39. U-Boot expects to be linked to a specific hard-coded address, and to
  40. be loaded to and run from that address. This option lifts that
  41. restriction, thus allowing the code to be loaded to and executed from
  42. almost any 4K aligned address. This logic relies on the relocation
  43. information that is embedded in the binary to support U-Boot
  44. relocating itself to the top-of-RAM later during execution.
  45. config INIT_SP_RELATIVE
  46. bool "Specify the early stack pointer relative to the .bss section"
  47. depends on ARM64
  48. default n if ARCH_QEMU
  49. default y if POSITION_INDEPENDENT
  50. help
  51. U-Boot typically uses a hard-coded value for the stack pointer
  52. before relocation. Enable this option to instead calculate the
  53. initial SP at run-time. This is useful to avoid hard-coding addresses
  54. into U-Boot, so that it can be loaded and executed at arbitrary
  55. addresses and thus avoid using arbitrary addresses at runtime.
  56. If this option is enabled, the early stack pointer is set to
  57. &_bss_start with a offset value added. The offset is specified by
  58. SYS_INIT_SP_BSS_OFFSET.
  59. config SYS_INIT_SP_BSS_OFFSET
  60. int "Early stack offset from the .bss base address"
  61. depends on ARM64
  62. depends on INIT_SP_RELATIVE
  63. default 524288
  64. help
  65. This option's value is the offset added to &_bss_start in order to
  66. calculate the stack pointer. This offset should be large enough so
  67. that the early malloc region, global data (gd), and early stack usage
  68. do not overlap any appended DTB.
  69. config SPL_SYS_NO_VECTOR_TABLE
  70. depends on SPL
  71. bool
  72. config LINUX_KERNEL_IMAGE_HEADER
  73. depends on ARM64
  74. bool
  75. help
  76. Place a Linux kernel image header at the start of the U-Boot binary.
  77. The format of the header is described in the Linux kernel source at
  78. Documentation/arm64/booting.txt. This feature is useful since the
  79. image header reports the amount of memory (BSS and similar) that
  80. U-Boot needs to use, but which isn't part of the binary.
  81. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  82. depends on LINUX_KERNEL_IMAGE_HEADER
  83. hex
  84. help
  85. The value subtracted from CONFIG_TEXT_BASE to calculate the
  86. TEXT_OFFSET value written to the Linux kernel image header.
  87. config GICV2
  88. bool
  89. config GICV3
  90. bool
  91. config GIC_V3_ITS
  92. bool "ARM GICV3 ITS"
  93. select IRQ
  94. help
  95. ARM GICV3 Interrupt translation service (ITS).
  96. Basic support for programming locality specific peripheral
  97. interrupts (LPI) configuration tables and enable LPI tables.
  98. LPI configuration table can be used by u-boot or Linux.
  99. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  100. configuration table can not be re-programmed, unless GICV3 reset.
  101. config STATIC_RELA
  102. bool
  103. default y if ARM64
  104. config DMA_ADDR_T_64BIT
  105. bool
  106. default y if ARM64
  107. config HAS_VBAR
  108. bool
  109. config HAS_THUMB2
  110. bool
  111. config GPIO_EXTRA_HEADER
  112. bool
  113. # Used for compatibility with asm files copied from the kernel
  114. config ARM_ASM_UNIFIED
  115. bool
  116. default y
  117. # Used for compatibility with asm files copied from the kernel
  118. config THUMB2_KERNEL
  119. bool
  120. config SYS_ICACHE_OFF
  121. bool "Do not enable icache"
  122. help
  123. Do not enable instruction cache in U-Boot.
  124. config SPL_SYS_ICACHE_OFF
  125. bool "Do not enable icache in SPL"
  126. depends on SPL
  127. default SYS_ICACHE_OFF
  128. help
  129. Do not enable instruction cache in SPL.
  130. config SYS_DCACHE_OFF
  131. bool "Do not enable dcache"
  132. help
  133. Do not enable data cache in U-Boot.
  134. config SPL_SYS_DCACHE_OFF
  135. bool "Do not enable dcache in SPL"
  136. depends on SPL
  137. default SYS_DCACHE_OFF
  138. help
  139. Do not enable data cache in SPL.
  140. config SYS_ARM_CACHE_CP15
  141. bool "CP15 based cache enabling support"
  142. help
  143. Select this if your processor suports enabling caches by using
  144. CP15 registers.
  145. config SYS_ARM_MMU
  146. bool "MMU-based Paged Memory Management Support"
  147. select SYS_ARM_CACHE_CP15
  148. help
  149. Select if you want MMU-based virtualised addressing space
  150. support via paged memory management.
  151. config SYS_ARM_MPU
  152. bool 'Use the ARM v7 PMSA Compliant MPU'
  153. help
  154. Some ARM systems without an MMU have instead a Memory Protection
  155. Unit (MPU) that defines the type and permissions for regions of
  156. memory.
  157. If your CPU has an MPU then you should choose 'y' here unless you
  158. know that you do not want to use the MPU.
  159. # If set, the workarounds for these ARM errata are applied early during U-Boot
  160. # startup. Note that in general these options force the workarounds to be
  161. # applied; no CPU-type/version detection exists, unlike the similar options in
  162. # the Linux kernel. Do not set these options unless they apply! Also note that
  163. # the following can be machine-specific errata. These do have ability to
  164. # provide rudimentary version and machine-specific checks, but expect no
  165. # product checks:
  166. # CONFIG_ARM_ERRATA_430973
  167. # CONFIG_ARM_ERRATA_454179
  168. # CONFIG_ARM_ERRATA_621766
  169. # CONFIG_ARM_ERRATA_798870
  170. # CONFIG_ARM_ERRATA_801819
  171. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  172. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  173. config ARM_ERRATA_430973
  174. bool
  175. config ARM_ERRATA_454179
  176. bool
  177. config ARM_ERRATA_621766
  178. bool
  179. config ARM_ERRATA_716044
  180. bool
  181. config ARM_ERRATA_725233
  182. bool
  183. config ARM_ERRATA_742230
  184. bool
  185. config ARM_ERRATA_743622
  186. bool
  187. config ARM_ERRATA_751472
  188. bool
  189. config ARM_ERRATA_761320
  190. bool
  191. config ARM_ERRATA_773022
  192. bool
  193. config ARM_ERRATA_774769
  194. bool
  195. config ARM_ERRATA_794072
  196. bool
  197. config ARM_ERRATA_798870
  198. bool
  199. config ARM_ERRATA_801819
  200. bool
  201. config ARM_ERRATA_826974
  202. bool
  203. config ARM_ERRATA_828024
  204. bool
  205. config ARM_ERRATA_829520
  206. bool
  207. config ARM_ERRATA_833069
  208. bool
  209. config ARM_ERRATA_833471
  210. bool
  211. config ARM_ERRATA_845369
  212. bool
  213. config ARM_ERRATA_852421
  214. bool
  215. config ARM_ERRATA_852423
  216. bool
  217. config ARM_ERRATA_855873
  218. bool
  219. config ARM_CORTEX_A8_CVE_2017_5715
  220. bool
  221. config ARM_CORTEX_A15_CVE_2017_5715
  222. bool
  223. config CPU_ARM720T
  224. bool
  225. select SYS_CACHE_SHIFT_5
  226. imply SYS_ARM_MMU
  227. config CPU_ARM920T
  228. bool
  229. select SYS_CACHE_SHIFT_5
  230. imply SYS_ARM_MMU
  231. config CPU_ARM926EJS
  232. bool
  233. select SYS_CACHE_SHIFT_5
  234. imply SYS_ARM_MMU
  235. imply SPL_SEPARATE_BSS
  236. config CPU_ARM946ES
  237. bool
  238. select SYS_CACHE_SHIFT_5
  239. imply SYS_ARM_MMU
  240. config CPU_ARM1136
  241. bool
  242. select SYS_CACHE_SHIFT_5
  243. imply SYS_ARM_MMU
  244. imply SPL_SEPARATE_BSS
  245. config CPU_ARM1176
  246. bool
  247. select HAS_VBAR
  248. select SYS_CACHE_SHIFT_5
  249. imply SYS_ARM_MMU
  250. config CPU_V7A
  251. bool
  252. select HAS_THUMB2
  253. select HAS_VBAR
  254. select SYS_CACHE_SHIFT_6
  255. imply SYS_ARM_MMU
  256. config CPU_V7M
  257. bool
  258. select HAS_THUMB2
  259. select SYS_ARM_MPU
  260. select SYS_CACHE_SHIFT_5
  261. select SYS_THUMB_BUILD
  262. select THUMB2_KERNEL
  263. config CPU_V7R
  264. bool
  265. select HAS_THUMB2
  266. select SYS_ARM_CACHE_CP15
  267. select SYS_ARM_MPU
  268. select SYS_CACHE_SHIFT_6
  269. config SYS_CPU
  270. default "arm720t" if CPU_ARM720T
  271. default "arm920t" if CPU_ARM920T
  272. default "arm926ejs" if CPU_ARM926EJS
  273. default "arm946es" if CPU_ARM946ES
  274. default "arm1136" if CPU_ARM1136
  275. default "arm1176" if CPU_ARM1176
  276. default "armv7" if CPU_V7A
  277. default "armv7" if CPU_V7R
  278. default "armv7m" if CPU_V7M
  279. default "armv8" if ARM64
  280. config SYS_ARM_ARCH
  281. int
  282. default 4 if CPU_ARM720T
  283. default 4 if CPU_ARM920T
  284. default 5 if CPU_ARM926EJS
  285. default 5 if CPU_ARM946ES
  286. default 6 if CPU_ARM1136
  287. default 6 if CPU_ARM1176
  288. default 7 if CPU_V7A
  289. default 7 if CPU_V7M
  290. default 7 if CPU_V7R
  291. default 8 if ARM64
  292. choice
  293. prompt "Select the ARM data write cache policy"
  294. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
  295. default SYS_ARM_CACHE_WRITEBACK
  296. config SYS_ARM_CACHE_WRITEBACK
  297. bool "Write-back (WB)"
  298. help
  299. A write updates the cache only and marks the cache line as dirty.
  300. External memory is updated only when the line is evicted or explicitly
  301. cleaned.
  302. config SYS_ARM_CACHE_WRITETHROUGH
  303. bool "Write-through (WT)"
  304. help
  305. A write updates both the cache and the external memory system.
  306. This does not mark the cache line as dirty.
  307. config SYS_ARM_CACHE_WRITEALLOC
  308. bool "Write allocation (WA)"
  309. help
  310. A cache line is allocated on a write miss. This means that executing a
  311. store instruction on the processor might cause a burst read to occur.
  312. There is a linefill to obtain the data for the cache line, before the
  313. write is performed.
  314. endchoice
  315. config ARCH_VERY_EARLY_INIT
  316. bool
  317. config SPL_ARCH_VERY_EARLY_INIT
  318. bool
  319. config ARCH_CPU_INIT
  320. bool "Enable ARCH_CPU_INIT"
  321. help
  322. Some architectures require a call to arch_cpu_init().
  323. Say Y here to enable it
  324. config SYS_ARCH_TIMER
  325. bool "ARM Generic Timer support"
  326. depends on CPU_V7A || ARM64
  327. default y if ARM64
  328. help
  329. The ARM Generic Timer (aka arch-timer) provides an architected
  330. interface to a timer source on an SoC.
  331. It is mandatory for ARMv8 implementation and widely available
  332. on ARMv7 systems.
  333. config ARM_SMCCC
  334. bool "Support for ARM SMC Calling Convention (SMCCC)"
  335. depends on CPU_V7A || ARM64
  336. select ARM_PSCI_FW
  337. help
  338. Say Y here if you want to enable ARM SMC Calling Convention.
  339. This should be enabled if U-Boot needs to communicate with system
  340. firmware (for example, PSCI) according to SMCCC.
  341. config SYS_THUMB_BUILD
  342. bool "Build U-Boot using the Thumb instruction set"
  343. depends on !ARM64
  344. help
  345. Use this flag to build U-Boot using the Thumb instruction set for
  346. ARM architectures. Thumb instruction set provides better code
  347. density. For ARM architectures that support Thumb2 this flag will
  348. result in Thumb2 code generated by GCC.
  349. config SPL_SYS_THUMB_BUILD
  350. bool "Build SPL using the Thumb instruction set"
  351. default y if SYS_THUMB_BUILD
  352. depends on !ARM64 && SPL
  353. help
  354. Use this flag to build SPL using the Thumb instruction set for
  355. ARM architectures. Thumb instruction set provides better code
  356. density. For ARM architectures that support Thumb2 this flag will
  357. result in Thumb2 code generated by GCC.
  358. config TPL_SYS_THUMB_BUILD
  359. bool "Build TPL using the Thumb instruction set"
  360. default y if SYS_THUMB_BUILD
  361. depends on TPL && !ARM64
  362. help
  363. Use this flag to build TPL using the Thumb instruction set for
  364. ARM architectures. Thumb instruction set provides better code
  365. density. For ARM architectures that support Thumb2 this flag will
  366. result in Thumb2 code generated by GCC.
  367. config SYS_L2_PL310
  368. bool "ARM PL310 L2 cache controller"
  369. help
  370. Enable support for ARM PL310 L2 cache controller in U-Boot
  371. config SPL_SYS_L2_PL310
  372. bool "ARM PL310 L2 cache controller in SPL"
  373. help
  374. Enable support for ARM PL310 L2 cache controller in SPL
  375. config SYS_L2CACHE_OFF
  376. bool "L2cache off"
  377. help
  378. If SoC does not support L2CACHE or one does not want to enable
  379. L2CACHE, choose this option.
  380. config ENABLE_ARM_SOC_BOOT0_HOOK
  381. bool "prepare BOOT0 header"
  382. help
  383. If the SoC's BOOT0 requires a header area filled with (magic)
  384. values, then choose this option, and create a file included as
  385. <asm/arch/boot0.h> which contains the required assembler code.
  386. config USE_ARCH_MEMCPY
  387. bool "Use an assembly optimized implementation of memcpy"
  388. default y if !ARM64
  389. depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
  390. help
  391. Enable the generation of an optimized version of memcpy.
  392. Such an implementation may be faster under some conditions
  393. but may increase the binary size.
  394. config SPL_USE_ARCH_MEMCPY
  395. bool "Use an assembly optimized implementation of memcpy for SPL"
  396. default y if USE_ARCH_MEMCPY
  397. depends on SPL
  398. help
  399. Enable the generation of an optimized version of memcpy.
  400. Such an implementation may be faster under some conditions
  401. but may increase the binary size.
  402. config TPL_USE_ARCH_MEMCPY
  403. bool "Use an assembly optimized implementation of memcpy for TPL"
  404. default y if USE_ARCH_MEMCPY
  405. depends on TPL
  406. help
  407. Enable the generation of an optimized version of memcpy.
  408. Such an implementation may be faster under some conditions
  409. but may increase the binary size.
  410. config USE_ARCH_MEMMOVE
  411. bool "Use an assembly optimized implementation of memmove" if !ARM64
  412. default USE_ARCH_MEMCPY if ARM64
  413. depends on ARM64
  414. help
  415. Enable the generation of an optimized version of memmove.
  416. Such an implementation may be faster under some conditions
  417. but may increase the binary size.
  418. config SPL_USE_ARCH_MEMMOVE
  419. bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
  420. default SPL_USE_ARCH_MEMCPY if ARM64
  421. depends on SPL && ARM64
  422. help
  423. Enable the generation of an optimized version of memmove.
  424. Such an implementation may be faster under some conditions
  425. but may increase the binary size.
  426. config TPL_USE_ARCH_MEMMOVE
  427. bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
  428. default TPL_USE_ARCH_MEMCPY if ARM64
  429. depends on TPL && ARM64
  430. help
  431. Enable the generation of an optimized version of memmove.
  432. Such an implementation may be faster under some conditions
  433. but may increase the binary size.
  434. config USE_ARCH_MEMSET
  435. bool "Use an assembly optimized implementation of memset"
  436. default y if !ARM64
  437. depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
  438. help
  439. Enable the generation of an optimized version of memset.
  440. Such an implementation may be faster under some conditions
  441. but may increase the binary size.
  442. config SPL_USE_ARCH_MEMSET
  443. bool "Use an assembly optimized implementation of memset for SPL"
  444. default y if USE_ARCH_MEMSET
  445. depends on SPL
  446. help
  447. Enable the generation of an optimized version of memset.
  448. Such an implementation may be faster under some conditions
  449. but may increase the binary size.
  450. config TPL_USE_ARCH_MEMSET
  451. bool "Use an assembly optimized implementation of memset for TPL"
  452. default y if USE_ARCH_MEMSET
  453. depends on TPL
  454. help
  455. Enable the generation of an optimized version of memset.
  456. Such an implementation may be faster under some conditions
  457. but may increase the binary size.
  458. config ARM64_SUPPORT_AARCH32
  459. bool "ARM64 system support AArch32 execution state"
  460. depends on ARM64
  461. default y if !TARGET_THUNDERX_88XX
  462. help
  463. This ARM64 system supports AArch32 execution state.
  464. config IPROC
  465. bool
  466. config S5P
  467. def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
  468. choice
  469. prompt "Target select"
  470. default TARGET_HIKEY
  471. config ARCH_AT91
  472. bool "Atmel AT91"
  473. select GPIO_EXTRA_HEADER
  474. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  475. select SPL_SEPARATE_BSS if SPL
  476. config ARCH_DAVINCI
  477. bool "TI DaVinci"
  478. select CPU_ARM926EJS
  479. select GPIO_EXTRA_HEADER
  480. select SPL_DM_SPI if SPL
  481. imply CMD_SAVES
  482. help
  483. Support for TI's DaVinci platform.
  484. config ARCH_HISTB
  485. bool "Hisilicon HiSTB SoCs"
  486. select DM
  487. select DM_SERIAL
  488. select OF_CONTROL
  489. select PL01X_SERIAL
  490. imply CMD_DM
  491. help
  492. Support for HiSTB SoCs.
  493. config ARCH_KIRKWOOD
  494. bool "Marvell Kirkwood"
  495. select ARCH_MISC_INIT
  496. select BOARD_EARLY_INIT_F
  497. select CPU_ARM926EJS
  498. select GPIO_EXTRA_HEADER
  499. select TIMER
  500. config ARCH_MVEBU
  501. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  502. select ARCH_EARLY_INIT_R if ARM64
  503. select DM
  504. select DM_SERIAL
  505. select DM_SPI
  506. select DM_SPI_FLASH
  507. select GPIO_EXTRA_HEADER
  508. select SPL_DM_SPI if SPL
  509. select SPL_DM_SPI_FLASH if SPL
  510. select SPL_TIMER if SPL
  511. select TIMER if !ARM64
  512. select OF_CONTROL
  513. select OF_SEPARATE
  514. select SPI
  515. imply CMD_DM
  516. config ARCH_ORION5X
  517. bool "Marvell Orion"
  518. select CPU_ARM926EJS
  519. select GPIO_EXTRA_HEADER
  520. select SPL_SEPARATE_BSS if SPL
  521. select TIMER
  522. config TARGET_STV0991
  523. bool "Support stv0991"
  524. select CPU_V7A
  525. select DM
  526. select DM_SERIAL
  527. select DM_SPI
  528. select DM_SPI_FLASH
  529. select GPIO_EXTRA_HEADER
  530. select PL01X_SERIAL
  531. select SPI
  532. select SPI_FLASH
  533. imply CMD_DM
  534. config ARCH_BCM283X
  535. bool "Broadcom BCM283X family"
  536. select DM
  537. select DM_GPIO
  538. select DM_SERIAL
  539. select GPIO_EXTRA_HEADER
  540. select OF_CONTROL
  541. select PL01X_SERIAL
  542. select SERIAL_SEARCH_ALL
  543. imply CMD_DM
  544. imply FAT_WRITE
  545. config ARCH_BCMSTB
  546. bool "Broadcom BCM7XXX family"
  547. select CPU_V7A
  548. select DM
  549. select GPIO_EXTRA_HEADER
  550. select OF_CONTROL
  551. imply CMD_DM
  552. imply OF_HAS_PRIOR_STAGE
  553. help
  554. This enables support for Broadcom ARM-based set-top box
  555. chipsets, including the 7445 family of chips.
  556. config ARCH_BCMBCA
  557. bool "Broadcom broadband chip family"
  558. select DM
  559. select OF_CONTROL
  560. imply CMD_DM
  561. config TARGET_VEXPRESS_CA9X4
  562. bool "Support vexpress_ca9x4"
  563. select CPU_V7A
  564. select PL011_SERIAL
  565. config TARGET_BCMNS
  566. bool "Support Broadcom Northstar"
  567. select CPU_V7A
  568. select DM
  569. select DM_GPIO
  570. select DM_SERIAL
  571. select OF_CONTROL
  572. select TIMER
  573. select SYS_NS16550
  574. select ARM_GLOBAL_TIMER
  575. imply SYS_THUMB_BUILD
  576. imply MTD_RAW_NAND
  577. imply NAND_BRCMNAND
  578. imply NAND_BRCMNAND_IPROC
  579. help
  580. Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
  581. ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
  582. BCM5301x etc.
  583. config TARGET_BCMNS2
  584. bool "Support Broadcom Northstar2"
  585. select ARM64
  586. select GPIO_EXTRA_HEADER
  587. help
  588. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  589. ARMv8 Cortex-A57 processors targeting a broad range of networking
  590. applications.
  591. config TARGET_BCMNS3
  592. bool "Support Broadcom NS3"
  593. select ARM64
  594. select BOARD_LATE_INIT
  595. help
  596. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  597. ARMv8 Cortex-A72 processors targeting a broad range of networking
  598. applications.
  599. config ARCH_EXYNOS
  600. bool "Samsung EXYNOS"
  601. select DM
  602. select DM_GPIO
  603. select DM_I2C
  604. select DM_KEYBOARD
  605. select DM_SERIAL
  606. select DM_SPI
  607. select DM_SPI_FLASH
  608. select SPI
  609. select GPIO_EXTRA_HEADER
  610. imply SYS_THUMB_BUILD
  611. imply CMD_DM
  612. imply FAT_WRITE
  613. config ARCH_S5PC1XX
  614. bool "Samsung S5PC1XX"
  615. select CPU_V7A
  616. select DM
  617. select DM_GPIO
  618. select DM_I2C
  619. select DM_SERIAL
  620. select GPIO_EXTRA_HEADER
  621. imply CMD_DM
  622. config ARCH_HIGHBANK
  623. bool "Calxeda Highbank"
  624. select CPU_V7A
  625. select PL01X_SERIAL
  626. select DM
  627. select DM_SERIAL
  628. select OF_CONTROL
  629. select CLK
  630. select CLK_CCF
  631. select AHCI
  632. select PHYS_64BIT
  633. select TIMER
  634. select SP804_TIMER
  635. imply OF_HAS_PRIOR_STAGE
  636. config ARCH_INTEGRATOR
  637. bool "ARM Ltd. Integrator family"
  638. select DM
  639. select DM_SERIAL
  640. select GPIO_EXTRA_HEADER
  641. select PL01X_SERIAL
  642. imply CMD_DM
  643. config ARCH_IPQ40XX
  644. bool "Qualcomm IPQ40xx SoCs"
  645. select CPU_V7A
  646. select DM
  647. select DM_GPIO
  648. select DM_SERIAL
  649. select DM_RESET
  650. select GPIO_EXTRA_HEADER
  651. select MSM_SMEM
  652. select PINCTRL
  653. select CLK
  654. select SMEM
  655. select OF_CONTROL
  656. imply CMD_DM
  657. config ARCH_KEYSTONE
  658. bool "TI Keystone"
  659. select CMD_POWEROFF
  660. select CPU_V7A
  661. select DDR_SPD
  662. select SUPPORT_SPL
  663. select SYS_ARCH_TIMER
  664. select SYS_THUMB_BUILD
  665. imply CMD_MTDPARTS
  666. imply CMD_SAVES
  667. imply FIT
  668. config ARCH_K3
  669. bool "Texas Instruments' K3 Architecture"
  670. select SPL
  671. select SUPPORT_SPL
  672. select FIT
  673. select REGEX
  674. select FIT_SIGNATURE if ARM64
  675. config ARCH_OMAP2PLUS
  676. bool "TI OMAP2+"
  677. select CPU_V7A
  678. select GPIO_EXTRA_HEADER
  679. select SPL_BOARD_INIT if SPL
  680. select SPL_STACK_R if SPL
  681. select SUPPORT_SPL
  682. imply TI_SYSC if DM && OF_CONTROL
  683. imply FIT
  684. imply SPL_SEPARATE_BSS
  685. config ARCH_MESON
  686. bool "Amlogic Meson"
  687. select GPIO_EXTRA_HEADER
  688. imply DISTRO_DEFAULTS
  689. imply DM_RNG
  690. help
  691. Support for the Meson SoC family developed by Amlogic Inc.,
  692. targeted at media players and tablet computers. We currently
  693. support the S905 (GXBaby) 64-bit SoC.
  694. config ARCH_MEDIATEK
  695. bool "MediaTek SoCs"
  696. select DM
  697. select GPIO_EXTRA_HEADER
  698. select OF_CONTROL
  699. select SPL_DM if SPL
  700. select SPL_LIBCOMMON_SUPPORT if SPL
  701. select SPL_LIBGENERIC_SUPPORT if SPL
  702. select SPL_OF_CONTROL if SPL
  703. select SUPPORT_SPL
  704. help
  705. Support for the MediaTek SoCs family developed by MediaTek Inc.
  706. Please refer to doc/README.mediatek for more information.
  707. config ARCH_LPC32XX
  708. bool "NXP LPC32xx platform"
  709. select CPU_ARM926EJS
  710. select DM
  711. select DM_GPIO
  712. select DM_SERIAL
  713. select GPIO_EXTRA_HEADER
  714. select SPL_DM if SPL
  715. select SUPPORT_SPL
  716. imply CMD_DM
  717. config ARCH_IMX8
  718. bool "NXP i.MX8 platform"
  719. select ARM64
  720. select SYS_FSL_HAS_SEC
  721. select SYS_FSL_SEC_COMPAT_4
  722. select SYS_FSL_SEC_LE
  723. select DM
  724. select DM_EVENT
  725. select GPIO_EXTRA_HEADER
  726. select MACH_IMX
  727. select OF_CONTROL
  728. select ENABLE_ARM_SOC_BOOT0_HOOK
  729. config ARCH_IMX8M
  730. bool "NXP i.MX8M platform"
  731. select ARM64
  732. select GPIO_EXTRA_HEADER
  733. select MACH_IMX
  734. select SYS_FSL_HAS_SEC
  735. select SYS_FSL_SEC_COMPAT_4
  736. select SYS_FSL_SEC_LE
  737. select SYS_I2C_MXC
  738. select DM
  739. select DM_EVENT if CLK
  740. select SUPPORT_SPL
  741. imply CMD_DM
  742. config ARCH_IMX8ULP
  743. bool "NXP i.MX8ULP platform"
  744. select ARM64
  745. select DM
  746. select DM_EVENT
  747. select MACH_IMX
  748. select OF_CONTROL
  749. select SUPPORT_SPL
  750. select GPIO_EXTRA_HEADER
  751. select MISC
  752. select IMX_ELE
  753. imply CMD_DM
  754. config ARCH_IMX9
  755. bool "NXP i.MX9 platform"
  756. select ARM64
  757. select DM
  758. select DM_EVENT
  759. select MACH_IMX
  760. select SUPPORT_SPL
  761. select GPIO_EXTRA_HEADER
  762. select MISC
  763. select IMX_ELE
  764. imply CMD_DM
  765. config ARCH_IMXRT
  766. bool "NXP i.MXRT platform"
  767. select CPU_V7M
  768. select DM
  769. select DM_SERIAL
  770. select GPIO_EXTRA_HEADER
  771. select MACH_IMX
  772. select SUPPORT_SPL
  773. imply CMD_DM
  774. config ARCH_MX23
  775. bool "NXP i.MX23 family"
  776. select CPU_ARM926EJS
  777. select GPIO_EXTRA_HEADER
  778. select MACH_IMX
  779. select SUPPORT_SPL
  780. config ARCH_MX28
  781. bool "NXP i.MX28 family"
  782. select CPU_ARM926EJS
  783. select GPIO_EXTRA_HEADER
  784. select MACH_IMX
  785. select SUPPORT_SPL
  786. config ARCH_MX31
  787. bool "NXP i.MX31 family"
  788. select CPU_ARM1136
  789. select GPIO_EXTRA_HEADER
  790. select MACH_IMX
  791. config ARCH_MX7ULP
  792. bool "NXP MX7ULP"
  793. select BOARD_POSTCLK_INIT
  794. select CPU_V7A
  795. select GPIO_EXTRA_HEADER
  796. select MACH_IMX
  797. select SYS_FSL_HAS_SEC
  798. select SYS_FSL_SEC_COMPAT_4
  799. select SYS_FSL_SEC_LE
  800. select ROM_UNIFIED_SECTIONS
  801. imply MXC_GPIO
  802. imply SYS_THUMB_BUILD
  803. config ARCH_MX7
  804. bool "Freescale MX7"
  805. select ARCH_MISC_INIT
  806. select CPU_V7A
  807. select GPIO_EXTRA_HEADER
  808. select MACH_IMX
  809. select MXC_GPT_HCLK
  810. select SYS_FSL_HAS_SEC
  811. select SYS_FSL_SEC_COMPAT_4
  812. select SYS_FSL_SEC_LE
  813. imply BOARD_EARLY_INIT_F
  814. imply MXC_GPIO
  815. imply SYS_THUMB_BUILD
  816. config ARCH_MX6
  817. bool "Freescale MX6"
  818. select BOARD_POSTCLK_INIT
  819. select CPU_V7A
  820. select GPIO_EXTRA_HEADER
  821. select MACH_IMX
  822. select MXC_GPT_HCLK
  823. select SYS_FSL_HAS_SEC
  824. select SYS_FSL_SEC_COMPAT_4
  825. select SYS_FSL_SEC_LE
  826. select SYS_L2_PL310 if !SYS_L2CACHE_OFF
  827. imply MXC_GPIO
  828. imply SYS_THUMB_BUILD
  829. imply SPL_SEPARATE_BSS
  830. config ARCH_MX5
  831. bool "Freescale MX5"
  832. select BOARD_EARLY_INIT_F
  833. select CPU_V7A
  834. select GPIO_EXTRA_HEADER
  835. select MACH_IMX
  836. imply MXC_GPIO
  837. config ARCH_NEXELL
  838. bool "Nexell S5P4418/S5P6818 SoC"
  839. select ENABLE_ARM_SOC_BOOT0_HOOK
  840. select DM
  841. select GPIO_EXTRA_HEADER
  842. config ARCH_NPCM
  843. bool "Support Nuvoton SoCs"
  844. select DM
  845. select OF_CONTROL
  846. imply CMD_DM
  847. config ARCH_APPLE
  848. bool "Apple SoCs"
  849. select ARM64
  850. select CLK
  851. select CMD_PCI
  852. select CMD_USB
  853. select DM
  854. select DM_GPIO
  855. select DM_KEYBOARD
  856. select DM_MAILBOX
  857. select DM_RESET
  858. select DM_SERIAL
  859. select DM_SPI
  860. select DM_USB
  861. select VIDEO
  862. select IOMMU
  863. select LINUX_KERNEL_IMAGE_HEADER
  864. select OF_BOARD_SETUP
  865. select OF_CONTROL
  866. select PCI
  867. select PINCTRL
  868. select POSITION_INDEPENDENT
  869. select POWER_DOMAIN
  870. select REGMAP
  871. select SPI
  872. select SYSCON
  873. select SYSRESET
  874. select SYSRESET_WATCHDOG
  875. select SYSRESET_WATCHDOG_AUTO
  876. select USB
  877. imply CMD_DM
  878. imply CMD_GPT
  879. imply DISTRO_DEFAULTS
  880. imply OF_HAS_PRIOR_STAGE
  881. config ARCH_OWL
  882. bool "Actions Semi OWL SoCs"
  883. select DM
  884. select DM_SERIAL
  885. select GPIO_EXTRA_HEADER
  886. select OWL_SERIAL
  887. select CLK
  888. select CLK_OWL
  889. select OF_CONTROL
  890. select SYS_RELOC_GD_ENV_ADDR
  891. imply CMD_DM
  892. config ARCH_QEMU
  893. bool "QEMU Virtual Platform"
  894. select DM
  895. select DM_SERIAL
  896. select OF_CONTROL
  897. select PL01X_SERIAL
  898. imply CMD_DM
  899. imply DM_RNG
  900. imply DM_RTC
  901. imply RTC_PL031
  902. imply OF_HAS_PRIOR_STAGE
  903. config ARCH_RMOBILE
  904. bool "Renesas ARM SoCs"
  905. select DM
  906. select DM_SERIAL
  907. select GPIO_EXTRA_HEADER
  908. imply BOARD_EARLY_INIT_F
  909. imply CMD_DM
  910. imply FAT_WRITE
  911. imply SYS_THUMB_BUILD
  912. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  913. config ARCH_SNAPDRAGON
  914. bool "Qualcomm Snapdragon SoCs"
  915. select ARM64
  916. select DM
  917. select DM_GPIO
  918. select DM_SERIAL
  919. select GPIO_EXTRA_HEADER
  920. select MSM_SMEM
  921. select OF_CONTROL
  922. select OF_SEPARATE
  923. select SMEM
  924. select SPMI
  925. imply CMD_DM
  926. config ARCH_SOCFPGA
  927. bool "Altera SOCFPGA family"
  928. select ARCH_EARLY_INIT_R
  929. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  930. select ARM64 if TARGET_SOCFPGA_SOC64
  931. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  932. select DM
  933. select DM_SERIAL
  934. select GICV2
  935. select GPIO_EXTRA_HEADER
  936. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  937. select OF_CONTROL
  938. select SPL_DM_RESET if DM_RESET
  939. select SPL_DM_SERIAL
  940. select SPL_LIBCOMMON_SUPPORT
  941. select SPL_LIBGENERIC_SUPPORT
  942. select SPL_OF_CONTROL
  943. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
  944. select SPL_SERIAL
  945. select SPL_SYSRESET
  946. select SPL_WATCHDOG
  947. select SUPPORT_SPL
  948. select SYS_NS16550
  949. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  950. select SYSRESET
  951. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  952. select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
  953. imply CMD_DM
  954. imply CMD_MTDPARTS
  955. imply CRC32_VERIFY
  956. imply DM_SPI
  957. imply DM_SPI_FLASH
  958. imply FAT_WRITE
  959. imply SPL
  960. imply SPL_DM
  961. imply SPL_DM_SPI
  962. imply SPL_DM_SPI_FLASH
  963. imply SPL_LIBDISK_SUPPORT
  964. imply SPL_MMC
  965. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  966. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  967. imply SPL_SPI_FLASH_SUPPORT
  968. imply SPL_SPI
  969. imply L2X0_CACHE
  970. config ARCH_SUNXI
  971. bool "Support sunxi (Allwinner) SoCs"
  972. select BINMAN
  973. select CMD_GPIO
  974. select CMD_MMC if MMC
  975. select CMD_USB if DISTRO_DEFAULTS && USB_HOST
  976. select CLK
  977. select DM
  978. select DM_GPIO
  979. select DM_I2C if I2C
  980. select DM_SPI if SPI
  981. select DM_SPI_FLASH if SPI
  982. select DM_KEYBOARD
  983. select DM_MMC if MMC
  984. select DM_SCSI if SCSI
  985. select DM_SERIAL
  986. select GPIO_EXTRA_HEADER
  987. select OF_BOARD_SETUP
  988. select OF_CONTROL
  989. select OF_SEPARATE
  990. select PINCTRL
  991. select SPECIFY_CONSOLE_INDEX
  992. select SPL_SEPARATE_BSS if SPL
  993. select SPL_STACK_R if SPL
  994. select SPL_SYS_MALLOC_SIMPLE if SPL
  995. select SPL_SYS_THUMB_BUILD if !ARM64
  996. select SUNXI_GPIO
  997. select SYS_NS16550
  998. select SYS_THUMB_BUILD if !ARM64
  999. select USB if DISTRO_DEFAULTS
  1000. select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
  1001. select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
  1002. select SPL_USE_TINY_PRINTF
  1003. select USE_PREBOOT
  1004. select SYS_RELOC_GD_ENV_ADDR
  1005. imply BOARD_LATE_INIT
  1006. imply CMD_DM
  1007. imply CMD_GPT
  1008. imply CMD_UBI if MTD_RAW_NAND
  1009. imply DISTRO_DEFAULTS
  1010. imply FAT_WRITE
  1011. imply FIT
  1012. imply OF_LIBFDT_OVERLAY
  1013. imply PRE_CONSOLE_BUFFER
  1014. imply SPL_GPIO
  1015. imply SPL_LIBCOMMON_SUPPORT
  1016. imply SPL_LIBGENERIC_SUPPORT
  1017. imply SPL_MMC if MMC
  1018. imply SPL_POWER
  1019. imply SPL_SERIAL
  1020. imply SYSRESET
  1021. imply SYSRESET_WATCHDOG
  1022. imply SYSRESET_WATCHDOG_AUTO
  1023. imply USB_GADGET
  1024. imply WDT
  1025. config ARCH_U8500
  1026. bool "ST-Ericsson U8500 Series"
  1027. select CPU_V7A
  1028. select DM
  1029. select DM_GPIO
  1030. select DM_MMC if MMC
  1031. select DM_SERIAL
  1032. select DM_USB_GADGET if DM_USB
  1033. select OF_CONTROL
  1034. select SYSRESET
  1035. select TIMER
  1036. imply AB8500_USB_PHY
  1037. imply ARM_PL180_MMCI
  1038. imply CLK
  1039. imply DM_PMIC
  1040. imply DM_RTC
  1041. imply NOMADIK_GPIO
  1042. imply NOMADIK_MTU_TIMER
  1043. imply PHY
  1044. imply PL01X_SERIAL
  1045. imply PMIC_AB8500
  1046. imply RTC_PL031
  1047. imply SYS_THUMB_BUILD
  1048. imply SYSRESET_SYSCON
  1049. config ARCH_VERSAL
  1050. bool "Support Xilinx Versal Platform"
  1051. select ARM64
  1052. select CLK
  1053. select DM
  1054. select DM_MMC if MMC
  1055. select DM_SERIAL
  1056. select GICV3
  1057. select OF_CONTROL
  1058. select SOC_DEVICE
  1059. imply BOARD_LATE_INIT
  1060. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1061. config ARCH_VERSAL_NET
  1062. bool "Support Xilinx Versal NET Platform"
  1063. select ARM64
  1064. select CLK
  1065. select DM
  1066. select DM_MMC if MMC
  1067. select DM_SERIAL
  1068. select OF_CONTROL
  1069. imply BOARD_LATE_INIT
  1070. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1071. config ARCH_VF610
  1072. bool "Freescale Vybrid"
  1073. select CPU_V7A
  1074. select GPIO_EXTRA_HEADER
  1075. select IOMUX_SHARE_CONF_REG
  1076. select MACH_IMX
  1077. select SYS_FSL_ERRATUM_ESDHC111
  1078. imply CMD_MTDPARTS
  1079. imply MTD_RAW_NAND
  1080. config ARCH_ZYNQ
  1081. bool "Xilinx Zynq based platform"
  1082. select ARM_TWD_TIMER
  1083. select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
  1084. select CLK
  1085. select CLK_ZYNQ
  1086. select CPU_V7A
  1087. select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
  1088. select DM
  1089. select DM_MMC if MMC
  1090. select DM_SERIAL
  1091. select DM_SPI
  1092. select DM_SPI_FLASH
  1093. select OF_CONTROL
  1094. select SPI
  1095. select SPL_BOARD_INIT if SPL
  1096. select SPL_CLK if SPL
  1097. select SPL_DM if SPL
  1098. select SPL_DM_SPI if SPL
  1099. select SPL_DM_SPI_FLASH if SPL
  1100. select SPL_OF_CONTROL if SPL
  1101. select SPL_SEPARATE_BSS if SPL
  1102. select SPL_TIMER if SPL
  1103. select SUPPORT_SPL
  1104. select TIMER
  1105. imply BOARD_LATE_INIT
  1106. imply CMD_CLK
  1107. imply CMD_DM
  1108. imply CMD_SPL
  1109. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1110. imply FAT_WRITE
  1111. config ARCH_ZYNQMP_R5
  1112. bool "Xilinx ZynqMP R5 based platform"
  1113. select CLK
  1114. select CPU_V7R
  1115. select DM
  1116. select DM_MMC if MMC
  1117. select DM_SERIAL
  1118. select OF_CONTROL
  1119. imply CMD_DM
  1120. imply DM_USB_GADGET
  1121. config ARCH_ZYNQMP
  1122. bool "Xilinx ZynqMP based platform"
  1123. select ARM64
  1124. select CLK
  1125. select DM
  1126. select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
  1127. imply DM_MAILBOX
  1128. select DM_MMC if MMC
  1129. select DM_SERIAL
  1130. select DM_SPI if SPI
  1131. select DM_SPI_FLASH if DM_SPI
  1132. imply FIRMWARE
  1133. select GICV2
  1134. select OF_CONTROL
  1135. select SPL_BOARD_INIT if SPL
  1136. select SPL_CLK if SPL
  1137. select SPL_DM if SPL
  1138. select SPL_DM_SPI if SPI && SPL_DM
  1139. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1140. select SPL_DM_MAILBOX if SPL
  1141. imply SPL_FIRMWARE if SPL
  1142. select SPL_SEPARATE_BSS if SPL
  1143. select SUPPORT_SPL
  1144. imply ZYNQMP_IPI if DM_MAILBOX
  1145. select SOC_DEVICE
  1146. imply BOARD_LATE_INIT
  1147. imply CMD_DM
  1148. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1149. imply FAT_WRITE
  1150. imply MP
  1151. imply DM_USB_GADGET
  1152. imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
  1153. config ARCH_TEGRA
  1154. bool "NVIDIA Tegra"
  1155. select GPIO_EXTRA_HEADER
  1156. imply DISTRO_DEFAULTS
  1157. imply FAT_WRITE
  1158. imply SPL_TIMER if SPL
  1159. config ARCH_VEXPRESS64
  1160. bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
  1161. select ARM64
  1162. select DM
  1163. select DM_SERIAL
  1164. select PL01X_SERIAL
  1165. select OF_CONTROL
  1166. select CLK
  1167. select BLK
  1168. select MTD_NOR_FLASH if MTD
  1169. select FLASH_CFI_DRIVER if MTD
  1170. select ENV_IS_IN_FLASH if MTD
  1171. imply DISTRO_DEFAULTS
  1172. config TARGET_CORSTONE1000
  1173. bool "Support Corstone1000 Platform"
  1174. select ARM64
  1175. select PL01X_SERIAL
  1176. select DM
  1177. config TARGET_TOTAL_COMPUTE
  1178. bool "Support Total Compute Platform"
  1179. select ARM64
  1180. select PL01X_SERIAL
  1181. select DM
  1182. select DM_SERIAL
  1183. select DM_MMC
  1184. select DM_GPIO
  1185. config TARGET_LS2080A_EMU
  1186. bool "Support ls2080a_emu"
  1187. select ARCH_LS2080A
  1188. select ARM64
  1189. select ARMV8_MULTIENTRY
  1190. select FSL_DDR_SYNC_REFRESH
  1191. select GPIO_EXTRA_HEADER
  1192. help
  1193. Support for Freescale LS2080A_EMU platform.
  1194. The LS2080A Development System (EMULATOR) is a pre-silicon
  1195. development platform that supports the QorIQ LS2080A
  1196. Layerscape Architecture processor.
  1197. config TARGET_LS1088AQDS
  1198. bool "Support ls1088aqds"
  1199. select ARCH_LS1088A
  1200. select ARM64
  1201. select ARMV8_MULTIENTRY
  1202. select ARCH_SUPPORT_TFABOOT
  1203. select BOARD_LATE_INIT
  1204. select GPIO_EXTRA_HEADER
  1205. select SUPPORT_SPL
  1206. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1207. help
  1208. Support for NXP LS1088AQDS platform.
  1209. The LS1088A Development System (QDS) is a high-performance
  1210. development platform that supports the QorIQ LS1088A
  1211. Layerscape Architecture processor.
  1212. config TARGET_LS2080AQDS
  1213. bool "Support ls2080aqds"
  1214. select ARCH_LS2080A
  1215. select ARM64
  1216. select ARMV8_MULTIENTRY
  1217. select ARCH_SUPPORT_TFABOOT
  1218. select BOARD_LATE_INIT
  1219. select GPIO_EXTRA_HEADER
  1220. select SUPPORT_SPL
  1221. imply SCSI
  1222. imply SCSI_AHCI
  1223. select FSL_DDR_BIST
  1224. select FSL_DDR_INTERACTIVE if !SPL
  1225. help
  1226. Support for Freescale LS2080AQDS platform.
  1227. The LS2080A Development System (QDS) is a high-performance
  1228. development platform that supports the QorIQ LS2080A
  1229. Layerscape Architecture processor.
  1230. config TARGET_LS2080ARDB
  1231. bool "Support ls2080ardb"
  1232. select ARCH_LS2080A
  1233. select ARM64
  1234. select ARMV8_MULTIENTRY
  1235. select ARCH_SUPPORT_TFABOOT
  1236. select BOARD_LATE_INIT
  1237. select SUPPORT_SPL
  1238. select FSL_DDR_BIST
  1239. select FSL_DDR_INTERACTIVE if !SPL
  1240. select GPIO_EXTRA_HEADER
  1241. imply SCSI
  1242. imply SCSI_AHCI
  1243. help
  1244. Support for Freescale LS2080ARDB platform.
  1245. The LS2080A Reference design board (RDB) is a high-performance
  1246. development platform that supports the QorIQ LS2080A
  1247. Layerscape Architecture processor.
  1248. config TARGET_LS2081ARDB
  1249. bool "Support ls2081ardb"
  1250. select ARCH_LS2080A
  1251. select ARM64
  1252. select ARMV8_MULTIENTRY
  1253. select BOARD_LATE_INIT
  1254. select GPIO_EXTRA_HEADER
  1255. select SUPPORT_SPL
  1256. help
  1257. Support for Freescale LS2081ARDB platform.
  1258. The LS2081A Reference design board (RDB) is a high-performance
  1259. development platform that supports the QorIQ LS2081A/LS2041A
  1260. Layerscape Architecture processor.
  1261. config TARGET_LX2160ARDB
  1262. bool "Support lx2160ardb"
  1263. select ARCH_LX2160A
  1264. select ARM64
  1265. select ARMV8_MULTIENTRY
  1266. select ARCH_SUPPORT_TFABOOT
  1267. select BOARD_LATE_INIT
  1268. select GPIO_EXTRA_HEADER
  1269. help
  1270. Support for NXP LX2160ARDB platform.
  1271. The lx2160ardb (LX2160A Reference design board (RDB)
  1272. is a high-performance development platform that supports the
  1273. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1274. config TARGET_LX2160AQDS
  1275. bool "Support lx2160aqds"
  1276. select ARCH_LX2160A
  1277. select ARM64
  1278. select ARMV8_MULTIENTRY
  1279. select ARCH_SUPPORT_TFABOOT
  1280. select BOARD_LATE_INIT
  1281. select GPIO_EXTRA_HEADER
  1282. help
  1283. Support for NXP LX2160AQDS platform.
  1284. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1285. is a high-performance development platform that supports the
  1286. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1287. config TARGET_LX2162AQDS
  1288. bool "Support lx2162aqds"
  1289. select ARCH_LX2162A
  1290. select ARCH_MISC_INIT
  1291. select ARM64
  1292. select ARMV8_MULTIENTRY
  1293. select ARCH_SUPPORT_TFABOOT
  1294. select BOARD_LATE_INIT
  1295. select GPIO_EXTRA_HEADER
  1296. help
  1297. Support for NXP LX2162AQDS platform.
  1298. The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
  1299. config TARGET_HIKEY
  1300. bool "Support HiKey 96boards Consumer Edition Platform"
  1301. select ARM64
  1302. select DM
  1303. select DM_GPIO
  1304. select DM_SERIAL
  1305. select GPIO_EXTRA_HEADER
  1306. select OF_CONTROL
  1307. select PL01X_SERIAL
  1308. select SPECIFY_CONSOLE_INDEX
  1309. imply CMD_DM
  1310. help
  1311. Support for HiKey 96boards platform. It features a HI6220
  1312. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1313. config TARGET_HIKEY960
  1314. bool "Support HiKey960 96boards Consumer Edition Platform"
  1315. select ARM64
  1316. select DM
  1317. select DM_SERIAL
  1318. select GPIO_EXTRA_HEADER
  1319. select OF_CONTROL
  1320. select PL01X_SERIAL
  1321. imply CMD_DM
  1322. help
  1323. Support for HiKey960 96boards platform. It features a HI3660
  1324. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1325. config TARGET_POPLAR
  1326. bool "Support Poplar 96boards Enterprise Edition Platform"
  1327. select ARM64
  1328. select DM
  1329. select DM_SERIAL
  1330. select GPIO_EXTRA_HEADER
  1331. select OF_CONTROL
  1332. select PL01X_SERIAL
  1333. imply CMD_DM
  1334. help
  1335. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1336. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1337. making it capable of running any commercial set-top solution based on
  1338. Linux or Android.
  1339. config TARGET_LS1012AQDS
  1340. bool "Support ls1012aqds"
  1341. select ARCH_LS1012A
  1342. select ARM64
  1343. select ARCH_SUPPORT_TFABOOT
  1344. select BOARD_LATE_INIT
  1345. select GPIO_EXTRA_HEADER
  1346. help
  1347. Support for Freescale LS1012AQDS platform.
  1348. The LS1012A Development System (QDS) is a high-performance
  1349. development platform that supports the QorIQ LS1012A
  1350. Layerscape Architecture processor.
  1351. config TARGET_LS1012ARDB
  1352. bool "Support ls1012ardb"
  1353. select ARCH_LS1012A
  1354. select ARM64
  1355. select ARCH_SUPPORT_TFABOOT
  1356. select BOARD_LATE_INIT
  1357. select GPIO_EXTRA_HEADER
  1358. imply SCSI
  1359. imply SCSI_AHCI
  1360. help
  1361. Support for Freescale LS1012ARDB platform.
  1362. The LS1012A Reference design board (RDB) is a high-performance
  1363. development platform that supports the QorIQ LS1012A
  1364. Layerscape Architecture processor.
  1365. config TARGET_LS1012A2G5RDB
  1366. bool "Support ls1012a2g5rdb"
  1367. select ARCH_LS1012A
  1368. select ARM64
  1369. select ARCH_SUPPORT_TFABOOT
  1370. select BOARD_LATE_INIT
  1371. select GPIO_EXTRA_HEADER
  1372. imply SCSI
  1373. help
  1374. Support for Freescale LS1012A2G5RDB platform.
  1375. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1376. development platform that supports the QorIQ LS1012A
  1377. Layerscape Architecture processor.
  1378. config TARGET_LS1012AFRWY
  1379. bool "Support ls1012afrwy"
  1380. select ARCH_LS1012A
  1381. select ARM64
  1382. select ARCH_SUPPORT_TFABOOT
  1383. select BOARD_LATE_INIT
  1384. select GPIO_EXTRA_HEADER
  1385. imply SCSI
  1386. imply SCSI_AHCI
  1387. help
  1388. Support for Freescale LS1012AFRWY platform.
  1389. The LS1012A FRWY board (FRWY) is a high-performance
  1390. development platform that supports the QorIQ LS1012A
  1391. Layerscape Architecture processor.
  1392. config TARGET_LS1012AFRDM
  1393. bool "Support ls1012afrdm"
  1394. select ARCH_LS1012A
  1395. select ARM64
  1396. select ARCH_SUPPORT_TFABOOT
  1397. select GPIO_EXTRA_HEADER
  1398. help
  1399. Support for Freescale LS1012AFRDM platform.
  1400. The LS1012A Freedom board (FRDM) is a high-performance
  1401. development platform that supports the QorIQ LS1012A
  1402. Layerscape Architecture processor.
  1403. config TARGET_LS1028AQDS
  1404. bool "Support ls1028aqds"
  1405. select ARCH_LS1028A
  1406. select ARM64
  1407. select ARMV8_MULTIENTRY
  1408. select ARCH_SUPPORT_TFABOOT
  1409. select BOARD_LATE_INIT
  1410. select GPIO_EXTRA_HEADER
  1411. help
  1412. Support for Freescale LS1028AQDS platform
  1413. The LS1028A Development System (QDS) is a high-performance
  1414. development platform that supports the QorIQ LS1028A
  1415. Layerscape Architecture processor.
  1416. config TARGET_LS1028ARDB
  1417. bool "Support ls1028ardb"
  1418. select ARCH_LS1028A
  1419. select ARM64
  1420. select ARMV8_MULTIENTRY
  1421. select ARCH_SUPPORT_TFABOOT
  1422. select BOARD_LATE_INIT
  1423. select GPIO_EXTRA_HEADER
  1424. help
  1425. Support for Freescale LS1028ARDB platform
  1426. The LS1028A Development System (RDB) is a high-performance
  1427. development platform that supports the QorIQ LS1028A
  1428. Layerscape Architecture processor.
  1429. config TARGET_LS1088ARDB
  1430. bool "Support ls1088ardb"
  1431. select ARCH_LS1088A
  1432. select ARM64
  1433. select ARMV8_MULTIENTRY
  1434. select ARCH_SUPPORT_TFABOOT
  1435. select BOARD_LATE_INIT
  1436. select SUPPORT_SPL
  1437. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1438. select GPIO_EXTRA_HEADER
  1439. help
  1440. Support for NXP LS1088ARDB platform.
  1441. The LS1088A Reference design board (RDB) is a high-performance
  1442. development platform that supports the QorIQ LS1088A
  1443. Layerscape Architecture processor.
  1444. config TARGET_LS1021AQDS
  1445. bool "Support ls1021aqds"
  1446. select ARCH_LS1021A
  1447. select ARCH_SUPPORT_PSCI
  1448. select BOARD_EARLY_INIT_F
  1449. select BOARD_LATE_INIT
  1450. select CPU_V7A
  1451. select CPU_V7_HAS_NONSEC
  1452. select CPU_V7_HAS_VIRT
  1453. select LS1_DEEP_SLEEP
  1454. select PEN_ADDR_BIG_ENDIAN
  1455. select SUPPORT_SPL
  1456. select SYS_FSL_DDR
  1457. select FSL_DDR_INTERACTIVE
  1458. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1459. select GPIO_EXTRA_HEADER
  1460. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1461. imply SCSI
  1462. config TARGET_LS1021ATWR
  1463. bool "Support ls1021atwr"
  1464. select ARCH_LS1021A
  1465. select ARCH_SUPPORT_PSCI
  1466. select BOARD_EARLY_INIT_F
  1467. select BOARD_LATE_INIT
  1468. select CPU_V7A
  1469. select CPU_V7_HAS_NONSEC
  1470. select CPU_V7_HAS_VIRT
  1471. select LS1_DEEP_SLEEP
  1472. select PEN_ADDR_BIG_ENDIAN
  1473. select SUPPORT_SPL
  1474. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1475. select GPIO_EXTRA_HEADER
  1476. imply SCSI
  1477. config TARGET_PG_WCOM_SELI8
  1478. bool "Support Hitachi-Powergrids SELI8 service unit card"
  1479. select ARCH_LS1021A
  1480. select ARCH_SUPPORT_PSCI
  1481. select BOARD_EARLY_INIT_F
  1482. select BOARD_LATE_INIT
  1483. select CPU_V7A
  1484. select CPU_V7_HAS_NONSEC
  1485. select CPU_V7_HAS_VIRT
  1486. select SYS_FSL_DDR
  1487. select FSL_DDR_INTERACTIVE
  1488. select GPIO_EXTRA_HEADER
  1489. select VENDOR_KM
  1490. imply SCSI
  1491. help
  1492. Support for Hitachi-Powergrids SELI8 service unit card.
  1493. SELI8 is a QorIQ LS1021a based service unit card used
  1494. in XMC20 and FOX615 product families.
  1495. config TARGET_PG_WCOM_EXPU1
  1496. bool "Support Hitachi-Powergrids EXPU1 service unit card"
  1497. select ARCH_LS1021A
  1498. select ARCH_SUPPORT_PSCI
  1499. select BOARD_EARLY_INIT_F
  1500. select BOARD_LATE_INIT
  1501. select CPU_V7A
  1502. select CPU_V7_HAS_NONSEC
  1503. select CPU_V7_HAS_VIRT
  1504. select SYS_FSL_DDR
  1505. select FSL_DDR_INTERACTIVE
  1506. select VENDOR_KM
  1507. imply SCSI
  1508. help
  1509. Support for Hitachi-Powergrids EXPU1 service unit card.
  1510. EXPU1 is a QorIQ LS1021a based service unit card used
  1511. in XMC20 and FOX615 product families.
  1512. config TARGET_LS1021ATSN
  1513. bool "Support ls1021atsn"
  1514. select ARCH_LS1021A
  1515. select ARCH_SUPPORT_PSCI
  1516. select BOARD_EARLY_INIT_F
  1517. select BOARD_LATE_INIT
  1518. select CPU_V7A
  1519. select CPU_V7_HAS_NONSEC
  1520. select CPU_V7_HAS_VIRT
  1521. select LS1_DEEP_SLEEP
  1522. select SUPPORT_SPL
  1523. select GPIO_EXTRA_HEADER
  1524. imply SCSI
  1525. config TARGET_LS1021AIOT
  1526. bool "Support ls1021aiot"
  1527. select ARCH_LS1021A
  1528. select ARCH_SUPPORT_PSCI
  1529. select BOARD_LATE_INIT
  1530. select CPU_V7A
  1531. select CPU_V7_HAS_NONSEC
  1532. select CPU_V7_HAS_VIRT
  1533. select PEN_ADDR_BIG_ENDIAN
  1534. select SUPPORT_SPL
  1535. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1536. select GPIO_EXTRA_HEADER
  1537. imply SCSI
  1538. help
  1539. Support for Freescale LS1021AIOT platform.
  1540. The LS1021A Freescale board (IOT) is a high-performance
  1541. development platform that supports the QorIQ LS1021A
  1542. Layerscape Architecture processor.
  1543. config TARGET_LS1043AQDS
  1544. bool "Support ls1043aqds"
  1545. select ARCH_LS1043A
  1546. select ARM64
  1547. select ARMV8_MULTIENTRY
  1548. select ARCH_SUPPORT_TFABOOT
  1549. select BOARD_EARLY_INIT_F
  1550. select BOARD_LATE_INIT
  1551. select SUPPORT_SPL
  1552. select FSL_DDR_INTERACTIVE if !SPL
  1553. select FSL_DSPI if !SPL_NO_DSPI
  1554. select DM_SPI_FLASH if FSL_DSPI
  1555. select GPIO_EXTRA_HEADER
  1556. imply SCSI
  1557. imply SCSI_AHCI
  1558. help
  1559. Support for Freescale LS1043AQDS platform.
  1560. config TARGET_LS1043ARDB
  1561. bool "Support ls1043ardb"
  1562. select ARCH_LS1043A
  1563. select ARM64
  1564. select ARMV8_MULTIENTRY
  1565. select ARCH_SUPPORT_TFABOOT
  1566. select BOARD_EARLY_INIT_F
  1567. select BOARD_LATE_INIT
  1568. select SUPPORT_SPL
  1569. select FSL_DSPI if !SPL_NO_DSPI
  1570. select DM_SPI_FLASH if FSL_DSPI
  1571. select GPIO_EXTRA_HEADER
  1572. help
  1573. Support for Freescale LS1043ARDB platform.
  1574. config TARGET_LS1046AQDS
  1575. bool "Support ls1046aqds"
  1576. select ARCH_LS1046A
  1577. select ARM64
  1578. select ARMV8_MULTIENTRY
  1579. select ARCH_SUPPORT_TFABOOT
  1580. select BOARD_EARLY_INIT_F
  1581. select BOARD_LATE_INIT
  1582. select DM_SPI_FLASH if DM_SPI
  1583. select SUPPORT_SPL
  1584. select FSL_DDR_BIST if !SPL
  1585. select FSL_DDR_INTERACTIVE if !SPL
  1586. select FSL_DDR_INTERACTIVE if !SPL
  1587. select GPIO_EXTRA_HEADER
  1588. imply SCSI
  1589. help
  1590. Support for Freescale LS1046AQDS platform.
  1591. The LS1046A Development System (QDS) is a high-performance
  1592. development platform that supports the QorIQ LS1046A
  1593. Layerscape Architecture processor.
  1594. config TARGET_LS1046ARDB
  1595. bool "Support ls1046ardb"
  1596. select ARCH_LS1046A
  1597. select ARM64
  1598. select ARMV8_MULTIENTRY
  1599. select ARCH_SUPPORT_TFABOOT
  1600. select BOARD_EARLY_INIT_F
  1601. select BOARD_LATE_INIT
  1602. select DM_SPI_FLASH if DM_SPI
  1603. select POWER_MC34VR500
  1604. select SUPPORT_SPL
  1605. select FSL_DDR_BIST
  1606. select FSL_DDR_INTERACTIVE if !SPL
  1607. select GPIO_EXTRA_HEADER
  1608. imply SCSI
  1609. help
  1610. Support for Freescale LS1046ARDB platform.
  1611. The LS1046A Reference Design Board (RDB) is a high-performance
  1612. development platform that supports the QorIQ LS1046A
  1613. Layerscape Architecture processor.
  1614. config TARGET_LS1046AFRWY
  1615. bool "Support ls1046afrwy"
  1616. select ARCH_LS1046A
  1617. select ARM64
  1618. select ARMV8_MULTIENTRY
  1619. select ARCH_SUPPORT_TFABOOT
  1620. select BOARD_EARLY_INIT_F
  1621. select BOARD_LATE_INIT
  1622. select DM_SPI_FLASH if DM_SPI
  1623. select GPIO_EXTRA_HEADER
  1624. imply SCSI
  1625. help
  1626. Support for Freescale LS1046AFRWY platform.
  1627. The LS1046A Freeway Board (FRWY) is a high-performance
  1628. development platform that supports the QorIQ LS1046A
  1629. Layerscape Architecture processor.
  1630. config TARGET_SL28
  1631. bool "Support sl28"
  1632. select ARCH_LS1028A
  1633. select ARM64
  1634. select ARMV8_MULTIENTRY
  1635. select SUPPORT_SPL
  1636. select BINMAN
  1637. select DM
  1638. select DM_GPIO
  1639. select DM_I2C
  1640. select DM_MMC
  1641. select DM_SPI_FLASH
  1642. select DM_MDIO
  1643. select PCI
  1644. select DM_RNG
  1645. select DM_RTC
  1646. select DM_SCSI
  1647. select DM_SERIAL
  1648. select DM_SPI
  1649. select GPIO_EXTRA_HEADER
  1650. select SPL_DM if SPL
  1651. select SPL_DM_SPI if SPL
  1652. select SPL_DM_SPI_FLASH if SPL
  1653. select SPL_DM_I2C if SPL
  1654. select SPL_DM_MMC if SPL
  1655. select SPL_DM_SERIAL if SPL
  1656. help
  1657. Support for Kontron SMARC-sAL28 board.
  1658. config TARGET_TEN64
  1659. bool "Support ten64"
  1660. select ARCH_LS1088A
  1661. select ARCH_MISC_INIT
  1662. select ARM64
  1663. select ARMV8_MULTIENTRY
  1664. select ARCH_SUPPORT_TFABOOT
  1665. select BOARD_LATE_INIT
  1666. select SUPPORT_SPL
  1667. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1668. select GPIO_EXTRA_HEADER
  1669. help
  1670. Support for Traverse Technologies Ten64 board, based
  1671. on NXP LS1088A.
  1672. config ARCH_UNIPHIER
  1673. bool "Socionext UniPhier SoCs"
  1674. select BOARD_LATE_INIT
  1675. select DM
  1676. select DM_GPIO
  1677. select DM_I2C
  1678. select DM_MMC
  1679. select DM_MTD
  1680. select DM_RESET
  1681. select DM_SERIAL
  1682. select OF_BOARD_SETUP
  1683. select OF_CONTROL
  1684. select OF_LIBFDT
  1685. select PINCTRL
  1686. select SPL_BOARD_INIT if SPL
  1687. select SPL_DM if SPL
  1688. select SPL_LIBCOMMON_SUPPORT if SPL
  1689. select SPL_LIBGENERIC_SUPPORT if SPL
  1690. select SPL_OF_CONTROL if SPL
  1691. select SPL_PINCTRL if SPL
  1692. select SUPPORT_SPL
  1693. imply CMD_DM
  1694. imply DISTRO_DEFAULTS
  1695. imply FAT_WRITE
  1696. help
  1697. Support for UniPhier SoC family developed by Socionext Inc.
  1698. (formerly, System LSI Business Division of Panasonic Corporation)
  1699. config ARCH_SYNQUACER
  1700. bool "Socionext SynQuacer SoCs"
  1701. select ARM64
  1702. select DM
  1703. select GIC_V3
  1704. select PSCI_RESET
  1705. select SYSRESET
  1706. select SYSRESET_PSCI
  1707. select OF_CONTROL
  1708. help
  1709. Support for SynQuacer SoC family developed by Socionext Inc.
  1710. This SoC is used on 96boards EE DeveloperBox.
  1711. config ARCH_STM32
  1712. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1713. select CPU_V7M
  1714. select DM
  1715. select DM_SERIAL
  1716. imply CMD_DM
  1717. config ARCH_STI
  1718. bool "Support STMicroelectronics SoCs"
  1719. select BLK
  1720. select CPU_V7A
  1721. select DM
  1722. select DM_MMC
  1723. select DM_RESET
  1724. select DM_SERIAL
  1725. imply CMD_DM
  1726. help
  1727. Support for STMicroelectronics STiH407/10 SoC family.
  1728. This SoC is used on Linaro 96Board STiH410-B2260
  1729. config ARCH_STM32MP
  1730. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1731. select ARCH_MISC_INIT
  1732. select ARCH_SUPPORT_TFABOOT
  1733. select BOARD_LATE_INIT
  1734. select CLK
  1735. select DM
  1736. select DM_GPIO
  1737. select DM_RESET
  1738. select DM_SERIAL
  1739. select MISC
  1740. select OF_CONTROL
  1741. select OF_LIBFDT
  1742. select OF_SYSTEM_SETUP
  1743. select PINCTRL
  1744. select REGMAP
  1745. select SYSCON
  1746. select SYSRESET
  1747. select SYS_THUMB_BUILD
  1748. imply SPL_SYSRESET
  1749. imply CMD_DM
  1750. imply CMD_POWEROFF
  1751. imply OF_LIBFDT_OVERLAY
  1752. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1753. imply USE_PREBOOT
  1754. imply TIMESTAMP
  1755. help
  1756. Support for STM32MP SoC family developed by STMicroelectronics,
  1757. MPUs based on ARM cortex A core
  1758. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1759. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1760. chain.
  1761. SPL is the unsecure FSBL for the basic boot chain.
  1762. config ARCH_ROCKCHIP
  1763. bool "Support Rockchip SoCs"
  1764. select BLK
  1765. select BINMAN if SPL_OPTEE || SPL
  1766. select DM
  1767. select DM_GPIO
  1768. select DM_I2C
  1769. select DM_MMC
  1770. select DM_PWM
  1771. select DM_REGULATOR
  1772. select DM_SERIAL
  1773. select DM_SPI
  1774. select DM_SPI_FLASH
  1775. select ENABLE_ARM_SOC_BOOT0_HOOK
  1776. select OF_CONTROL
  1777. select SPI
  1778. select SPL_DM if SPL
  1779. select SPL_DM_SPI if SPL
  1780. select SPL_DM_SPI_FLASH if SPL
  1781. select SYS_MALLOC_F
  1782. select SYS_THUMB_BUILD if !ARM64
  1783. imply ADC
  1784. imply CMD_DM
  1785. imply DEBUG_UART_BOARD_INIT
  1786. imply BOOTSTD_DEFAULTS
  1787. imply FAT_WRITE
  1788. imply SARADC_ROCKCHIP
  1789. imply SPL_SYSRESET
  1790. imply SPL_SYS_MALLOC_SIMPLE
  1791. imply SYS_NS16550
  1792. imply TPL_SYSRESET
  1793. imply USB_FUNCTION_FASTBOOT
  1794. config ARCH_OCTEONTX
  1795. bool "Support OcteonTX SoCs"
  1796. select CLK
  1797. select DM
  1798. select GPIO_EXTRA_HEADER
  1799. select ARM64
  1800. select OF_CONTROL
  1801. select OF_LIVE
  1802. select BOARD_LATE_INIT
  1803. select SYS_CACHE_SHIFT_7
  1804. select SYS_PCI_64BIT if PCI
  1805. imply OF_HAS_PRIOR_STAGE
  1806. config ARCH_OCTEONTX2
  1807. bool "Support OcteonTX2 SoCs"
  1808. select CLK
  1809. select DM
  1810. select GPIO_EXTRA_HEADER
  1811. select ARM64
  1812. select OF_CONTROL
  1813. select OF_LIVE
  1814. select BOARD_LATE_INIT
  1815. select SYS_CACHE_SHIFT_7
  1816. select SYS_PCI_64BIT if PCI
  1817. imply OF_HAS_PRIOR_STAGE
  1818. config TARGET_THUNDERX_88XX
  1819. bool "Support ThunderX 88xx"
  1820. select ARM64
  1821. select GPIO_EXTRA_HEADER
  1822. select OF_CONTROL
  1823. select PL01X_SERIAL
  1824. select SYS_CACHE_SHIFT_7
  1825. config ARCH_ASPEED
  1826. bool "Support Aspeed SoCs"
  1827. select DM
  1828. select OF_CONTROL
  1829. imply CMD_DM
  1830. config TARGET_DURIAN
  1831. bool "Support Phytium Durian Platform"
  1832. select ARM64
  1833. select GPIO_EXTRA_HEADER
  1834. help
  1835. Support for durian platform.
  1836. It has 2GB Sdram, uart and pcie.
  1837. config TARGET_POMELO
  1838. bool "Support Phytium Pomelo Platform"
  1839. select ARM64
  1840. select DM
  1841. select AHCI
  1842. select SCSI_AHCI
  1843. select AHCI_PCI
  1844. select BLK
  1845. select PCI
  1846. select DM_PCI
  1847. select SCSI
  1848. select DM_SCSI
  1849. select DM_SERIAL
  1850. imply CMD_PCI
  1851. help
  1852. Support for pomelo platform.
  1853. It has 8GB Sdram, uart and pcie.
  1854. config TARGET_PRESIDIO_ASIC
  1855. bool "Support Cortina Presidio ASIC Platform"
  1856. select ARM64
  1857. select GICV2
  1858. config TARGET_XENGUEST_ARM64
  1859. bool "Xen guest ARM64"
  1860. select ARM64
  1861. select XEN
  1862. select OF_CONTROL
  1863. select LINUX_KERNEL_IMAGE_HEADER
  1864. select XEN_SERIAL
  1865. imply OF_HAS_PRIOR_STAGE
  1866. config ARCH_GXP
  1867. bool "Support HPE GXP SoCs"
  1868. select DM
  1869. select OF_CONTROL
  1870. imply CMD_DM
  1871. endchoice
  1872. config SUPPORT_PASSING_ATAGS
  1873. bool "Support pre-devicetree ATAG-based booting"
  1874. depends on !ARM64
  1875. imply SETUP_MEMORY_TAGS
  1876. help
  1877. Support for booting older Linux kernels, using ATAGs rather than
  1878. passing a devicetree. This is option is rarely used, and the
  1879. semantics are defined at
  1880. https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
  1881. config SETUP_MEMORY_TAGS
  1882. bool "Pass memory size information via ATAG"
  1883. depends on SUPPORT_PASSING_ATAGS
  1884. config CMDLINE_TAG
  1885. bool "Pass Linux kernel cmdline via ATAG"
  1886. depends on SUPPORT_PASSING_ATAGS
  1887. config INITRD_TAG
  1888. bool "Pass initrd starting point and size via ATAG"
  1889. depends on SUPPORT_PASSING_ATAGS
  1890. config REVISION_TAG
  1891. bool "Pass system revision via ATAG"
  1892. depends on SUPPORT_PASSING_ATAGS
  1893. config SERIAL_TAG
  1894. bool "Pass system serial number via ATAG"
  1895. depends on SUPPORT_PASSING_ATAGS
  1896. config STATIC_MACH_TYPE
  1897. bool "Statically define the Machine ID number"
  1898. default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
  1899. help
  1900. When booting via ATAGs, enable this option if we know the correct
  1901. machine ID number to use at compile time. Some systems will be
  1902. passed the number dynamically by whatever loads U-Boot.
  1903. config MACH_TYPE
  1904. int "Machine ID number"
  1905. depends on STATIC_MACH_TYPE
  1906. default 527 if TARGET_DS109
  1907. default 3036 if TARGET_DS414
  1908. default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
  1909. help
  1910. When booting via ATAGs, the machine type must be passed as a number.
  1911. For the full list see https://www.arm.linux.org.uk/developer/machines
  1912. config ARCH_SUPPORT_TFABOOT
  1913. bool
  1914. config TFABOOT
  1915. bool "Support for booting from TF-A"
  1916. depends on ARCH_SUPPORT_TFABOOT
  1917. help
  1918. Some platforms support the setup of secure registers (for instance
  1919. for CPU errata handling) or provide secure services like PSCI.
  1920. Those services could also be provided by other firmware parts
  1921. like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
  1922. does not need to (and cannot) execute this code.
  1923. Enabling this option will make a U-Boot binary that is relying
  1924. on other firmware layers to provide secure functionality.
  1925. config TI_SECURE_DEVICE
  1926. bool "HS Device Type Support"
  1927. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1928. help
  1929. If a high secure (HS) device type is being used, this config
  1930. must be set. This option impacts various aspects of the
  1931. build system (to create signed boot images that can be
  1932. authenticated) and the code. See the doc/README.ti-secure
  1933. file for further details.
  1934. config SYS_KWD_CONFIG
  1935. string "kwbimage config file path"
  1936. depends on ARCH_KIRKWOOD || ARCH_MVEBU
  1937. default "arch/arm/mach-mvebu/kwbimage.cfg"
  1938. help
  1939. Path within the source directory to the kwbimage.cfg file to use
  1940. when packaging the U-Boot image for use.
  1941. source "arch/arm/mach-apple/Kconfig"
  1942. source "arch/arm/mach-aspeed/Kconfig"
  1943. source "arch/arm/mach-at91/Kconfig"
  1944. source "arch/arm/mach-bcm283x/Kconfig"
  1945. source "arch/arm/mach-bcmbca/Kconfig"
  1946. source "arch/arm/mach-bcmstb/Kconfig"
  1947. source "arch/arm/mach-davinci/Kconfig"
  1948. source "arch/arm/mach-exynos/Kconfig"
  1949. source "arch/arm/mach-hpe/gxp/Kconfig"
  1950. source "arch/arm/mach-highbank/Kconfig"
  1951. source "arch/arm/mach-histb/Kconfig"
  1952. source "arch/arm/mach-integrator/Kconfig"
  1953. source "arch/arm/mach-ipq40xx/Kconfig"
  1954. source "arch/arm/mach-k3/Kconfig"
  1955. source "arch/arm/mach-keystone/Kconfig"
  1956. source "arch/arm/mach-kirkwood/Kconfig"
  1957. source "arch/arm/mach-lpc32xx/Kconfig"
  1958. source "arch/arm/mach-mvebu/Kconfig"
  1959. source "arch/arm/mach-octeontx/Kconfig"
  1960. source "arch/arm/mach-octeontx2/Kconfig"
  1961. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1962. source "arch/arm/mach-imx/mx3/Kconfig"
  1963. source "arch/arm/mach-imx/mx5/Kconfig"
  1964. source "arch/arm/mach-imx/mx6/Kconfig"
  1965. source "arch/arm/mach-imx/mx7/Kconfig"
  1966. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1967. source "arch/arm/mach-imx/imx8/Kconfig"
  1968. source "arch/arm/mach-imx/imx8m/Kconfig"
  1969. source "arch/arm/mach-imx/imx8ulp/Kconfig"
  1970. source "arch/arm/mach-imx/imx9/Kconfig"
  1971. source "arch/arm/mach-imx/imxrt/Kconfig"
  1972. source "arch/arm/mach-imx/mxs/Kconfig"
  1973. source "arch/arm/mach-omap2/Kconfig"
  1974. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1975. source "arch/arm/mach-orion5x/Kconfig"
  1976. source "arch/arm/mach-owl/Kconfig"
  1977. source "arch/arm/mach-rmobile/Kconfig"
  1978. source "arch/arm/mach-meson/Kconfig"
  1979. source "arch/arm/mach-mediatek/Kconfig"
  1980. source "arch/arm/mach-qemu/Kconfig"
  1981. source "arch/arm/mach-rockchip/Kconfig"
  1982. source "arch/arm/mach-s5pc1xx/Kconfig"
  1983. source "arch/arm/mach-snapdragon/Kconfig"
  1984. source "arch/arm/mach-socfpga/Kconfig"
  1985. source "arch/arm/mach-sti/Kconfig"
  1986. source "arch/arm/mach-stm32/Kconfig"
  1987. source "arch/arm/mach-stm32mp/Kconfig"
  1988. source "arch/arm/mach-sunxi/Kconfig"
  1989. source "arch/arm/mach-tegra/Kconfig"
  1990. source "arch/arm/mach-u8500/Kconfig"
  1991. source "arch/arm/mach-uniphier/Kconfig"
  1992. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1993. source "arch/arm/mach-zynq/Kconfig"
  1994. source "arch/arm/mach-zynqmp/Kconfig"
  1995. source "arch/arm/mach-versal/Kconfig"
  1996. source "arch/arm/mach-versal-net/Kconfig"
  1997. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1998. source "arch/arm/cpu/armv7/Kconfig"
  1999. source "arch/arm/cpu/armv8/Kconfig"
  2000. source "arch/arm/mach-imx/Kconfig"
  2001. source "arch/arm/mach-nexell/Kconfig"
  2002. source "arch/arm/mach-npcm/Kconfig"
  2003. source "board/armltd/total_compute/Kconfig"
  2004. source "board/armltd/corstone1000/Kconfig"
  2005. source "board/bosch/shc/Kconfig"
  2006. source "board/bosch/guardian/Kconfig"
  2007. source "board/Marvell/octeontx/Kconfig"
  2008. source "board/Marvell/octeontx2/Kconfig"
  2009. source "board/armltd/vexpress/Kconfig"
  2010. source "board/armltd/vexpress64/Kconfig"
  2011. source "board/cortina/presidio-asic/Kconfig"
  2012. source "board/broadcom/bcmns/Kconfig"
  2013. source "board/broadcom/bcmns3/Kconfig"
  2014. source "board/cavium/thunderx/Kconfig"
  2015. source "board/eets/pdu001/Kconfig"
  2016. source "board/emulation/qemu-arm/Kconfig"
  2017. source "board/freescale/ls2080aqds/Kconfig"
  2018. source "board/freescale/ls2080ardb/Kconfig"
  2019. source "board/freescale/ls1088a/Kconfig"
  2020. source "board/freescale/ls1028a/Kconfig"
  2021. source "board/freescale/ls1021aqds/Kconfig"
  2022. source "board/freescale/ls1043aqds/Kconfig"
  2023. source "board/freescale/ls1021atwr/Kconfig"
  2024. source "board/freescale/ls1021atsn/Kconfig"
  2025. source "board/freescale/ls1021aiot/Kconfig"
  2026. source "board/freescale/ls1046aqds/Kconfig"
  2027. source "board/freescale/ls1043ardb/Kconfig"
  2028. source "board/freescale/ls1046ardb/Kconfig"
  2029. source "board/freescale/ls1046afrwy/Kconfig"
  2030. source "board/freescale/ls1012aqds/Kconfig"
  2031. source "board/freescale/ls1012ardb/Kconfig"
  2032. source "board/freescale/ls1012afrdm/Kconfig"
  2033. source "board/freescale/lx2160a/Kconfig"
  2034. source "board/grinn/chiliboard/Kconfig"
  2035. source "board/hisilicon/hikey/Kconfig"
  2036. source "board/hisilicon/hikey960/Kconfig"
  2037. source "board/hisilicon/poplar/Kconfig"
  2038. source "board/isee/igep003x/Kconfig"
  2039. source "board/kontron/sl28/Kconfig"
  2040. source "board/myir/mys_6ulx/Kconfig"
  2041. source "board/samsung/common/Kconfig"
  2042. source "board/siemens/common/Kconfig"
  2043. source "board/seeed/npi_imx6ull/Kconfig"
  2044. source "board/socionext/developerbox/Kconfig"
  2045. source "board/st/stv0991/Kconfig"
  2046. source "board/tcl/sl50/Kconfig"
  2047. source "board/traverse/ten64/Kconfig"
  2048. source "board/variscite/dart_6ul/Kconfig"
  2049. source "board/vscom/baltos/Kconfig"
  2050. source "board/phytium/durian/Kconfig"
  2051. source "board/phytium/pomelo/Kconfig"
  2052. source "board/xen/xenguest_arm64/Kconfig"
  2053. source "arch/arm/Kconfig.debug"
  2054. endmenu