spl.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <debug_uart.h>
  8. #include <fdtdec.h>
  9. #include <hang.h>
  10. #include <image.h>
  11. #include <init.h>
  12. #include <log.h>
  13. #include <spl.h>
  14. #include <asm/global_data.h>
  15. #include <asm/io.h>
  16. #include <asm/arch/cpu.h>
  17. #include <asm/arch/soc.h>
  18. #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
  19. /*
  20. * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
  21. * point to the offset of kwbimage main header which is always at offset zero
  22. * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
  23. * makes U-Boot non-bootable.
  24. */
  25. #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
  26. #if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
  27. #error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
  28. #endif
  29. #endif
  30. /*
  31. * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
  32. * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
  33. * header and figure out at which sector the U-Boot proper binary is stored.
  34. * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
  35. * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
  36. * kwbimage main header.
  37. */
  38. #ifdef CONFIG_SPL_MMC_SUPPORT
  39. #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  40. #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
  41. #endif
  42. #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
  43. #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
  44. #endif
  45. #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
  46. #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
  47. #endif
  48. #endif
  49. /*
  50. * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
  51. * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
  52. * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
  53. */
  54. #ifdef CONFIG_SPL_SATA_SUPPORT
  55. #if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
  56. #error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
  57. #endif
  58. #endif
  59. /* Boot Type - block ID */
  60. #define IBR_HDR_I2C_ID 0x4D
  61. #define IBR_HDR_SPI_ID 0x5A
  62. #define IBR_HDR_NAND_ID 0x8B
  63. #define IBR_HDR_SATA_ID 0x78
  64. #define IBR_HDR_PEX_ID 0x9C
  65. #define IBR_HDR_UART_ID 0x69
  66. #define IBR_HDR_SDIO_ID 0xAE
  67. /* Structure of the main header, version 1 (Armada 370/38x/XP) */
  68. struct kwbimage_main_hdr_v1 {
  69. uint8_t blockid; /* 0x0 */
  70. uint8_t flags; /* 0x1 */
  71. uint16_t reserved2; /* 0x2-0x3 */
  72. uint32_t blocksize; /* 0x4-0x7 */
  73. uint8_t version; /* 0x8 */
  74. uint8_t headersz_msb; /* 0x9 */
  75. uint16_t headersz_lsb; /* 0xA-0xB */
  76. uint32_t srcaddr; /* 0xC-0xF */
  77. uint32_t destaddr; /* 0x10-0x13 */
  78. uint32_t execaddr; /* 0x14-0x17 */
  79. uint8_t options; /* 0x18 */
  80. uint8_t nandblocksize; /* 0x19 */
  81. uint8_t nandbadblklocation; /* 0x1A */
  82. uint8_t reserved4; /* 0x1B */
  83. uint16_t reserved5; /* 0x1C-0x1D */
  84. uint8_t ext; /* 0x1E */
  85. uint8_t checksum; /* 0x1F */
  86. } __packed;
  87. #ifdef CONFIG_SPL_MMC_SUPPORT
  88. u32 spl_mmc_boot_mode(const u32 boot_device)
  89. {
  90. return MMCSD_MODE_RAW;
  91. }
  92. #endif
  93. int spl_parse_board_header(struct spl_image_info *spl_image,
  94. const void *image_header, size_t size)
  95. {
  96. const struct kwbimage_main_hdr_v1 *mhdr = image_header;
  97. if (size < sizeof(*mhdr)) {
  98. /* This should be compile time assert */
  99. printf("FATAL ERROR: Image header size is too small\n");
  100. hang();
  101. }
  102. /*
  103. * Very basic check for image validity. We cannot check mhdr->checksum
  104. * as it is calculated also from variable length extended headers
  105. * (including SPL content) which is not included in U-Boot image_header.
  106. */
  107. if (mhdr->version != 1 ||
  108. ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
  109. (
  110. #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
  111. mhdr->blockid != IBR_HDR_SPI_ID &&
  112. #endif
  113. #ifdef CONFIG_SPL_SATA_SUPPORT
  114. mhdr->blockid != IBR_HDR_SATA_ID &&
  115. #endif
  116. #ifdef CONFIG_SPL_MMC_SUPPORT
  117. mhdr->blockid != IBR_HDR_SDIO_ID &&
  118. #endif
  119. 1
  120. )) {
  121. printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
  122. return -EINVAL;
  123. }
  124. spl_image->offset = mhdr->srcaddr;
  125. #ifdef CONFIG_SPL_SATA_SUPPORT
  126. /*
  127. * For SATA srcaddr is specified in number of sectors.
  128. * The main header is must be stored at sector number 1.
  129. * This expects that sector size is 512 bytes and recalculates
  130. * data offset to bytes relative to the main header.
  131. */
  132. if (mhdr->blockid == IBR_HDR_SATA_ID) {
  133. if (spl_image->offset < 1) {
  134. printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
  135. return -EINVAL;
  136. }
  137. spl_image->offset -= 1;
  138. spl_image->offset *= 512;
  139. }
  140. #endif
  141. #ifdef CONFIG_SPL_MMC_SUPPORT
  142. /*
  143. * For SDIO (eMMC) srcaddr is specified in number of sectors.
  144. * This expects that sector size is 512 bytes and recalculates
  145. * data offset to bytes.
  146. */
  147. if (mhdr->blockid == IBR_HDR_SDIO_ID)
  148. spl_image->offset *= 512;
  149. #endif
  150. spl_image->size = mhdr->blocksize;
  151. spl_image->entry_point = mhdr->execaddr;
  152. spl_image->load_addr = mhdr->destaddr;
  153. spl_image->os = IH_OS_U_BOOT;
  154. spl_image->name = "U-Boot";
  155. return 0;
  156. }
  157. u32 spl_boot_device(void)
  158. {
  159. u32 boot_device = get_boot_device();
  160. switch (boot_device) {
  161. /*
  162. * Return to the BootROM to continue the Marvell xmodem
  163. * UART boot protocol. As initiated by the kwboot tool.
  164. *
  165. * This can only be done by the BootROM since the beginning
  166. * of the image is already read and interpreted by the BootROM.
  167. * SPL has no chance to receive this information. So we
  168. * need to return to the BootROM to enable this xmodem
  169. * UART download. Use SPL infrastructure to return to BootROM.
  170. */
  171. case BOOT_DEVICE_UART:
  172. return BOOT_DEVICE_BOOTROM;
  173. /*
  174. * If SPL is compiled with chosen boot_device support
  175. * then use SPL driver for loading U-Boot proper.
  176. */
  177. #ifdef CONFIG_SPL_MMC_SUPPORT
  178. case BOOT_DEVICE_MMC1:
  179. return BOOT_DEVICE_MMC1;
  180. #endif
  181. #ifdef CONFIG_SPL_SATA_SUPPORT
  182. case BOOT_FROM_SATA:
  183. return BOOT_FROM_SATA;
  184. #endif
  185. #ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
  186. case BOOT_DEVICE_SPI:
  187. return BOOT_DEVICE_SPI;
  188. #endif
  189. /*
  190. * If SPL is not compiled with chosen boot_device support
  191. * then return to the BootROM. BootROM supports loading
  192. * U-Boot proper from any valid boot_device present in SAR
  193. * register.
  194. */
  195. default:
  196. return BOOT_DEVICE_BOOTROM;
  197. }
  198. }
  199. #else
  200. u32 spl_boot_device(void)
  201. {
  202. return BOOT_DEVICE_BOOTROM;
  203. }
  204. #endif
  205. int board_return_to_bootrom(struct spl_image_info *spl_image,
  206. struct spl_boot_device *bootdev)
  207. {
  208. u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE;
  209. printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
  210. return_to_bootrom();
  211. /* NOTREACHED - return_to_bootrom() does not return */
  212. hang();
  213. }
  214. void board_init_f(ulong dummy)
  215. {
  216. int ret;
  217. /*
  218. * Pin muxing needs to be done before UART output, since
  219. * on A38x the UART pins need some re-muxing for output
  220. * to work.
  221. */
  222. board_early_init_f();
  223. /* Example code showing how to enable the debug UART on MVEBU */
  224. #ifdef EARLY_UART
  225. /*
  226. * Debug UART can be used from here if required:
  227. *
  228. * debug_uart_init();
  229. * printch('a');
  230. * printhex8(0x1234);
  231. * printascii("string");
  232. */
  233. #endif
  234. /*
  235. * Use special translation offset for SPL. This needs to be
  236. * configured *before* spl_init() is called as this function
  237. * calls dm_init() which calls the bind functions of the
  238. * device drivers. Here the base address needs to be configured
  239. * (translated) correctly.
  240. */
  241. gd->translation_offset = 0xd0000000 - 0xf1000000;
  242. ret = spl_init();
  243. if (ret) {
  244. debug("spl_init() failed: %d\n", ret);
  245. hang();
  246. }
  247. preloader_console_init();
  248. timer_init();
  249. /* Armada 375 does not support SerDes and DDR3 init yet */
  250. #if !defined(CONFIG_ARMADA_375)
  251. /* First init the serdes PHY's */
  252. serdes_phy_config();
  253. /* Setup DDR */
  254. ret = ddr3_init();
  255. if (ret) {
  256. debug("ddr3_init() failed: %d\n", ret);
  257. hang();
  258. }
  259. #endif
  260. /* Initialize Auto Voltage Scaling */
  261. mv_avs_init();
  262. /* Update read timing control for PCIe */
  263. mv_rtc_config();
  264. }