traps.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * linux/arch/powerpc/kernel/traps.c
  4. *
  5. * Copyright 2007 Freescale Semiconductor.
  6. * Copyright (C) 2003 Motorola
  7. * Modified by Xianghua Xiao(x.xiao@motorola.com)
  8. *
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * Modified by Cort Dougan (cort@cs.nmt.edu)
  12. * and Paul Mackerras (paulus@cs.anu.edu.au)
  13. *
  14. * (C) Copyright 2000
  15. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  16. */
  17. /*
  18. * This file handles the architecture-dependent parts of hardware exceptions
  19. */
  20. #include <common.h>
  21. #include <asm/global_data.h>
  22. #include <asm/ptrace.h>
  23. #include <command.h>
  24. #include <init.h>
  25. #include <irq_func.h>
  26. #include <kgdb.h>
  27. #include <asm/processor.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /* Returns 0 if exception not found and fixup otherwise. */
  30. extern unsigned long search_exception_table(unsigned long);
  31. /*
  32. * End of addressable memory. This may be less than the actual
  33. * amount of memory on the system if we're unable to keep all
  34. * the memory mapped in.
  35. */
  36. #define END_OF_MEM (gd->ram_base + get_effective_memsize())
  37. static __inline__ void set_tsr(unsigned long val)
  38. {
  39. asm volatile("mtspr 0x150, %0" : : "r" (val));
  40. }
  41. static __inline__ unsigned long get_esr(void)
  42. {
  43. unsigned long val;
  44. asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
  45. return val;
  46. }
  47. #define ESR_MCI 0x80000000
  48. #define ESR_PIL 0x08000000
  49. #define ESR_PPR 0x04000000
  50. #define ESR_PTR 0x02000000
  51. #define ESR_DST 0x00800000
  52. #define ESR_DIZ 0x00400000
  53. #define ESR_U0F 0x00008000
  54. /*
  55. * Trap & Exception support
  56. */
  57. static void print_backtrace(unsigned long *sp)
  58. {
  59. int cnt = 0;
  60. unsigned long i;
  61. printf("Call backtrace: ");
  62. while (sp) {
  63. if ((uint)sp > END_OF_MEM)
  64. break;
  65. i = sp[1];
  66. if (cnt++ % 7 == 0)
  67. printf("\n");
  68. printf("%08lX ", i);
  69. if (cnt > 32) break;
  70. sp = (unsigned long *)*sp;
  71. }
  72. printf("\n");
  73. }
  74. void show_regs(struct pt_regs *regs)
  75. {
  76. int i;
  77. printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
  78. regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
  79. printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
  80. regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
  81. regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
  82. regs->msr&MSR_IR ? 1 : 0,
  83. regs->msr&MSR_DR ? 1 : 0);
  84. printf("\n");
  85. for (i = 0; i < 32; i++) {
  86. if ((i % 8) == 0)
  87. {
  88. printf("GPR%02d: ", i);
  89. }
  90. printf("%08lX ", regs->gpr[i]);
  91. if ((i % 8) == 7)
  92. {
  93. printf("\n");
  94. }
  95. }
  96. }
  97. static void _exception(int signr, struct pt_regs *regs)
  98. {
  99. show_regs(regs);
  100. print_backtrace((unsigned long *)regs->gpr[1]);
  101. panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
  102. }
  103. void CritcalInputException(struct pt_regs *regs)
  104. {
  105. panic("Critical Input Exception");
  106. }
  107. int machinecheck_count = 0;
  108. int machinecheck_error = 0;
  109. void MachineCheckException(struct pt_regs *regs)
  110. {
  111. unsigned long fixup;
  112. unsigned int mcsr, mcsrr0, mcsrr1, mcar;
  113. /* Probing PCI using config cycles cause this exception
  114. * when a device is not present. Catch it and return to
  115. * the PCI exception handler.
  116. */
  117. if ((fixup = search_exception_table(regs->nip)) != 0) {
  118. regs->nip = fixup;
  119. return;
  120. }
  121. mcsrr0 = mfspr(SPRN_MCSRR0);
  122. mcsrr1 = mfspr(SPRN_MCSRR1);
  123. mcsr = mfspr(SPRN_MCSR);
  124. mcar = mfspr(SPRN_MCAR);
  125. machinecheck_count++;
  126. machinecheck_error=1;
  127. #if defined(CONFIG_CMD_KGDB)
  128. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  129. return;
  130. #endif
  131. printf("Machine check in kernel mode.\n");
  132. printf("Caused by (from mcsr): ");
  133. printf("mcsr = 0x%08x\n", mcsr);
  134. if (mcsr & 0x80000000)
  135. printf("Machine check input pin\n");
  136. if (mcsr & 0x40000000)
  137. printf("Instruction cache parity error\n");
  138. if (mcsr & 0x20000000)
  139. printf("Data cache push parity error\n");
  140. if (mcsr & 0x10000000)
  141. printf("Data cache parity error\n");
  142. if (mcsr & 0x00000080)
  143. printf("Bus instruction address error\n");
  144. if (mcsr & 0x00000040)
  145. printf("Bus Read address error\n");
  146. if (mcsr & 0x00000020)
  147. printf("Bus Write address error\n");
  148. if (mcsr & 0x00000010)
  149. printf("Bus Instruction data bus error\n");
  150. if (mcsr & 0x00000008)
  151. printf("Bus Read data bus error\n");
  152. if (mcsr & 0x00000004)
  153. printf("Bus Write bus error\n");
  154. if (mcsr & 0x00000002)
  155. printf("Bus Instruction parity error\n");
  156. if (mcsr & 0x00000001)
  157. printf("Bus Read parity error\n");
  158. show_regs(regs);
  159. printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
  160. mcsr, mcsrr0, mcsrr1, mcar);
  161. print_backtrace((unsigned long *)regs->gpr[1]);
  162. if (machinecheck_count > 10) {
  163. panic("machine check count too high\n");
  164. }
  165. if (machinecheck_count > 1) {
  166. regs->nip += 4; /* skip offending instruction */
  167. printf("Skipping current instr, Returning to 0x%08lx\n",
  168. regs->nip);
  169. } else {
  170. printf("Returning back to 0x%08lx\n",regs->nip);
  171. }
  172. }
  173. void AlignmentException(struct pt_regs *regs)
  174. {
  175. #if defined(CONFIG_CMD_KGDB)
  176. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  177. return;
  178. #endif
  179. show_regs(regs);
  180. print_backtrace((unsigned long *)regs->gpr[1]);
  181. panic("Alignment Exception");
  182. }
  183. void ProgramCheckException(struct pt_regs *regs)
  184. {
  185. long esr_val;
  186. #if defined(CONFIG_CMD_KGDB)
  187. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  188. return;
  189. #endif
  190. show_regs(regs);
  191. esr_val = get_esr();
  192. if( esr_val & ESR_PIL )
  193. printf( "** Illegal Instruction **\n" );
  194. else if( esr_val & ESR_PPR )
  195. printf( "** Privileged Instruction **\n" );
  196. else if( esr_val & ESR_PTR )
  197. printf( "** Trap Instruction **\n" );
  198. print_backtrace((unsigned long *)regs->gpr[1]);
  199. panic("Program Check Exception");
  200. }
  201. void PITException(struct pt_regs *regs)
  202. {
  203. /*
  204. * Reset PIT interrupt
  205. */
  206. set_tsr(0x0c000000);
  207. /*
  208. * Call timer_interrupt routine in interrupts.c
  209. */
  210. timer_interrupt(NULL);
  211. }
  212. void UnknownException(struct pt_regs *regs)
  213. {
  214. #if defined(CONFIG_CMD_KGDB)
  215. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  216. return;
  217. #endif
  218. printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
  219. regs->nip, regs->msr, regs->trap);
  220. _exception(0, regs);
  221. }
  222. void ExtIntException(struct pt_regs *regs)
  223. {
  224. volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
  225. uint vect;
  226. #if defined(CONFIG_CMD_KGDB)
  227. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  228. return;
  229. #endif
  230. printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
  231. regs->nip, regs->msr, regs->trap);
  232. vect = pic->iack0;
  233. printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
  234. show_regs(regs);
  235. print_backtrace((unsigned long *)regs->gpr[1]);
  236. }
  237. void DebugException(struct pt_regs *regs)
  238. {
  239. printf("Debugger trap at @ %lx\n", regs->nip );
  240. show_regs(regs);
  241. }