Kconfig 48 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed from
  16. almost any 4K aligned address. This logic relies on the relocation
  17. information that is embedded in the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config INIT_SP_RELATIVE
  20. bool "Specify the early stack pointer relative to the .bss section"
  21. default n if ARCH_QEMU
  22. default y if POSITION_INDEPENDENT
  23. help
  24. U-Boot typically uses a hard-coded value for the stack pointer
  25. before relocation. Enable this option to instead calculate the
  26. initial SP at run-time. This is useful to avoid hard-coding addresses
  27. into U-Boot, so that it can be loaded and executed at arbitrary
  28. addresses and thus avoid using arbitrary addresses at runtime.
  29. If this option is enabled, the early stack pointer is set to
  30. &_bss_start with a offset value added. The offset is specified by
  31. SYS_INIT_SP_BSS_OFFSET.
  32. config SYS_INIT_SP_BSS_OFFSET
  33. int "Early stack offset from the .bss base address"
  34. depends on INIT_SP_RELATIVE
  35. default 524288
  36. help
  37. This option's value is the offset added to &_bss_start in order to
  38. calculate the stack pointer. This offset should be large enough so
  39. that the early malloc region, global data (gd), and early stack usage
  40. do not overlap any appended DTB.
  41. config LINUX_KERNEL_IMAGE_HEADER
  42. bool
  43. help
  44. Place a Linux kernel image header at the start of the U-Boot binary.
  45. The format of the header is described in the Linux kernel source at
  46. Documentation/arm64/booting.txt. This feature is useful since the
  47. image header reports the amount of memory (BSS and similar) that
  48. U-Boot needs to use, but which isn't part of the binary.
  49. if LINUX_KERNEL_IMAGE_HEADER
  50. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  51. hex
  52. help
  53. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  54. TEXT_OFFSET value written to the Linux kernel image header.
  55. endif
  56. endif
  57. config GIC_V3_ITS
  58. bool "ARM GICV3 ITS"
  59. select REGMAP
  60. select SYSCON
  61. help
  62. ARM GICV3 Interrupt translation service (ITS).
  63. Basic support for programming locality specific peripheral
  64. interrupts (LPI) configuration tables and enable LPI tables.
  65. LPI configuration table can be used by u-boot or Linux.
  66. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  67. configuration table can not be re-programmed, unless GICV3 reset.
  68. config STATIC_RELA
  69. bool
  70. default y if ARM64
  71. config DMA_ADDR_T_64BIT
  72. bool
  73. default y if ARM64
  74. config HAS_VBAR
  75. bool
  76. config HAS_THUMB2
  77. bool
  78. # Used for compatibility with asm files copied from the kernel
  79. config ARM_ASM_UNIFIED
  80. bool
  81. default y
  82. # Used for compatibility with asm files copied from the kernel
  83. config THUMB2_KERNEL
  84. bool
  85. config SYS_ICACHE_OFF
  86. bool "Do not enable icache"
  87. default n
  88. help
  89. Do not enable instruction cache in U-Boot.
  90. config SPL_SYS_ICACHE_OFF
  91. bool "Do not enable icache in SPL"
  92. depends on SPL
  93. default SYS_ICACHE_OFF
  94. help
  95. Do not enable instruction cache in SPL.
  96. config SYS_DCACHE_OFF
  97. bool "Do not enable dcache"
  98. default n
  99. help
  100. Do not enable data cache in U-Boot.
  101. config SPL_SYS_DCACHE_OFF
  102. bool "Do not enable dcache in SPL"
  103. depends on SPL
  104. default SYS_DCACHE_OFF
  105. help
  106. Do not enable data cache in SPL.
  107. config SYS_ARM_CACHE_CP15
  108. bool "CP15 based cache enabling support"
  109. help
  110. Select this if your processor suports enabling caches by using
  111. CP15 registers.
  112. config SYS_ARM_MMU
  113. bool "MMU-based Paged Memory Management Support"
  114. select SYS_ARM_CACHE_CP15
  115. help
  116. Select if you want MMU-based virtualised addressing space
  117. support via paged memory management.
  118. config SYS_ARM_MPU
  119. bool 'Use the ARM v7 PMSA Compliant MPU'
  120. help
  121. Some ARM systems without an MMU have instead a Memory Protection
  122. Unit (MPU) that defines the type and permissions for regions of
  123. memory.
  124. If your CPU has an MPU then you should choose 'y' here unless you
  125. know that you do not want to use the MPU.
  126. # If set, the workarounds for these ARM errata are applied early during U-Boot
  127. # startup. Note that in general these options force the workarounds to be
  128. # applied; no CPU-type/version detection exists, unlike the similar options in
  129. # the Linux kernel. Do not set these options unless they apply! Also note that
  130. # the following can be machine-specific errata. These do have ability to
  131. # provide rudimentary version and machine-specific checks, but expect no
  132. # product checks:
  133. # CONFIG_ARM_ERRATA_430973
  134. # CONFIG_ARM_ERRATA_454179
  135. # CONFIG_ARM_ERRATA_621766
  136. # CONFIG_ARM_ERRATA_798870
  137. # CONFIG_ARM_ERRATA_801819
  138. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  139. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  140. config ARM_ERRATA_430973
  141. bool
  142. config ARM_ERRATA_454179
  143. bool
  144. config ARM_ERRATA_621766
  145. bool
  146. config ARM_ERRATA_716044
  147. bool
  148. config ARM_ERRATA_725233
  149. bool
  150. config ARM_ERRATA_742230
  151. bool
  152. config ARM_ERRATA_743622
  153. bool
  154. config ARM_ERRATA_751472
  155. bool
  156. config ARM_ERRATA_761320
  157. bool
  158. config ARM_ERRATA_773022
  159. bool
  160. config ARM_ERRATA_774769
  161. bool
  162. config ARM_ERRATA_794072
  163. bool
  164. config ARM_ERRATA_798870
  165. bool
  166. config ARM_ERRATA_801819
  167. bool
  168. config ARM_ERRATA_826974
  169. bool
  170. config ARM_ERRATA_828024
  171. bool
  172. config ARM_ERRATA_829520
  173. bool
  174. config ARM_ERRATA_833069
  175. bool
  176. config ARM_ERRATA_833471
  177. bool
  178. config ARM_ERRATA_845369
  179. bool
  180. config ARM_ERRATA_852421
  181. bool
  182. config ARM_ERRATA_852423
  183. bool
  184. config ARM_ERRATA_855873
  185. bool
  186. config ARM_CORTEX_A8_CVE_2017_5715
  187. bool
  188. config ARM_CORTEX_A15_CVE_2017_5715
  189. bool
  190. config CPU_ARM720T
  191. bool
  192. select SYS_CACHE_SHIFT_5
  193. imply SYS_ARM_MMU
  194. config CPU_ARM920T
  195. bool
  196. select SYS_CACHE_SHIFT_5
  197. imply SYS_ARM_MMU
  198. config CPU_ARM926EJS
  199. bool
  200. select SYS_CACHE_SHIFT_5
  201. imply SYS_ARM_MMU
  202. config CPU_ARM946ES
  203. bool
  204. select SYS_CACHE_SHIFT_5
  205. imply SYS_ARM_MMU
  206. config CPU_ARM1136
  207. bool
  208. select SYS_CACHE_SHIFT_5
  209. imply SYS_ARM_MMU
  210. config CPU_ARM1176
  211. bool
  212. select HAS_VBAR
  213. select SYS_CACHE_SHIFT_5
  214. imply SYS_ARM_MMU
  215. config CPU_V7A
  216. bool
  217. select HAS_THUMB2
  218. select HAS_VBAR
  219. select SYS_CACHE_SHIFT_6
  220. imply SYS_ARM_MMU
  221. config CPU_V7M
  222. bool
  223. select HAS_THUMB2
  224. select SYS_ARM_MPU
  225. select SYS_CACHE_SHIFT_5
  226. select SYS_THUMB_BUILD
  227. select THUMB2_KERNEL
  228. config CPU_V7R
  229. bool
  230. select HAS_THUMB2
  231. select SYS_ARM_CACHE_CP15
  232. select SYS_ARM_MPU
  233. select SYS_CACHE_SHIFT_6
  234. config CPU_PXA
  235. bool
  236. select SYS_CACHE_SHIFT_5
  237. imply SYS_ARM_MMU
  238. config CPU_SA1100
  239. bool
  240. select SYS_CACHE_SHIFT_5
  241. imply SYS_ARM_MMU
  242. config SYS_CPU
  243. default "arm720t" if CPU_ARM720T
  244. default "arm920t" if CPU_ARM920T
  245. default "arm926ejs" if CPU_ARM926EJS
  246. default "arm946es" if CPU_ARM946ES
  247. default "arm1136" if CPU_ARM1136
  248. default "arm1176" if CPU_ARM1176
  249. default "armv7" if CPU_V7A
  250. default "armv7" if CPU_V7R
  251. default "armv7m" if CPU_V7M
  252. default "pxa" if CPU_PXA
  253. default "sa1100" if CPU_SA1100
  254. default "armv8" if ARM64
  255. config SYS_ARM_ARCH
  256. int
  257. default 4 if CPU_ARM720T
  258. default 4 if CPU_ARM920T
  259. default 5 if CPU_ARM926EJS
  260. default 5 if CPU_ARM946ES
  261. default 6 if CPU_ARM1136
  262. default 6 if CPU_ARM1176
  263. default 7 if CPU_V7A
  264. default 7 if CPU_V7M
  265. default 7 if CPU_V7R
  266. default 5 if CPU_PXA
  267. default 4 if CPU_SA1100
  268. default 8 if ARM64
  269. config SYS_CACHE_SHIFT_5
  270. bool
  271. config SYS_CACHE_SHIFT_6
  272. bool
  273. config SYS_CACHE_SHIFT_7
  274. bool
  275. config SYS_CACHELINE_SIZE
  276. int
  277. default 128 if SYS_CACHE_SHIFT_7
  278. default 64 if SYS_CACHE_SHIFT_6
  279. default 32 if SYS_CACHE_SHIFT_5
  280. choice
  281. prompt "Select the ARM data write cache policy"
  282. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  283. TARGET_BCMNSP || CPU_PXA || RZA1
  284. default SYS_ARM_CACHE_WRITEBACK
  285. config SYS_ARM_CACHE_WRITEBACK
  286. bool "Write-back (WB)"
  287. help
  288. A write updates the cache only and marks the cache line as dirty.
  289. External memory is updated only when the line is evicted or explicitly
  290. cleaned.
  291. config SYS_ARM_CACHE_WRITETHROUGH
  292. bool "Write-through (WT)"
  293. help
  294. A write updates both the cache and the external memory system.
  295. This does not mark the cache line as dirty.
  296. config SYS_ARM_CACHE_WRITEALLOC
  297. bool "Write allocation (WA)"
  298. help
  299. A cache line is allocated on a write miss. This means that executing a
  300. store instruction on the processor might cause a burst read to occur.
  301. There is a linefill to obtain the data for the cache line, before the
  302. write is performed.
  303. endchoice
  304. config ARCH_CPU_INIT
  305. bool "Enable ARCH_CPU_INIT"
  306. help
  307. Some architectures require a call to arch_cpu_init().
  308. Say Y here to enable it
  309. config SYS_ARCH_TIMER
  310. bool "ARM Generic Timer support"
  311. depends on CPU_V7A || ARM64
  312. default y if ARM64
  313. help
  314. The ARM Generic Timer (aka arch-timer) provides an architected
  315. interface to a timer source on an SoC.
  316. It is mandatory for ARMv8 implementation and widely available
  317. on ARMv7 systems.
  318. config ARM_SMCCC
  319. bool "Support for ARM SMC Calling Convention (SMCCC)"
  320. depends on CPU_V7A || ARM64
  321. select ARM_PSCI_FW
  322. help
  323. Say Y here if you want to enable ARM SMC Calling Convention.
  324. This should be enabled if U-Boot needs to communicate with system
  325. firmware (for example, PSCI) according to SMCCC.
  326. config SEMIHOSTING
  327. bool "support boot from semihosting"
  328. help
  329. In emulated environments, semihosting is a way for
  330. the hosted environment to call out to the emulator to
  331. retrieve files from the host machine.
  332. config SYS_THUMB_BUILD
  333. bool "Build U-Boot using the Thumb instruction set"
  334. depends on !ARM64
  335. help
  336. Use this flag to build U-Boot using the Thumb instruction set for
  337. ARM architectures. Thumb instruction set provides better code
  338. density. For ARM architectures that support Thumb2 this flag will
  339. result in Thumb2 code generated by GCC.
  340. config SPL_SYS_THUMB_BUILD
  341. bool "Build SPL using the Thumb instruction set"
  342. default y if SYS_THUMB_BUILD
  343. depends on !ARM64 && SPL
  344. help
  345. Use this flag to build SPL using the Thumb instruction set for
  346. ARM architectures. Thumb instruction set provides better code
  347. density. For ARM architectures that support Thumb2 this flag will
  348. result in Thumb2 code generated by GCC.
  349. config TPL_SYS_THUMB_BUILD
  350. bool "Build TPL using the Thumb instruction set"
  351. default y if SYS_THUMB_BUILD
  352. depends on TPL && !ARM64
  353. help
  354. Use this flag to build TPL using the Thumb instruction set for
  355. ARM architectures. Thumb instruction set provides better code
  356. density. For ARM architectures that support Thumb2 this flag will
  357. result in Thumb2 code generated by GCC.
  358. config SYS_L2CACHE_OFF
  359. bool "L2cache off"
  360. help
  361. If SoC does not support L2CACHE or one does not want to enable
  362. L2CACHE, choose this option.
  363. config ENABLE_ARM_SOC_BOOT0_HOOK
  364. bool "prepare BOOT0 header"
  365. help
  366. If the SoC's BOOT0 requires a header area filled with (magic)
  367. values, then choose this option, and create a file included as
  368. <asm/arch/boot0.h> which contains the required assembler code.
  369. config ARM_CORTEX_CPU_IS_UP
  370. bool
  371. default n
  372. config USE_ARCH_MEMCPY
  373. bool "Use an assembly optimized implementation of memcpy"
  374. default y
  375. depends on !ARM64
  376. help
  377. Enable the generation of an optimized version of memcpy.
  378. Such an implementation may be faster under some conditions
  379. but may increase the binary size.
  380. config SPL_USE_ARCH_MEMCPY
  381. bool "Use an assembly optimized implementation of memcpy for SPL"
  382. default y if USE_ARCH_MEMCPY
  383. depends on !ARM64 && SPL
  384. help
  385. Enable the generation of an optimized version of memcpy.
  386. Such an implementation may be faster under some conditions
  387. but may increase the binary size.
  388. config TPL_USE_ARCH_MEMCPY
  389. bool "Use an assembly optimized implementation of memcpy for TPL"
  390. default y if USE_ARCH_MEMCPY
  391. depends on !ARM64 && TPL
  392. help
  393. Enable the generation of an optimized version of memcpy.
  394. Such an implementation may be faster under some conditions
  395. but may increase the binary size.
  396. config USE_ARCH_MEMSET
  397. bool "Use an assembly optimized implementation of memset"
  398. default y
  399. depends on !ARM64
  400. help
  401. Enable the generation of an optimized version of memset.
  402. Such an implementation may be faster under some conditions
  403. but may increase the binary size.
  404. config SPL_USE_ARCH_MEMSET
  405. bool "Use an assembly optimized implementation of memset for SPL"
  406. default y if USE_ARCH_MEMSET
  407. depends on !ARM64 && SPL
  408. help
  409. Enable the generation of an optimized version of memset.
  410. Such an implementation may be faster under some conditions
  411. but may increase the binary size.
  412. config TPL_USE_ARCH_MEMSET
  413. bool "Use an assembly optimized implementation of memset for TPL"
  414. default y if USE_ARCH_MEMSET
  415. depends on !ARM64 && TPL
  416. help
  417. Enable the generation of an optimized version of memset.
  418. Such an implementation may be faster under some conditions
  419. but may increase the binary size.
  420. config ARM64_SUPPORT_AARCH32
  421. bool "ARM64 system support AArch32 execution state"
  422. depends on ARM64
  423. default y if !TARGET_THUNDERX_88XX
  424. help
  425. This ARM64 system supports AArch32 execution state.
  426. choice
  427. prompt "Target select"
  428. default TARGET_HIKEY
  429. config ARCH_AT91
  430. bool "Atmel AT91"
  431. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  432. select SPL_SEPARATE_BSS if SPL
  433. config TARGET_EDB93XX
  434. bool "Support edb93xx"
  435. select CPU_ARM920T
  436. select PL010_SERIAL
  437. config TARGET_ASPENITE
  438. bool "Support aspenite"
  439. select CPU_ARM926EJS
  440. config TARGET_GPLUGD
  441. bool "Support gplugd"
  442. select CPU_ARM926EJS
  443. config ARCH_DAVINCI
  444. bool "TI DaVinci"
  445. select CPU_ARM926EJS
  446. select SPL_DM_SPI if SPL
  447. imply CMD_SAVES
  448. help
  449. Support for TI's DaVinci platform.
  450. config ARCH_KIRKWOOD
  451. bool "Marvell Kirkwood"
  452. select ARCH_MISC_INIT
  453. select BOARD_EARLY_INIT_F
  454. select CPU_ARM926EJS
  455. config ARCH_MVEBU
  456. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  457. select DM
  458. select DM_ETH
  459. select DM_SERIAL
  460. select DM_SPI
  461. select DM_SPI_FLASH
  462. select SPL_DM_SPI if SPL
  463. select SPL_DM_SPI_FLASH if SPL
  464. select OF_CONTROL
  465. select OF_SEPARATE
  466. select SPI
  467. imply CMD_DM
  468. config ARCH_ORION5X
  469. bool "Marvell Orion"
  470. select CPU_ARM926EJS
  471. config TARGET_SPEAR300
  472. bool "Support spear300"
  473. select BOARD_EARLY_INIT_F
  474. select CPU_ARM926EJS
  475. select PL011_SERIAL
  476. imply CMD_SAVES
  477. config TARGET_SPEAR310
  478. bool "Support spear310"
  479. select BOARD_EARLY_INIT_F
  480. select CPU_ARM926EJS
  481. select PL011_SERIAL
  482. imply CMD_SAVES
  483. config TARGET_SPEAR320
  484. bool "Support spear320"
  485. select BOARD_EARLY_INIT_F
  486. select CPU_ARM926EJS
  487. select PL011_SERIAL
  488. imply CMD_SAVES
  489. config TARGET_SPEAR600
  490. bool "Support spear600"
  491. select BOARD_EARLY_INIT_F
  492. select CPU_ARM926EJS
  493. select PL011_SERIAL
  494. imply CMD_SAVES
  495. config TARGET_STV0991
  496. bool "Support stv0991"
  497. select CPU_V7A
  498. select DM
  499. select DM_SERIAL
  500. select DM_SPI
  501. select DM_SPI_FLASH
  502. select PL01X_SERIAL
  503. select SPI
  504. select SPI_FLASH
  505. imply CMD_DM
  506. config TARGET_X600
  507. bool "Support x600"
  508. select BOARD_LATE_INIT
  509. select CPU_ARM926EJS
  510. select PL011_SERIAL
  511. select SUPPORT_SPL
  512. config TARGET_FLEA3
  513. bool "Support flea3"
  514. select CPU_ARM1136
  515. config ARCH_BCM283X
  516. bool "Broadcom BCM283X family"
  517. select DM
  518. select DM_GPIO
  519. select DM_SERIAL
  520. select OF_CONTROL
  521. select PL01X_SERIAL
  522. select SERIAL_SEARCH_ALL
  523. imply CMD_DM
  524. imply FAT_WRITE
  525. config ARCH_BCM63158
  526. bool "Broadcom BCM63158 family"
  527. select DM
  528. select OF_CONTROL
  529. imply CMD_DM
  530. config ARCH_BCM68360
  531. bool "Broadcom BCM68360 family"
  532. select DM
  533. select OF_CONTROL
  534. imply CMD_DM
  535. config ARCH_BCM6858
  536. bool "Broadcom BCM6858 family"
  537. select DM
  538. select OF_CONTROL
  539. imply CMD_DM
  540. config TARGET_VEXPRESS_CA15_TC2
  541. bool "Support vexpress_ca15_tc2"
  542. select CPU_V7A
  543. select CPU_V7_HAS_NONSEC
  544. select CPU_V7_HAS_VIRT
  545. select PL011_SERIAL
  546. config ARCH_BCMSTB
  547. bool "Broadcom BCM7XXX family"
  548. select CPU_V7A
  549. select DM
  550. select OF_CONTROL
  551. select OF_PRIOR_STAGE
  552. imply CMD_DM
  553. help
  554. This enables support for Broadcom ARM-based set-top box
  555. chipsets, including the 7445 family of chips.
  556. config TARGET_VEXPRESS_CA5X2
  557. bool "Support vexpress_ca5x2"
  558. select CPU_V7A
  559. select PL011_SERIAL
  560. config TARGET_VEXPRESS_CA9X4
  561. bool "Support vexpress_ca9x4"
  562. select CPU_V7A
  563. select PL011_SERIAL
  564. config TARGET_BCM23550_W1D
  565. bool "Support bcm23550_w1d"
  566. select CPU_V7A
  567. imply CRC32_VERIFY
  568. imply FAT_WRITE
  569. config TARGET_BCM28155_AP
  570. bool "Support bcm28155_ap"
  571. select CPU_V7A
  572. imply CRC32_VERIFY
  573. imply FAT_WRITE
  574. config TARGET_BCMCYGNUS
  575. bool "Support bcmcygnus"
  576. select CPU_V7A
  577. imply BCM_SF2_ETH
  578. imply BCM_SF2_ETH_GMAC
  579. imply CMD_HASH
  580. imply CRC32_VERIFY
  581. imply FAT_WRITE
  582. imply HASH_VERIFY
  583. imply NETDEVICES
  584. config TARGET_BCMNSP
  585. bool "Support bcmnsp"
  586. select CPU_V7A
  587. config TARGET_BCMNS2
  588. bool "Support Broadcom Northstar2"
  589. select ARM64
  590. help
  591. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  592. ARMv8 Cortex-A57 processors targeting a broad range of networking
  593. applications.
  594. config TARGET_BCMNS3
  595. bool "Support Broadcom NS3"
  596. select ARM64
  597. select BOARD_LATE_INIT
  598. help
  599. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  600. ARMv8 Cortex-A72 processors targeting a broad range of networking
  601. applications.
  602. config ARCH_EXYNOS
  603. bool "Samsung EXYNOS"
  604. select DM
  605. select DM_GPIO
  606. select DM_I2C
  607. select DM_KEYBOARD
  608. select DM_SERIAL
  609. select DM_SPI
  610. select DM_SPI_FLASH
  611. select SPI
  612. imply SYS_THUMB_BUILD
  613. imply CMD_DM
  614. imply FAT_WRITE
  615. config ARCH_S5PC1XX
  616. bool "Samsung S5PC1XX"
  617. select CPU_V7A
  618. select DM
  619. select DM_GPIO
  620. select DM_I2C
  621. select DM_SERIAL
  622. imply CMD_DM
  623. config ARCH_HIGHBANK
  624. bool "Calxeda Highbank"
  625. select CPU_V7A
  626. select PL011_SERIAL
  627. config ARCH_INTEGRATOR
  628. bool "ARM Ltd. Integrator family"
  629. select DM
  630. select DM_SERIAL
  631. select PL01X_SERIAL
  632. imply CMD_DM
  633. config ARCH_IPQ40XX
  634. bool "Qualcomm IPQ40xx SoCs"
  635. select CPU_V7A
  636. select DM
  637. select DM_GPIO
  638. select DM_SERIAL
  639. select DM_RESET
  640. select MSM_SMEM
  641. select PINCTRL
  642. select CLK
  643. select SMEM
  644. select OF_CONTROL
  645. imply CMD_DM
  646. config ARCH_KEYSTONE
  647. bool "TI Keystone"
  648. select CMD_POWEROFF
  649. select CPU_V7A
  650. select SUPPORT_SPL
  651. select SYS_ARCH_TIMER
  652. select SYS_THUMB_BUILD
  653. imply CMD_MTDPARTS
  654. imply CMD_SAVES
  655. imply FIT
  656. config ARCH_K3
  657. bool "Texas Instruments' K3 Architecture"
  658. select SPL
  659. select SUPPORT_SPL
  660. select FIT
  661. config ARCH_OMAP2PLUS
  662. bool "TI OMAP2+"
  663. select CPU_V7A
  664. select SPL_BOARD_INIT if SPL
  665. select SPL_STACK_R if SPL
  666. select SUPPORT_SPL
  667. imply TI_SYSC if DM && OF_CONTROL
  668. imply FIT
  669. config ARCH_MESON
  670. bool "Amlogic Meson"
  671. imply DISTRO_DEFAULTS
  672. imply DM_RNG
  673. help
  674. Support for the Meson SoC family developed by Amlogic Inc.,
  675. targeted at media players and tablet computers. We currently
  676. support the S905 (GXBaby) 64-bit SoC.
  677. config ARCH_MEDIATEK
  678. bool "MediaTek SoCs"
  679. select DM
  680. select OF_CONTROL
  681. select SPL_DM if SPL
  682. select SPL_LIBCOMMON_SUPPORT if SPL
  683. select SPL_LIBGENERIC_SUPPORT if SPL
  684. select SPL_OF_CONTROL if SPL
  685. select SUPPORT_SPL
  686. help
  687. Support for the MediaTek SoCs family developed by MediaTek Inc.
  688. Please refer to doc/README.mediatek for more information.
  689. config ARCH_LPC32XX
  690. bool "NXP LPC32xx platform"
  691. select CPU_ARM926EJS
  692. select DM
  693. select DM_GPIO
  694. select DM_SERIAL
  695. select SPL_DM if SPL
  696. select SUPPORT_SPL
  697. imply CMD_DM
  698. config ARCH_IMX8
  699. bool "NXP i.MX8 platform"
  700. select ARM64
  701. select DM
  702. select OF_CONTROL
  703. select ENABLE_ARM_SOC_BOOT0_HOOK
  704. config ARCH_IMX8M
  705. bool "NXP i.MX8M platform"
  706. select ARM64
  707. select SYS_FSL_HAS_SEC if IMX_HAB
  708. select SYS_FSL_SEC_COMPAT_4
  709. select SYS_FSL_SEC_LE
  710. select DM
  711. select SUPPORT_SPL
  712. imply CMD_DM
  713. config ARCH_IMXRT
  714. bool "NXP i.MXRT platform"
  715. select CPU_V7M
  716. select DM
  717. select DM_SERIAL
  718. select SUPPORT_SPL
  719. imply CMD_DM
  720. config ARCH_MX23
  721. bool "NXP i.MX23 family"
  722. select CPU_ARM926EJS
  723. select PL011_SERIAL
  724. select SUPPORT_SPL
  725. config ARCH_MX25
  726. bool "NXP MX25"
  727. select CPU_ARM926EJS
  728. imply MXC_GPIO
  729. config ARCH_MX28
  730. bool "NXP i.MX28 family"
  731. select CPU_ARM926EJS
  732. select PL011_SERIAL
  733. select SUPPORT_SPL
  734. config ARCH_MX31
  735. bool "NXP i.MX31 family"
  736. select CPU_ARM1136
  737. config ARCH_MX7ULP
  738. bool "NXP MX7ULP"
  739. select CPU_V7A
  740. select SYS_FSL_HAS_SEC if IMX_HAB
  741. select SYS_FSL_SEC_COMPAT_4
  742. select SYS_FSL_SEC_LE
  743. select ROM_UNIFIED_SECTIONS
  744. imply MXC_GPIO
  745. imply SYS_THUMB_BUILD
  746. config ARCH_MX7
  747. bool "Freescale MX7"
  748. select ARCH_MISC_INIT
  749. select CPU_V7A
  750. select SYS_FSL_HAS_SEC if IMX_HAB
  751. select SYS_FSL_SEC_COMPAT_4
  752. select SYS_FSL_SEC_LE
  753. imply BOARD_EARLY_INIT_F
  754. imply MXC_GPIO
  755. imply SYS_THUMB_BUILD
  756. config ARCH_MX6
  757. bool "Freescale MX6"
  758. select CPU_V7A
  759. select SYS_FSL_HAS_SEC
  760. select SYS_FSL_SEC_COMPAT_4
  761. select SYS_FSL_SEC_LE
  762. imply MXC_GPIO
  763. imply SYS_THUMB_BUILD
  764. if ARCH_MX6
  765. config SPL_LDSCRIPT
  766. default "arch/arm/mach-omap2/u-boot-spl.lds"
  767. endif
  768. config ARCH_MX5
  769. bool "Freescale MX5"
  770. select BOARD_EARLY_INIT_F
  771. select CPU_V7A
  772. imply MXC_GPIO
  773. config ARCH_NEXELL
  774. bool "Nexell S5P4418/S5P6818 SoC"
  775. select ENABLE_ARM_SOC_BOOT0_HOOK
  776. select DM
  777. config ARCH_OWL
  778. bool "Actions Semi OWL SoCs"
  779. select DM
  780. select DM_ETH
  781. select DM_SERIAL
  782. select OWL_SERIAL
  783. select CLK
  784. select CLK_OWL
  785. select OF_CONTROL
  786. select SYS_RELOC_GD_ENV_ADDR
  787. imply CMD_DM
  788. config ARCH_QEMU
  789. bool "QEMU Virtual Platform"
  790. select DM
  791. select DM_SERIAL
  792. select OF_CONTROL
  793. select PL01X_SERIAL
  794. imply CMD_DM
  795. imply DM_RNG
  796. imply DM_RTC
  797. imply RTC_PL031
  798. config ARCH_RMOBILE
  799. bool "Renesas ARM SoCs"
  800. select DM
  801. select DM_SERIAL
  802. imply BOARD_EARLY_INIT_F
  803. imply CMD_DM
  804. imply FAT_WRITE
  805. imply SYS_THUMB_BUILD
  806. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  807. config TARGET_S32V234EVB
  808. bool "Support s32v234evb"
  809. select ARM64
  810. select SYS_FSL_ERRATUM_ESDHC111
  811. config ARCH_SNAPDRAGON
  812. bool "Qualcomm Snapdragon SoCs"
  813. select ARM64
  814. select DM
  815. select DM_GPIO
  816. select DM_SERIAL
  817. select MSM_SMEM
  818. select OF_CONTROL
  819. select OF_SEPARATE
  820. select SMEM
  821. select SPMI
  822. imply CMD_DM
  823. config ARCH_SOCFPGA
  824. bool "Altera SOCFPGA family"
  825. select ARCH_EARLY_INIT_R
  826. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  827. select ARM64 if TARGET_SOCFPGA_SOC64
  828. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  829. select DM
  830. select DM_SERIAL
  831. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  832. select OF_CONTROL
  833. select SPL_DM_RESET if DM_RESET
  834. select SPL_DM_SERIAL
  835. select SPL_LIBCOMMON_SUPPORT
  836. select SPL_LIBGENERIC_SUPPORT
  837. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  838. select SPL_OF_CONTROL
  839. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
  840. select SPL_SERIAL_SUPPORT
  841. select SPL_SYSRESET
  842. select SPL_WATCHDOG_SUPPORT
  843. select SUPPORT_SPL
  844. select SYS_NS16550
  845. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  846. select SYSRESET
  847. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  848. select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
  849. imply CMD_DM
  850. imply CMD_MTDPARTS
  851. imply CRC32_VERIFY
  852. imply DM_SPI
  853. imply DM_SPI_FLASH
  854. imply FAT_WRITE
  855. imply SPL
  856. imply SPL_DM
  857. imply SPL_DM_SPI
  858. imply SPL_DM_SPI_FLASH
  859. imply SPL_LIBDISK_SUPPORT
  860. imply SPL_MMC_SUPPORT
  861. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  862. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  863. imply SPL_SPI_FLASH_SUPPORT
  864. imply SPL_SPI_SUPPORT
  865. imply L2X0_CACHE
  866. config ARCH_SUNXI
  867. bool "Support sunxi (Allwinner) SoCs"
  868. select BINMAN
  869. select CMD_GPIO
  870. select CMD_MMC if MMC
  871. select CMD_USB if DISTRO_DEFAULTS
  872. select CLK
  873. select DM
  874. select DM_ETH
  875. select DM_GPIO
  876. select DM_KEYBOARD
  877. select DM_MMC if MMC
  878. select DM_SCSI if SCSI
  879. select DM_SERIAL
  880. select DM_USB if DISTRO_DEFAULTS
  881. select OF_BOARD_SETUP
  882. select OF_CONTROL
  883. select OF_SEPARATE
  884. select SPECIFY_CONSOLE_INDEX
  885. select SPL_STACK_R if SPL
  886. select SPL_SYS_MALLOC_SIMPLE if SPL
  887. select SPL_SYS_THUMB_BUILD if !ARM64
  888. select SUNXI_GPIO
  889. select SYS_NS16550
  890. select SYS_THUMB_BUILD if !ARM64
  891. select USB if DISTRO_DEFAULTS
  892. select USB_KEYBOARD if DISTRO_DEFAULTS
  893. select USB_STORAGE if DISTRO_DEFAULTS
  894. select SPL_USE_TINY_PRINTF
  895. select USE_PREBOOT
  896. select SYS_RELOC_GD_ENV_ADDR
  897. imply BOARD_LATE_INIT
  898. imply CMD_DM
  899. imply CMD_GPT
  900. imply CMD_UBI if MTD_RAW_NAND
  901. imply DISTRO_DEFAULTS
  902. imply FAT_WRITE
  903. imply FIT
  904. imply OF_LIBFDT_OVERLAY
  905. imply PRE_CONSOLE_BUFFER
  906. imply SPL_GPIO_SUPPORT
  907. imply SPL_LIBCOMMON_SUPPORT
  908. imply SPL_LIBGENERIC_SUPPORT
  909. imply SPL_MMC_SUPPORT if MMC
  910. imply SPL_POWER_SUPPORT
  911. imply SPL_SERIAL_SUPPORT
  912. imply USB_GADGET
  913. config ARCH_U8500
  914. bool "ST-Ericsson U8500 Series"
  915. select CPU_V7A
  916. select DM
  917. select DM_GPIO
  918. select DM_MMC if MMC
  919. select DM_SERIAL
  920. select DM_USB if USB
  921. select OF_CONTROL
  922. select SYSRESET
  923. select TIMER
  924. imply ARM_PL180_MMCI
  925. imply DM_RTC
  926. imply NOMADIK_MTU_TIMER
  927. imply PL01X_SERIAL
  928. imply RTC_PL031
  929. imply SYSRESET_SYSCON
  930. config ARCH_VERSAL
  931. bool "Support Xilinx Versal Platform"
  932. select ARM64
  933. select CLK
  934. select DM
  935. select DM_ETH if NET
  936. select DM_MMC if MMC
  937. select DM_SERIAL
  938. select OF_CONTROL
  939. imply BOARD_LATE_INIT
  940. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  941. config ARCH_VF610
  942. bool "Freescale Vybrid"
  943. select CPU_V7A
  944. select SYS_FSL_ERRATUM_ESDHC111
  945. imply CMD_MTDPARTS
  946. imply MTD_RAW_NAND
  947. config ARCH_ZYNQ
  948. bool "Xilinx Zynq based platform"
  949. select CLK
  950. select CLK_ZYNQ
  951. select CPU_V7A
  952. select DM
  953. select DM_ETH if NET
  954. select DM_MMC if MMC
  955. select DM_SERIAL
  956. select DM_SPI
  957. select DM_SPI_FLASH
  958. select DM_USB if USB
  959. select OF_CONTROL
  960. select SPI
  961. select SPL_BOARD_INIT if SPL
  962. select SPL_CLK if SPL
  963. select SPL_DM if SPL
  964. select SPL_DM_SPI if SPL
  965. select SPL_DM_SPI_FLASH if SPL
  966. select SPL_OF_CONTROL if SPL
  967. select SPL_SEPARATE_BSS if SPL
  968. select SUPPORT_SPL
  969. imply ARCH_EARLY_INIT_R
  970. imply BOARD_LATE_INIT
  971. imply CMD_CLK
  972. imply CMD_DM
  973. imply CMD_SPL
  974. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  975. imply FAT_WRITE
  976. config ARCH_ZYNQMP_R5
  977. bool "Xilinx ZynqMP R5 based platform"
  978. select CLK
  979. select CPU_V7R
  980. select DM
  981. select DM_ETH if NET
  982. select DM_MMC if MMC
  983. select DM_SERIAL
  984. select OF_CONTROL
  985. imply CMD_DM
  986. imply DM_USB_GADGET
  987. config ARCH_ZYNQMP
  988. bool "Xilinx ZynqMP based platform"
  989. select ARM64
  990. select CLK
  991. select DM
  992. select DM_ETH if NET
  993. select DM_MAILBOX
  994. select DM_MMC if MMC
  995. select DM_SERIAL
  996. select DM_SPI if SPI
  997. select DM_SPI_FLASH if DM_SPI
  998. select DM_USB if USB
  999. select FIRMWARE
  1000. select OF_CONTROL
  1001. select SPL_BOARD_INIT if SPL
  1002. select SPL_CLK if SPL
  1003. select SPL_DM if SPL
  1004. select SPL_DM_SPI if SPI && SPL_DM
  1005. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1006. select SPL_DM_MAILBOX if SPL
  1007. select SPL_FIRMWARE if SPL
  1008. select SPL_SEPARATE_BSS if SPL
  1009. select SUPPORT_SPL
  1010. select ZYNQMP_IPI
  1011. imply BOARD_LATE_INIT
  1012. imply CMD_DM
  1013. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1014. imply FAT_WRITE
  1015. imply MP
  1016. imply DM_USB_GADGET
  1017. config ARCH_TEGRA
  1018. bool "NVIDIA Tegra"
  1019. imply DISTRO_DEFAULTS
  1020. imply FAT_WRITE
  1021. config TARGET_VEXPRESS64_AEMV8A
  1022. bool "Support vexpress_aemv8a"
  1023. select ARM64
  1024. select PL01X_SERIAL
  1025. config TARGET_VEXPRESS64_BASE_FVP
  1026. bool "Support Versatile Express ARMv8a FVP BASE model"
  1027. select ARM64
  1028. select PL01X_SERIAL
  1029. select SEMIHOSTING
  1030. config TARGET_VEXPRESS64_JUNO
  1031. bool "Support Versatile Express Juno Development Platform"
  1032. select ARM64
  1033. select PL01X_SERIAL
  1034. select DM
  1035. select OF_CONTROL
  1036. select OF_BOARD
  1037. select CLK
  1038. select DM_SERIAL
  1039. select ARM_PSCI_FW
  1040. select PSCI_RESET
  1041. select DM_ETH
  1042. select BLK
  1043. select USB
  1044. select DM_USB
  1045. config TARGET_TOTAL_COMPUTE
  1046. bool "Support Total Compute Platform"
  1047. select ARM64
  1048. select PL01X_SERIAL
  1049. select DM
  1050. select DM_SERIAL
  1051. select DM_MMC
  1052. select DM_GPIO
  1053. config TARGET_LS2080A_EMU
  1054. bool "Support ls2080a_emu"
  1055. select ARCH_LS2080A
  1056. select ARM64
  1057. select ARMV8_MULTIENTRY
  1058. select FSL_DDR_SYNC_REFRESH
  1059. help
  1060. Support for Freescale LS2080A_EMU platform.
  1061. The LS2080A Development System (EMULATOR) is a pre-silicon
  1062. development platform that supports the QorIQ LS2080A
  1063. Layerscape Architecture processor.
  1064. config TARGET_LS1088AQDS
  1065. bool "Support ls1088aqds"
  1066. select ARCH_LS1088A
  1067. select ARM64
  1068. select ARMV8_MULTIENTRY
  1069. select ARCH_SUPPORT_TFABOOT
  1070. select BOARD_LATE_INIT
  1071. select SUPPORT_SPL
  1072. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1073. help
  1074. Support for NXP LS1088AQDS platform.
  1075. The LS1088A Development System (QDS) is a high-performance
  1076. development platform that supports the QorIQ LS1088A
  1077. Layerscape Architecture processor.
  1078. config TARGET_LS2080AQDS
  1079. bool "Support ls2080aqds"
  1080. select ARCH_LS2080A
  1081. select ARM64
  1082. select ARMV8_MULTIENTRY
  1083. select ARCH_SUPPORT_TFABOOT
  1084. select BOARD_LATE_INIT
  1085. select SUPPORT_SPL
  1086. imply SCSI
  1087. imply SCSI_AHCI
  1088. select FSL_DDR_BIST
  1089. select FSL_DDR_INTERACTIVE if !SPL
  1090. help
  1091. Support for Freescale LS2080AQDS platform.
  1092. The LS2080A Development System (QDS) is a high-performance
  1093. development platform that supports the QorIQ LS2080A
  1094. Layerscape Architecture processor.
  1095. config TARGET_LS2080ARDB
  1096. bool "Support ls2080ardb"
  1097. select ARCH_LS2080A
  1098. select ARM64
  1099. select ARMV8_MULTIENTRY
  1100. select ARCH_SUPPORT_TFABOOT
  1101. select BOARD_LATE_INIT
  1102. select SUPPORT_SPL
  1103. select FSL_DDR_BIST
  1104. select FSL_DDR_INTERACTIVE if !SPL
  1105. imply SCSI
  1106. imply SCSI_AHCI
  1107. help
  1108. Support for Freescale LS2080ARDB platform.
  1109. The LS2080A Reference design board (RDB) is a high-performance
  1110. development platform that supports the QorIQ LS2080A
  1111. Layerscape Architecture processor.
  1112. config TARGET_LS2081ARDB
  1113. bool "Support ls2081ardb"
  1114. select ARCH_LS2080A
  1115. select ARM64
  1116. select ARMV8_MULTIENTRY
  1117. select BOARD_LATE_INIT
  1118. select SUPPORT_SPL
  1119. help
  1120. Support for Freescale LS2081ARDB platform.
  1121. The LS2081A Reference design board (RDB) is a high-performance
  1122. development platform that supports the QorIQ LS2081A/LS2041A
  1123. Layerscape Architecture processor.
  1124. config TARGET_LX2160ARDB
  1125. bool "Support lx2160ardb"
  1126. select ARCH_LX2160A
  1127. select ARM64
  1128. select ARMV8_MULTIENTRY
  1129. select ARCH_SUPPORT_TFABOOT
  1130. select BOARD_LATE_INIT
  1131. help
  1132. Support for NXP LX2160ARDB platform.
  1133. The lx2160ardb (LX2160A Reference design board (RDB)
  1134. is a high-performance development platform that supports the
  1135. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1136. config TARGET_LX2160AQDS
  1137. bool "Support lx2160aqds"
  1138. select ARCH_LX2160A
  1139. select ARM64
  1140. select ARMV8_MULTIENTRY
  1141. select ARCH_SUPPORT_TFABOOT
  1142. select BOARD_LATE_INIT
  1143. help
  1144. Support for NXP LX2160AQDS platform.
  1145. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1146. is a high-performance development platform that supports the
  1147. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1148. config TARGET_LX2162AQDS
  1149. bool "Support lx2162aqds"
  1150. select ARCH_LX2162A
  1151. select ARCH_MISC_INIT
  1152. select ARM64
  1153. select ARMV8_MULTIENTRY
  1154. select ARCH_SUPPORT_TFABOOT
  1155. select BOARD_LATE_INIT
  1156. help
  1157. Support for NXP LX2162AQDS platform.
  1158. The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
  1159. config TARGET_HIKEY
  1160. bool "Support HiKey 96boards Consumer Edition Platform"
  1161. select ARM64
  1162. select DM
  1163. select DM_GPIO
  1164. select DM_SERIAL
  1165. select OF_CONTROL
  1166. select PL01X_SERIAL
  1167. select SPECIFY_CONSOLE_INDEX
  1168. imply CMD_DM
  1169. help
  1170. Support for HiKey 96boards platform. It features a HI6220
  1171. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1172. config TARGET_HIKEY960
  1173. bool "Support HiKey960 96boards Consumer Edition Platform"
  1174. select ARM64
  1175. select DM
  1176. select DM_SERIAL
  1177. select OF_CONTROL
  1178. select PL01X_SERIAL
  1179. imply CMD_DM
  1180. help
  1181. Support for HiKey960 96boards platform. It features a HI3660
  1182. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1183. config TARGET_POPLAR
  1184. bool "Support Poplar 96boards Enterprise Edition Platform"
  1185. select ARM64
  1186. select DM
  1187. select DM_SERIAL
  1188. select DM_USB
  1189. select OF_CONTROL
  1190. select PL01X_SERIAL
  1191. imply CMD_DM
  1192. help
  1193. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1194. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1195. making it capable of running any commercial set-top solution based on
  1196. Linux or Android.
  1197. config TARGET_LS1012AQDS
  1198. bool "Support ls1012aqds"
  1199. select ARCH_LS1012A
  1200. select ARM64
  1201. select ARCH_SUPPORT_TFABOOT
  1202. select BOARD_LATE_INIT
  1203. help
  1204. Support for Freescale LS1012AQDS platform.
  1205. The LS1012A Development System (QDS) is a high-performance
  1206. development platform that supports the QorIQ LS1012A
  1207. Layerscape Architecture processor.
  1208. config TARGET_LS1012ARDB
  1209. bool "Support ls1012ardb"
  1210. select ARCH_LS1012A
  1211. select ARM64
  1212. select ARCH_SUPPORT_TFABOOT
  1213. select BOARD_LATE_INIT
  1214. imply SCSI
  1215. imply SCSI_AHCI
  1216. help
  1217. Support for Freescale LS1012ARDB platform.
  1218. The LS1012A Reference design board (RDB) is a high-performance
  1219. development platform that supports the QorIQ LS1012A
  1220. Layerscape Architecture processor.
  1221. config TARGET_LS1012A2G5RDB
  1222. bool "Support ls1012a2g5rdb"
  1223. select ARCH_LS1012A
  1224. select ARM64
  1225. select ARCH_SUPPORT_TFABOOT
  1226. select BOARD_LATE_INIT
  1227. imply SCSI
  1228. help
  1229. Support for Freescale LS1012A2G5RDB platform.
  1230. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1231. development platform that supports the QorIQ LS1012A
  1232. Layerscape Architecture processor.
  1233. config TARGET_LS1012AFRWY
  1234. bool "Support ls1012afrwy"
  1235. select ARCH_LS1012A
  1236. select ARM64
  1237. select ARCH_SUPPORT_TFABOOT
  1238. select BOARD_LATE_INIT
  1239. imply SCSI
  1240. imply SCSI_AHCI
  1241. help
  1242. Support for Freescale LS1012AFRWY platform.
  1243. The LS1012A FRWY board (FRWY) is a high-performance
  1244. development platform that supports the QorIQ LS1012A
  1245. Layerscape Architecture processor.
  1246. config TARGET_LS1012AFRDM
  1247. bool "Support ls1012afrdm"
  1248. select ARCH_LS1012A
  1249. select ARM64
  1250. select ARCH_SUPPORT_TFABOOT
  1251. help
  1252. Support for Freescale LS1012AFRDM platform.
  1253. The LS1012A Freedom board (FRDM) is a high-performance
  1254. development platform that supports the QorIQ LS1012A
  1255. Layerscape Architecture processor.
  1256. config TARGET_LS1028AQDS
  1257. bool "Support ls1028aqds"
  1258. select ARCH_LS1028A
  1259. select ARM64
  1260. select ARMV8_MULTIENTRY
  1261. select ARCH_SUPPORT_TFABOOT
  1262. select BOARD_LATE_INIT
  1263. help
  1264. Support for Freescale LS1028AQDS platform
  1265. The LS1028A Development System (QDS) is a high-performance
  1266. development platform that supports the QorIQ LS1028A
  1267. Layerscape Architecture processor.
  1268. config TARGET_LS1028ARDB
  1269. bool "Support ls1028ardb"
  1270. select ARCH_LS1028A
  1271. select ARM64
  1272. select ARMV8_MULTIENTRY
  1273. select ARCH_SUPPORT_TFABOOT
  1274. select BOARD_LATE_INIT
  1275. help
  1276. Support for Freescale LS1028ARDB platform
  1277. The LS1028A Development System (RDB) is a high-performance
  1278. development platform that supports the QorIQ LS1028A
  1279. Layerscape Architecture processor.
  1280. config TARGET_LS1088ARDB
  1281. bool "Support ls1088ardb"
  1282. select ARCH_LS1088A
  1283. select ARM64
  1284. select ARMV8_MULTIENTRY
  1285. select ARCH_SUPPORT_TFABOOT
  1286. select BOARD_LATE_INIT
  1287. select SUPPORT_SPL
  1288. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1289. help
  1290. Support for NXP LS1088ARDB platform.
  1291. The LS1088A Reference design board (RDB) is a high-performance
  1292. development platform that supports the QorIQ LS1088A
  1293. Layerscape Architecture processor.
  1294. config TARGET_LS1021AQDS
  1295. bool "Support ls1021aqds"
  1296. select ARCH_LS1021A
  1297. select ARCH_SUPPORT_PSCI
  1298. select BOARD_EARLY_INIT_F
  1299. select BOARD_LATE_INIT
  1300. select CPU_V7A
  1301. select CPU_V7_HAS_NONSEC
  1302. select CPU_V7_HAS_VIRT
  1303. select LS1_DEEP_SLEEP
  1304. select SUPPORT_SPL
  1305. select SYS_FSL_DDR
  1306. select FSL_DDR_INTERACTIVE
  1307. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1308. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1309. imply SCSI
  1310. config TARGET_LS1021ATWR
  1311. bool "Support ls1021atwr"
  1312. select ARCH_LS1021A
  1313. select ARCH_SUPPORT_PSCI
  1314. select BOARD_EARLY_INIT_F
  1315. select BOARD_LATE_INIT
  1316. select CPU_V7A
  1317. select CPU_V7_HAS_NONSEC
  1318. select CPU_V7_HAS_VIRT
  1319. select LS1_DEEP_SLEEP
  1320. select SUPPORT_SPL
  1321. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1322. imply SCSI
  1323. config TARGET_LS1021ATSN
  1324. bool "Support ls1021atsn"
  1325. select ARCH_LS1021A
  1326. select ARCH_SUPPORT_PSCI
  1327. select BOARD_EARLY_INIT_F
  1328. select BOARD_LATE_INIT
  1329. select CPU_V7A
  1330. select CPU_V7_HAS_NONSEC
  1331. select CPU_V7_HAS_VIRT
  1332. select LS1_DEEP_SLEEP
  1333. select SUPPORT_SPL
  1334. imply SCSI
  1335. config TARGET_LS1021AIOT
  1336. bool "Support ls1021aiot"
  1337. select ARCH_LS1021A
  1338. select ARCH_SUPPORT_PSCI
  1339. select BOARD_LATE_INIT
  1340. select CPU_V7A
  1341. select CPU_V7_HAS_NONSEC
  1342. select CPU_V7_HAS_VIRT
  1343. select SUPPORT_SPL
  1344. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1345. imply SCSI
  1346. help
  1347. Support for Freescale LS1021AIOT platform.
  1348. The LS1021A Freescale board (IOT) is a high-performance
  1349. development platform that supports the QorIQ LS1021A
  1350. Layerscape Architecture processor.
  1351. config TARGET_LS1043AQDS
  1352. bool "Support ls1043aqds"
  1353. select ARCH_LS1043A
  1354. select ARM64
  1355. select ARMV8_MULTIENTRY
  1356. select ARCH_SUPPORT_TFABOOT
  1357. select BOARD_EARLY_INIT_F
  1358. select BOARD_LATE_INIT
  1359. select SUPPORT_SPL
  1360. select FSL_DDR_INTERACTIVE if !SPL
  1361. select FSL_DSPI if !SPL_NO_DSPI
  1362. select DM_SPI_FLASH if FSL_DSPI
  1363. imply SCSI
  1364. imply SCSI_AHCI
  1365. help
  1366. Support for Freescale LS1043AQDS platform.
  1367. config TARGET_LS1043ARDB
  1368. bool "Support ls1043ardb"
  1369. select ARCH_LS1043A
  1370. select ARM64
  1371. select ARMV8_MULTIENTRY
  1372. select ARCH_SUPPORT_TFABOOT
  1373. select BOARD_EARLY_INIT_F
  1374. select BOARD_LATE_INIT
  1375. select SUPPORT_SPL
  1376. select FSL_DSPI if !SPL_NO_DSPI
  1377. select DM_SPI_FLASH if FSL_DSPI
  1378. help
  1379. Support for Freescale LS1043ARDB platform.
  1380. config TARGET_LS1046AQDS
  1381. bool "Support ls1046aqds"
  1382. select ARCH_LS1046A
  1383. select ARM64
  1384. select ARMV8_MULTIENTRY
  1385. select ARCH_SUPPORT_TFABOOT
  1386. select BOARD_EARLY_INIT_F
  1387. select BOARD_LATE_INIT
  1388. select DM_SPI_FLASH if DM_SPI
  1389. select SUPPORT_SPL
  1390. select FSL_DDR_BIST if !SPL
  1391. select FSL_DDR_INTERACTIVE if !SPL
  1392. select FSL_DDR_INTERACTIVE if !SPL
  1393. imply SCSI
  1394. help
  1395. Support for Freescale LS1046AQDS platform.
  1396. The LS1046A Development System (QDS) is a high-performance
  1397. development platform that supports the QorIQ LS1046A
  1398. Layerscape Architecture processor.
  1399. config TARGET_LS1046ARDB
  1400. bool "Support ls1046ardb"
  1401. select ARCH_LS1046A
  1402. select ARM64
  1403. select ARMV8_MULTIENTRY
  1404. select ARCH_SUPPORT_TFABOOT
  1405. select BOARD_EARLY_INIT_F
  1406. select BOARD_LATE_INIT
  1407. select DM_SPI_FLASH if DM_SPI
  1408. select POWER_MC34VR500
  1409. select SUPPORT_SPL
  1410. select FSL_DDR_BIST
  1411. select FSL_DDR_INTERACTIVE if !SPL
  1412. imply SCSI
  1413. help
  1414. Support for Freescale LS1046ARDB platform.
  1415. The LS1046A Reference Design Board (RDB) is a high-performance
  1416. development platform that supports the QorIQ LS1046A
  1417. Layerscape Architecture processor.
  1418. config TARGET_LS1046AFRWY
  1419. bool "Support ls1046afrwy"
  1420. select ARCH_LS1046A
  1421. select ARM64
  1422. select ARMV8_MULTIENTRY
  1423. select ARCH_SUPPORT_TFABOOT
  1424. select BOARD_EARLY_INIT_F
  1425. select BOARD_LATE_INIT
  1426. select DM_SPI_FLASH if DM_SPI
  1427. imply SCSI
  1428. help
  1429. Support for Freescale LS1046AFRWY platform.
  1430. The LS1046A Freeway Board (FRWY) is a high-performance
  1431. development platform that supports the QorIQ LS1046A
  1432. Layerscape Architecture processor.
  1433. config TARGET_SL28
  1434. bool "Support sl28"
  1435. select ARCH_LS1028A
  1436. select ARM64
  1437. select ARMV8_MULTIENTRY
  1438. select SUPPORT_SPL
  1439. select BINMAN
  1440. help
  1441. Support for Kontron SMARC-sAL28 board.
  1442. config TARGET_COLIBRI_PXA270
  1443. bool "Support colibri_pxa270"
  1444. select CPU_PXA
  1445. config ARCH_UNIPHIER
  1446. bool "Socionext UniPhier SoCs"
  1447. select BOARD_LATE_INIT
  1448. select DM
  1449. select DM_ETH
  1450. select DM_GPIO
  1451. select DM_I2C
  1452. select DM_MMC
  1453. select DM_MTD
  1454. select DM_RESET
  1455. select DM_SERIAL
  1456. select DM_USB
  1457. select OF_BOARD_SETUP
  1458. select OF_CONTROL
  1459. select OF_LIBFDT
  1460. select PINCTRL
  1461. select SPL_BOARD_INIT if SPL
  1462. select SPL_DM if SPL
  1463. select SPL_LIBCOMMON_SUPPORT if SPL
  1464. select SPL_LIBGENERIC_SUPPORT if SPL
  1465. select SPL_OF_CONTROL if SPL
  1466. select SPL_PINCTRL if SPL
  1467. select SUPPORT_SPL
  1468. imply CMD_DM
  1469. imply DISTRO_DEFAULTS
  1470. imply FAT_WRITE
  1471. help
  1472. Support for UniPhier SoC family developed by Socionext Inc.
  1473. (formerly, System LSI Business Division of Panasonic Corporation)
  1474. config ARCH_STM32
  1475. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1476. select CPU_V7M
  1477. select DM
  1478. select DM_SERIAL
  1479. imply CMD_DM
  1480. config ARCH_STI
  1481. bool "Support STMicrolectronics SoCs"
  1482. select BLK
  1483. select CPU_V7A
  1484. select DM
  1485. select DM_MMC
  1486. select DM_RESET
  1487. select DM_SERIAL
  1488. imply CMD_DM
  1489. help
  1490. Support for STMicroelectronics STiH407/10 SoC family.
  1491. This SoC is used on Linaro 96Board STiH410-B2260
  1492. config ARCH_STM32MP
  1493. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1494. select ARCH_MISC_INIT
  1495. select ARCH_SUPPORT_TFABOOT
  1496. select BOARD_LATE_INIT
  1497. select CLK
  1498. select DM
  1499. select DM_GPIO
  1500. select DM_RESET
  1501. select DM_SERIAL
  1502. select MISC
  1503. select OF_CONTROL
  1504. select OF_LIBFDT
  1505. select OF_SYSTEM_SETUP
  1506. select PINCTRL
  1507. select REGMAP
  1508. select SUPPORT_SPL
  1509. select SYSCON
  1510. select SYSRESET
  1511. select SYS_THUMB_BUILD
  1512. imply SPL_SYSRESET
  1513. imply CMD_DM
  1514. imply CMD_POWEROFF
  1515. imply OF_LIBFDT_OVERLAY
  1516. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1517. imply USE_PREBOOT
  1518. help
  1519. Support for STM32MP SoC family developed by STMicroelectronics,
  1520. MPUs based on ARM cortex A core
  1521. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1522. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1523. chain.
  1524. SPL is the unsecure FSBL for the basic boot chain.
  1525. config ARCH_ROCKCHIP
  1526. bool "Support Rockchip SoCs"
  1527. select BLK
  1528. select BINMAN if SPL_OPTEE
  1529. select DM
  1530. select DM_GPIO
  1531. select DM_I2C
  1532. select DM_MMC
  1533. select DM_PWM
  1534. select DM_REGULATOR
  1535. select DM_SERIAL
  1536. select DM_SPI
  1537. select DM_SPI_FLASH
  1538. select DM_USB if USB
  1539. select ENABLE_ARM_SOC_BOOT0_HOOK
  1540. select OF_CONTROL
  1541. select SPI
  1542. select SPL_DM if SPL
  1543. select SPL_DM_SPI if SPL
  1544. select SPL_DM_SPI_FLASH if SPL
  1545. select SYS_MALLOC_F
  1546. select SYS_THUMB_BUILD if !ARM64
  1547. imply ADC
  1548. imply CMD_DM
  1549. imply DEBUG_UART_BOARD_INIT
  1550. imply DISTRO_DEFAULTS
  1551. imply FAT_WRITE
  1552. imply SARADC_ROCKCHIP
  1553. imply SPL_SYSRESET
  1554. imply SPL_SYS_MALLOC_SIMPLE
  1555. imply SYS_NS16550
  1556. imply TPL_SYSRESET
  1557. imply USB_FUNCTION_FASTBOOT
  1558. config ARCH_OCTEONTX
  1559. bool "Support OcteonTX SoCs"
  1560. select CLK
  1561. select DM
  1562. select ARM64
  1563. select OF_CONTROL
  1564. select OF_LIVE
  1565. select BOARD_LATE_INIT
  1566. select SYS_CACHE_SHIFT_7
  1567. config ARCH_OCTEONTX2
  1568. bool "Support OcteonTX2 SoCs"
  1569. select CLK
  1570. select DM
  1571. select ARM64
  1572. select OF_CONTROL
  1573. select OF_LIVE
  1574. select BOARD_LATE_INIT
  1575. select SYS_CACHE_SHIFT_7
  1576. config TARGET_THUNDERX_88XX
  1577. bool "Support ThunderX 88xx"
  1578. select ARM64
  1579. select OF_CONTROL
  1580. select PL01X_SERIAL
  1581. select SYS_CACHE_SHIFT_7
  1582. config ARCH_ASPEED
  1583. bool "Support Aspeed SoCs"
  1584. select DM
  1585. select OF_CONTROL
  1586. imply CMD_DM
  1587. config TARGET_DURIAN
  1588. bool "Support Phytium Durian Platform"
  1589. select ARM64
  1590. help
  1591. Support for durian platform.
  1592. It has 2GB Sdram, uart and pcie.
  1593. config TARGET_PRESIDIO_ASIC
  1594. bool "Support Cortina Presidio ASIC Platform"
  1595. select ARM64
  1596. config TARGET_XENGUEST_ARM64
  1597. bool "Xen guest ARM64"
  1598. select ARM64
  1599. select XEN
  1600. select OF_CONTROL
  1601. select LINUX_KERNEL_IMAGE_HEADER
  1602. select XEN_SERIAL
  1603. select SSCANF
  1604. endchoice
  1605. config ARCH_SUPPORT_TFABOOT
  1606. bool
  1607. config TFABOOT
  1608. bool "Support for booting from TF-A"
  1609. depends on ARCH_SUPPORT_TFABOOT
  1610. default n
  1611. help
  1612. Some platforms support the setup of secure registers (for instance
  1613. for CPU errata handling) or provide secure services like PSCI.
  1614. Those services could also be provided by other firmware parts
  1615. like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
  1616. does not need to (and cannot) execute this code.
  1617. Enabling this option will make a U-Boot binary that is relying
  1618. on other firmware layers to provide secure functionality.
  1619. config TI_SECURE_DEVICE
  1620. bool "HS Device Type Support"
  1621. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1622. help
  1623. If a high secure (HS) device type is being used, this config
  1624. must be set. This option impacts various aspects of the
  1625. build system (to create signed boot images that can be
  1626. authenticated) and the code. See the doc/README.ti-secure
  1627. file for further details.
  1628. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1629. config ISW_ENTRY_ADDR
  1630. hex "Address in memory or XIP address of bootloader entry point"
  1631. default 0x402F4000 if AM43XX
  1632. default 0x402F0400 if AM33XX
  1633. default 0x40301350 if OMAP54XX
  1634. help
  1635. After any reset, the boot ROM searches the boot media for a valid
  1636. boot image. For non-XIP devices, the ROM then copies the image into
  1637. internal memory. For all boot modes, after the ROM processes the
  1638. boot image it eventually computes the entry point address depending
  1639. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1640. image headers.
  1641. endif
  1642. source "arch/arm/mach-aspeed/Kconfig"
  1643. source "arch/arm/mach-at91/Kconfig"
  1644. source "arch/arm/mach-bcm283x/Kconfig"
  1645. source "arch/arm/mach-bcmstb/Kconfig"
  1646. source "arch/arm/mach-davinci/Kconfig"
  1647. source "arch/arm/mach-exynos/Kconfig"
  1648. source "arch/arm/mach-highbank/Kconfig"
  1649. source "arch/arm/mach-integrator/Kconfig"
  1650. source "arch/arm/mach-ipq40xx/Kconfig"
  1651. source "arch/arm/mach-k3/Kconfig"
  1652. source "arch/arm/mach-keystone/Kconfig"
  1653. source "arch/arm/mach-kirkwood/Kconfig"
  1654. source "arch/arm/mach-lpc32xx/Kconfig"
  1655. source "arch/arm/mach-mvebu/Kconfig"
  1656. source "arch/arm/mach-octeontx/Kconfig"
  1657. source "arch/arm/mach-octeontx2/Kconfig"
  1658. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1659. source "arch/arm/mach-imx/mx2/Kconfig"
  1660. source "arch/arm/mach-imx/mx3/Kconfig"
  1661. source "arch/arm/mach-imx/mx5/Kconfig"
  1662. source "arch/arm/mach-imx/mx6/Kconfig"
  1663. source "arch/arm/mach-imx/mx7/Kconfig"
  1664. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1665. source "arch/arm/mach-imx/imx8/Kconfig"
  1666. source "arch/arm/mach-imx/imx8m/Kconfig"
  1667. source "arch/arm/mach-imx/imxrt/Kconfig"
  1668. source "arch/arm/mach-imx/mxs/Kconfig"
  1669. source "arch/arm/mach-omap2/Kconfig"
  1670. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1671. source "arch/arm/mach-orion5x/Kconfig"
  1672. source "arch/arm/mach-owl/Kconfig"
  1673. source "arch/arm/mach-rmobile/Kconfig"
  1674. source "arch/arm/mach-meson/Kconfig"
  1675. source "arch/arm/mach-mediatek/Kconfig"
  1676. source "arch/arm/mach-qemu/Kconfig"
  1677. source "arch/arm/mach-rockchip/Kconfig"
  1678. source "arch/arm/mach-s5pc1xx/Kconfig"
  1679. source "arch/arm/mach-snapdragon/Kconfig"
  1680. source "arch/arm/mach-socfpga/Kconfig"
  1681. source "arch/arm/mach-sti/Kconfig"
  1682. source "arch/arm/mach-stm32/Kconfig"
  1683. source "arch/arm/mach-stm32mp/Kconfig"
  1684. source "arch/arm/mach-sunxi/Kconfig"
  1685. source "arch/arm/mach-tegra/Kconfig"
  1686. source "arch/arm/mach-u8500/Kconfig"
  1687. source "arch/arm/mach-uniphier/Kconfig"
  1688. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1689. source "arch/arm/mach-zynq/Kconfig"
  1690. source "arch/arm/mach-zynqmp/Kconfig"
  1691. source "arch/arm/mach-versal/Kconfig"
  1692. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1693. source "arch/arm/cpu/armv7/Kconfig"
  1694. source "arch/arm/cpu/armv8/Kconfig"
  1695. source "arch/arm/mach-imx/Kconfig"
  1696. source "arch/arm/mach-nexell/Kconfig"
  1697. source "board/armltd/total_compute/Kconfig"
  1698. source "board/bosch/shc/Kconfig"
  1699. source "board/bosch/guardian/Kconfig"
  1700. source "board/CarMediaLab/flea3/Kconfig"
  1701. source "board/Marvell/aspenite/Kconfig"
  1702. source "board/Marvell/gplugd/Kconfig"
  1703. source "board/Marvell/octeontx/Kconfig"
  1704. source "board/Marvell/octeontx2/Kconfig"
  1705. source "board/armltd/vexpress/Kconfig"
  1706. source "board/armltd/vexpress64/Kconfig"
  1707. source "board/cortina/presidio-asic/Kconfig"
  1708. source "board/broadcom/bcm23550_w1d/Kconfig"
  1709. source "board/broadcom/bcm28155_ap/Kconfig"
  1710. source "board/broadcom/bcm963158/Kconfig"
  1711. source "board/broadcom/bcm968360bg/Kconfig"
  1712. source "board/broadcom/bcm968580xref/Kconfig"
  1713. source "board/broadcom/bcmcygnus/Kconfig"
  1714. source "board/broadcom/bcmnsp/Kconfig"
  1715. source "board/broadcom/bcmns2/Kconfig"
  1716. source "board/broadcom/bcmns3/Kconfig"
  1717. source "board/cavium/thunderx/Kconfig"
  1718. source "board/cirrus/edb93xx/Kconfig"
  1719. source "board/eets/pdu001/Kconfig"
  1720. source "board/emulation/qemu-arm/Kconfig"
  1721. source "board/freescale/ls2080aqds/Kconfig"
  1722. source "board/freescale/ls2080ardb/Kconfig"
  1723. source "board/freescale/ls1088a/Kconfig"
  1724. source "board/freescale/ls1028a/Kconfig"
  1725. source "board/freescale/ls1021aqds/Kconfig"
  1726. source "board/freescale/ls1043aqds/Kconfig"
  1727. source "board/freescale/ls1021atwr/Kconfig"
  1728. source "board/freescale/ls1021atsn/Kconfig"
  1729. source "board/freescale/ls1021aiot/Kconfig"
  1730. source "board/freescale/ls1046aqds/Kconfig"
  1731. source "board/freescale/ls1043ardb/Kconfig"
  1732. source "board/freescale/ls1046ardb/Kconfig"
  1733. source "board/freescale/ls1046afrwy/Kconfig"
  1734. source "board/freescale/ls1012aqds/Kconfig"
  1735. source "board/freescale/ls1012ardb/Kconfig"
  1736. source "board/freescale/ls1012afrdm/Kconfig"
  1737. source "board/freescale/lx2160a/Kconfig"
  1738. source "board/freescale/s32v234evb/Kconfig"
  1739. source "board/grinn/chiliboard/Kconfig"
  1740. source "board/hisilicon/hikey/Kconfig"
  1741. source "board/hisilicon/hikey960/Kconfig"
  1742. source "board/hisilicon/poplar/Kconfig"
  1743. source "board/isee/igep003x/Kconfig"
  1744. source "board/kontron/sl28/Kconfig"
  1745. source "board/myir/mys_6ulx/Kconfig"
  1746. source "board/spear/spear300/Kconfig"
  1747. source "board/spear/spear310/Kconfig"
  1748. source "board/spear/spear320/Kconfig"
  1749. source "board/spear/spear600/Kconfig"
  1750. source "board/spear/x600/Kconfig"
  1751. source "board/st/stv0991/Kconfig"
  1752. source "board/tcl/sl50/Kconfig"
  1753. source "board/toradex/colibri_pxa270/Kconfig"
  1754. source "board/variscite/dart_6ul/Kconfig"
  1755. source "board/vscom/baltos/Kconfig"
  1756. source "board/phytium/durian/Kconfig"
  1757. source "board/xen/xenguest_arm64/Kconfig"
  1758. source "arch/arm/Kconfig.debug"
  1759. endmenu
  1760. config SPL_LDSCRIPT
  1761. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1762. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1763. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64