stm32.h 2.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #ifndef _MACH_STM32_H_
  6. #define _MACH_STM32_H_
  7. /*
  8. * Peripheral memory map
  9. * only address used before device tree parsing
  10. */
  11. #define STM32_RCC_BASE 0x50000000
  12. #define STM32_PWR_BASE 0x50001000
  13. #define STM32_DBGMCU_BASE 0x50081000
  14. #define STM32_TZC_BASE 0x5C006000
  15. #define STM32_ETZPC_BASE 0x5C007000
  16. #define STM32_TAMP_BASE 0x5C00A000
  17. #define STM32_SYSRAM_BASE 0x2FFC0000
  18. #define STM32_SYSRAM_SIZE SZ_256K
  19. #define STM32_DDR_BASE 0xC0000000
  20. #define STM32_DDR_SIZE SZ_1G
  21. #ifndef __ASSEMBLY__
  22. /* enumerated used to identify the SYSCON driver instance */
  23. enum {
  24. STM32MP_SYSCON_UNKNOWN,
  25. STM32MP_SYSCON_STGEN,
  26. };
  27. /*
  28. * enumerated for boot interface from Bootrom, used in TAMP_BOOT_CONTEXT
  29. * - boot device = bit 8:4
  30. * - boot instance = bit 3:0
  31. */
  32. #define BOOT_TYPE_MASK 0xF0
  33. #define BOOT_TYPE_SHIFT 4
  34. #define BOOT_INSTANCE_MASK 0x0F
  35. #define BOOT_INSTANCE_SHIFT 0
  36. enum boot_device {
  37. BOOT_FLASH_SD = 0x10,
  38. BOOT_FLASH_SD_1 = 0x11,
  39. BOOT_FLASH_SD_2 = 0x12,
  40. BOOT_FLASH_SD_3 = 0x13,
  41. BOOT_FLASH_EMMC = 0x20,
  42. BOOT_FLASH_EMMC_1 = 0x21,
  43. BOOT_FLASH_EMMC_2 = 0x22,
  44. BOOT_FLASH_EMMC_3 = 0x23,
  45. BOOT_FLASH_NAND = 0x30,
  46. BOOT_FLASH_NAND_FMC = 0x31,
  47. BOOT_FLASH_NOR = 0x40,
  48. BOOT_FLASH_NOR_QSPI = 0x41,
  49. BOOT_SERIAL_UART = 0x50,
  50. BOOT_SERIAL_UART_1 = 0x51,
  51. BOOT_SERIAL_UART_2 = 0x52,
  52. BOOT_SERIAL_UART_3 = 0x53,
  53. BOOT_SERIAL_UART_4 = 0x54,
  54. BOOT_SERIAL_UART_5 = 0x55,
  55. BOOT_SERIAL_UART_6 = 0x56,
  56. BOOT_SERIAL_UART_7 = 0x57,
  57. BOOT_SERIAL_UART_8 = 0x58,
  58. BOOT_SERIAL_USB = 0x60,
  59. BOOT_SERIAL_USB_OTG = 0x62,
  60. };
  61. /* TAMP registers */
  62. #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
  63. #define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(20)
  64. #define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
  65. #define TAMP_BOOT_MODE_SHIFT 8
  66. #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
  67. #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
  68. #endif /* __ASSEMBLY__*/
  69. #endif /* _MACH_STM32_H_ */