thunderx-88xx.dtsi 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR X11
  2. /*
  3. * Cavium Thunder DTS file - Thunder SoC description
  4. *
  5. * Copyright (C) 2014, Cavium Inc.
  6. *
  7. */
  8. / {
  9. compatible = "cavium,thunder-88xx";
  10. interrupt-parent = <&gic0>;
  11. #address-cells = <2>;
  12. #size-cells = <2>;
  13. psci {
  14. compatible = "arm,psci-0.2";
  15. method = "smc";
  16. };
  17. cpus {
  18. #address-cells = <2>;
  19. #size-cells = <0>;
  20. cpu@000 {
  21. device_type = "cpu";
  22. compatible = "cavium,thunder", "arm,armv8";
  23. reg = <0x0 0x000>;
  24. enable-method = "psci";
  25. };
  26. cpu@001 {
  27. device_type = "cpu";
  28. compatible = "cavium,thunder", "arm,armv8";
  29. reg = <0x0 0x001>;
  30. enable-method = "psci";
  31. };
  32. cpu@002 {
  33. device_type = "cpu";
  34. compatible = "cavium,thunder", "arm,armv8";
  35. reg = <0x0 0x002>;
  36. enable-method = "psci";
  37. };
  38. cpu@003 {
  39. device_type = "cpu";
  40. compatible = "cavium,thunder", "arm,armv8";
  41. reg = <0x0 0x003>;
  42. enable-method = "psci";
  43. };
  44. cpu@004 {
  45. device_type = "cpu";
  46. compatible = "cavium,thunder", "arm,armv8";
  47. reg = <0x0 0x004>;
  48. enable-method = "psci";
  49. };
  50. cpu@005 {
  51. device_type = "cpu";
  52. compatible = "cavium,thunder", "arm,armv8";
  53. reg = <0x0 0x005>;
  54. enable-method = "psci";
  55. };
  56. cpu@006 {
  57. device_type = "cpu";
  58. compatible = "cavium,thunder", "arm,armv8";
  59. reg = <0x0 0x006>;
  60. enable-method = "psci";
  61. };
  62. cpu@007 {
  63. device_type = "cpu";
  64. compatible = "cavium,thunder", "arm,armv8";
  65. reg = <0x0 0x007>;
  66. enable-method = "psci";
  67. };
  68. cpu@008 {
  69. device_type = "cpu";
  70. compatible = "cavium,thunder", "arm,armv8";
  71. reg = <0x0 0x008>;
  72. enable-method = "psci";
  73. };
  74. cpu@009 {
  75. device_type = "cpu";
  76. compatible = "cavium,thunder", "arm,armv8";
  77. reg = <0x0 0x009>;
  78. enable-method = "psci";
  79. };
  80. cpu@00a {
  81. device_type = "cpu";
  82. compatible = "cavium,thunder", "arm,armv8";
  83. reg = <0x0 0x00a>;
  84. enable-method = "psci";
  85. };
  86. cpu@00b {
  87. device_type = "cpu";
  88. compatible = "cavium,thunder", "arm,armv8";
  89. reg = <0x0 0x00b>;
  90. enable-method = "psci";
  91. };
  92. cpu@00c {
  93. device_type = "cpu";
  94. compatible = "cavium,thunder", "arm,armv8";
  95. reg = <0x0 0x00c>;
  96. enable-method = "psci";
  97. };
  98. cpu@00d {
  99. device_type = "cpu";
  100. compatible = "cavium,thunder", "arm,armv8";
  101. reg = <0x0 0x00d>;
  102. enable-method = "psci";
  103. };
  104. cpu@00e {
  105. device_type = "cpu";
  106. compatible = "cavium,thunder", "arm,armv8";
  107. reg = <0x0 0x00e>;
  108. enable-method = "psci";
  109. };
  110. cpu@00f {
  111. device_type = "cpu";
  112. compatible = "cavium,thunder", "arm,armv8";
  113. reg = <0x0 0x00f>;
  114. enable-method = "psci";
  115. };
  116. cpu@100 {
  117. device_type = "cpu";
  118. compatible = "cavium,thunder", "arm,armv8";
  119. reg = <0x0 0x100>;
  120. enable-method = "psci";
  121. };
  122. cpu@101 {
  123. device_type = "cpu";
  124. compatible = "cavium,thunder", "arm,armv8";
  125. reg = <0x0 0x101>;
  126. enable-method = "psci";
  127. };
  128. cpu@102 {
  129. device_type = "cpu";
  130. compatible = "cavium,thunder", "arm,armv8";
  131. reg = <0x0 0x102>;
  132. enable-method = "psci";
  133. };
  134. cpu@103 {
  135. device_type = "cpu";
  136. compatible = "cavium,thunder", "arm,armv8";
  137. reg = <0x0 0x103>;
  138. enable-method = "psci";
  139. };
  140. cpu@104 {
  141. device_type = "cpu";
  142. compatible = "cavium,thunder", "arm,armv8";
  143. reg = <0x0 0x104>;
  144. enable-method = "psci";
  145. };
  146. cpu@105 {
  147. device_type = "cpu";
  148. compatible = "cavium,thunder", "arm,armv8";
  149. reg = <0x0 0x105>;
  150. enable-method = "psci";
  151. };
  152. cpu@106 {
  153. device_type = "cpu";
  154. compatible = "cavium,thunder", "arm,armv8";
  155. reg = <0x0 0x106>;
  156. enable-method = "psci";
  157. };
  158. cpu@107 {
  159. device_type = "cpu";
  160. compatible = "cavium,thunder", "arm,armv8";
  161. reg = <0x0 0x107>;
  162. enable-method = "psci";
  163. };
  164. cpu@108 {
  165. device_type = "cpu";
  166. compatible = "cavium,thunder", "arm,armv8";
  167. reg = <0x0 0x108>;
  168. enable-method = "psci";
  169. };
  170. cpu@109 {
  171. device_type = "cpu";
  172. compatible = "cavium,thunder", "arm,armv8";
  173. reg = <0x0 0x109>;
  174. enable-method = "psci";
  175. };
  176. cpu@10a {
  177. device_type = "cpu";
  178. compatible = "cavium,thunder", "arm,armv8";
  179. reg = <0x0 0x10a>;
  180. enable-method = "psci";
  181. };
  182. cpu@10b {
  183. device_type = "cpu";
  184. compatible = "cavium,thunder", "arm,armv8";
  185. reg = <0x0 0x10b>;
  186. enable-method = "psci";
  187. };
  188. cpu@10c {
  189. device_type = "cpu";
  190. compatible = "cavium,thunder", "arm,armv8";
  191. reg = <0x0 0x10c>;
  192. enable-method = "psci";
  193. };
  194. cpu@10d {
  195. device_type = "cpu";
  196. compatible = "cavium,thunder", "arm,armv8";
  197. reg = <0x0 0x10d>;
  198. enable-method = "psci";
  199. };
  200. cpu@10e {
  201. device_type = "cpu";
  202. compatible = "cavium,thunder", "arm,armv8";
  203. reg = <0x0 0x10e>;
  204. enable-method = "psci";
  205. };
  206. cpu@10f {
  207. device_type = "cpu";
  208. compatible = "cavium,thunder", "arm,armv8";
  209. reg = <0x0 0x10f>;
  210. enable-method = "psci";
  211. };
  212. cpu@200 {
  213. device_type = "cpu";
  214. compatible = "cavium,thunder", "arm,armv8";
  215. reg = <0x0 0x200>;
  216. enable-method = "psci";
  217. };
  218. cpu@201 {
  219. device_type = "cpu";
  220. compatible = "cavium,thunder", "arm,armv8";
  221. reg = <0x0 0x201>;
  222. enable-method = "psci";
  223. };
  224. cpu@202 {
  225. device_type = "cpu";
  226. compatible = "cavium,thunder", "arm,armv8";
  227. reg = <0x0 0x202>;
  228. enable-method = "psci";
  229. };
  230. cpu@203 {
  231. device_type = "cpu";
  232. compatible = "cavium,thunder", "arm,armv8";
  233. reg = <0x0 0x203>;
  234. enable-method = "psci";
  235. };
  236. cpu@204 {
  237. device_type = "cpu";
  238. compatible = "cavium,thunder", "arm,armv8";
  239. reg = <0x0 0x204>;
  240. enable-method = "psci";
  241. };
  242. cpu@205 {
  243. device_type = "cpu";
  244. compatible = "cavium,thunder", "arm,armv8";
  245. reg = <0x0 0x205>;
  246. enable-method = "psci";
  247. };
  248. cpu@206 {
  249. device_type = "cpu";
  250. compatible = "cavium,thunder", "arm,armv8";
  251. reg = <0x0 0x206>;
  252. enable-method = "psci";
  253. };
  254. cpu@207 {
  255. device_type = "cpu";
  256. compatible = "cavium,thunder", "arm,armv8";
  257. reg = <0x0 0x207>;
  258. enable-method = "psci";
  259. };
  260. cpu@208 {
  261. device_type = "cpu";
  262. compatible = "cavium,thunder", "arm,armv8";
  263. reg = <0x0 0x208>;
  264. enable-method = "psci";
  265. };
  266. cpu@209 {
  267. device_type = "cpu";
  268. compatible = "cavium,thunder", "arm,armv8";
  269. reg = <0x0 0x209>;
  270. enable-method = "psci";
  271. };
  272. cpu@20a {
  273. device_type = "cpu";
  274. compatible = "cavium,thunder", "arm,armv8";
  275. reg = <0x0 0x20a>;
  276. enable-method = "psci";
  277. };
  278. cpu@20b {
  279. device_type = "cpu";
  280. compatible = "cavium,thunder", "arm,armv8";
  281. reg = <0x0 0x20b>;
  282. enable-method = "psci";
  283. };
  284. cpu@20c {
  285. device_type = "cpu";
  286. compatible = "cavium,thunder", "arm,armv8";
  287. reg = <0x0 0x20c>;
  288. enable-method = "psci";
  289. };
  290. cpu@20d {
  291. device_type = "cpu";
  292. compatible = "cavium,thunder", "arm,armv8";
  293. reg = <0x0 0x20d>;
  294. enable-method = "psci";
  295. };
  296. cpu@20e {
  297. device_type = "cpu";
  298. compatible = "cavium,thunder", "arm,armv8";
  299. reg = <0x0 0x20e>;
  300. enable-method = "psci";
  301. };
  302. cpu@20f {
  303. device_type = "cpu";
  304. compatible = "cavium,thunder", "arm,armv8";
  305. reg = <0x0 0x20f>;
  306. enable-method = "psci";
  307. };
  308. };
  309. timer {
  310. compatible = "arm,armv8-timer";
  311. interrupts = <1 13 0xff01>,
  312. <1 14 0xff01>,
  313. <1 11 0xff01>,
  314. <1 10 0xff01>;
  315. };
  316. soc {
  317. compatible = "simple-bus";
  318. #address-cells = <2>;
  319. #size-cells = <2>;
  320. ranges;
  321. refclk50mhz: refclk50mhz {
  322. compatible = "fixed-clock";
  323. #clock-cells = <0>;
  324. clock-frequency = <50000000>;
  325. clock-output-names = "refclk50mhz";
  326. };
  327. gic0: interrupt-controller@8010,00000000 {
  328. compatible = "arm,gic-v3";
  329. #interrupt-cells = <3>;
  330. interrupt-controller;
  331. reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
  332. <0x8010 0x80000000 0x0 0x600000>; /* GICR */
  333. interrupts = <1 9 0xf04>;
  334. };
  335. uaa0: serial@87e0,24000000 {
  336. compatible = "arm,pl011", "arm,primecell";
  337. reg = <0x87e0 0x24000000 0x0 0x1000>;
  338. interrupts = <1 21 4>;
  339. clocks = <&refclk50mhz>;
  340. clock-names = "apb_pclk";
  341. uboot,skip-init;
  342. };
  343. uaa1: serial@87e0,25000000 {
  344. compatible = "arm,pl011", "arm,primecell";
  345. reg = <0x87e0 0x25000000 0x0 0x1000>;
  346. interrupts = <1 22 4>;
  347. clocks = <&refclk50mhz>;
  348. clock-names = "apb_pclk";
  349. uboot,skip-init;
  350. };
  351. };
  352. };