phy.h 12 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <dm.h>
  11. #include <linux/list.h>
  12. #include <linux/mii.h>
  13. #include <linux/ethtool.h>
  14. #include <linux/mdio.h>
  15. #include <phy_interface.h>
  16. #define PHY_FIXED_ID 0xa5a55a5a
  17. #define PHY_MAX_ADDR 32
  18. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  19. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  20. SUPPORTED_TP | \
  21. SUPPORTED_MII)
  22. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  23. SUPPORTED_10baseT_Full)
  24. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  25. SUPPORTED_100baseT_Full)
  26. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  27. SUPPORTED_1000baseT_Full)
  28. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  29. PHY_100BT_FEATURES | \
  30. PHY_DEFAULT_FEATURES)
  31. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  32. PHY_1000BT_FEATURES)
  33. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  34. SUPPORTED_10000baseT_Full)
  35. #ifndef PHY_ANEG_TIMEOUT
  36. #define PHY_ANEG_TIMEOUT 4000
  37. #endif
  38. struct phy_device;
  39. #define MDIO_NAME_LEN 32
  40. struct mii_dev {
  41. struct list_head link;
  42. char name[MDIO_NAME_LEN];
  43. void *priv;
  44. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  45. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  46. u16 val);
  47. int (*reset)(struct mii_dev *bus);
  48. struct phy_device *phymap[PHY_MAX_ADDR];
  49. u32 phy_mask;
  50. };
  51. /* struct phy_driver: a structure which defines PHY behavior
  52. *
  53. * uid will contain a number which represents the PHY. During
  54. * startup, the driver will poll the PHY to find out what its
  55. * UID--as defined by registers 2 and 3--is. The 32-bit result
  56. * gotten from the PHY will be masked to
  57. * discard any bits which may change based on revision numbers
  58. * unimportant to functionality
  59. *
  60. */
  61. struct phy_driver {
  62. char *name;
  63. unsigned int uid;
  64. unsigned int mask;
  65. unsigned int mmds;
  66. u32 features;
  67. /* Called to do any driver startup necessities */
  68. /* Will be called during phy_connect */
  69. int (*probe)(struct phy_device *phydev);
  70. /* Called to configure the PHY, and modify the controller
  71. * based on the results. Should be called after phy_connect */
  72. int (*config)(struct phy_device *phydev);
  73. /* Called when starting up the controller */
  74. int (*startup)(struct phy_device *phydev);
  75. /* Called when bringing down the controller */
  76. int (*shutdown)(struct phy_device *phydev);
  77. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  78. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  79. u16 val);
  80. /* Phy specific driver override for reading a MMD register */
  81. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  82. /* Phy specific driver override for writing a MMD register */
  83. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  84. u16 val);
  85. struct list_head list;
  86. };
  87. struct phy_device {
  88. /* Information about the PHY type */
  89. /* And management functions */
  90. struct mii_dev *bus;
  91. struct phy_driver *drv;
  92. void *priv;
  93. #ifdef CONFIG_DM_ETH
  94. struct udevice *dev;
  95. ofnode node;
  96. #else
  97. struct eth_device *dev;
  98. #endif
  99. /* forced speed & duplex (no autoneg)
  100. * partner speed & duplex & pause (autoneg)
  101. */
  102. int speed;
  103. int duplex;
  104. /* The most recently read link state */
  105. int link;
  106. int port;
  107. phy_interface_t interface;
  108. u32 advertising;
  109. u32 supported;
  110. u32 mmds;
  111. int autoneg;
  112. int addr;
  113. int pause;
  114. int asym_pause;
  115. u32 phy_id;
  116. bool is_c45;
  117. u32 flags;
  118. };
  119. struct fixed_link {
  120. int phy_id;
  121. int duplex;
  122. int link_speed;
  123. int pause;
  124. int asym_pause;
  125. };
  126. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  127. {
  128. struct mii_dev *bus = phydev->bus;
  129. return bus->read(bus, phydev->addr, devad, regnum);
  130. }
  131. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  132. u16 val)
  133. {
  134. struct mii_dev *bus = phydev->bus;
  135. return bus->write(bus, phydev->addr, devad, regnum, val);
  136. }
  137. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  138. int regnum)
  139. {
  140. /* Write the desired MMD Devad */
  141. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  142. /* Write the desired MMD register address */
  143. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  144. /* Select the Function : DATA with no post increment */
  145. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  146. (devad | MII_MMD_CTRL_NOINCR));
  147. }
  148. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  149. int regnum)
  150. {
  151. struct phy_driver *drv = phydev->drv;
  152. if (regnum > (u16)~0 || devad > 32)
  153. return -EINVAL;
  154. /* driver-specific access */
  155. if (drv->read_mmd)
  156. return drv->read_mmd(phydev, devad, regnum);
  157. /* direct C45 / C22 access */
  158. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  159. devad == MDIO_DEVAD_NONE || !devad)
  160. return phy_read(phydev, devad, regnum);
  161. /* indirect C22 access */
  162. phy_mmd_start_indirect(phydev, devad, regnum);
  163. /* Read the content of the MMD's selected register */
  164. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  165. }
  166. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  167. int regnum, u16 val)
  168. {
  169. struct phy_driver *drv = phydev->drv;
  170. if (regnum > (u16)~0 || devad > 32)
  171. return -EINVAL;
  172. /* driver-specific access */
  173. if (drv->write_mmd)
  174. return drv->write_mmd(phydev, devad, regnum, val);
  175. /* direct C45 / C22 access */
  176. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  177. devad == MDIO_DEVAD_NONE || !devad)
  178. return phy_write(phydev, devad, regnum, val);
  179. /* indirect C22 access */
  180. phy_mmd_start_indirect(phydev, devad, regnum);
  181. /* Write the data into MMD's selected register */
  182. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  183. }
  184. #ifdef CONFIG_PHYLIB_10G
  185. extern struct phy_driver gen10g_driver;
  186. /* For now, XGMII is the only 10G interface */
  187. static inline int is_10g_interface(phy_interface_t interface)
  188. {
  189. return interface == PHY_INTERFACE_MODE_XGMII;
  190. }
  191. #endif
  192. /**
  193. * phy_init() - Initializes the PHY drivers
  194. *
  195. * This function registers all available PHY drivers
  196. *
  197. * @return 0 if OK, -ve on error
  198. */
  199. int phy_init(void);
  200. /**
  201. * phy_reset() - Resets the specified PHY
  202. *
  203. * Issues a reset of the PHY and waits for it to complete
  204. *
  205. * @phydev: PHY to reset
  206. * @return 0 if OK, -ve on error
  207. */
  208. int phy_reset(struct phy_device *phydev);
  209. /**
  210. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  211. *
  212. * The function checks the PHY addresses flagged in phy_mask and returns a
  213. * phy_device pointer if it detects a PHY.
  214. * This function should only be called if just one PHY is expected to be present
  215. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  216. * it is undefined which of these PHYs is returned.
  217. *
  218. * @bus: MII/MDIO bus to scan
  219. * @phy_mask: bitmap of PYH addresses to scan
  220. * @interface: type of MAC-PHY interface
  221. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  222. */
  223. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  224. phy_interface_t interface);
  225. #ifdef CONFIG_DM_ETH
  226. /**
  227. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  228. * @phydev: PHY device
  229. * @dev: Ethernet device
  230. */
  231. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  232. /**
  233. * phy_connect() - Creates a PHY device for the Ethernet interface
  234. *
  235. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  236. * already, and associates it with the Ethernet device.
  237. * The function may be called with addr <= 0, in this case addr value is ignored
  238. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  239. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  240. * which PHY is returned.
  241. *
  242. * @bus: MII/MDIO bus that hosts the PHY
  243. * @addr: PHY address on MDIO bus
  244. * @dev: Ethernet device to associate to the PHY
  245. * @interface: type of MAC-PHY interface
  246. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  247. */
  248. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  249. struct udevice *dev,
  250. phy_interface_t interface);
  251. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  252. {
  253. if (ofnode_valid(phydev->node))
  254. return phydev->node;
  255. else
  256. return dev_ofnode(phydev->dev);
  257. }
  258. #else
  259. /**
  260. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  261. * @phydev: PHY device
  262. * @dev: Ethernet device
  263. */
  264. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  265. /**
  266. * phy_connect() - Creates a PHY device for the Ethernet interface
  267. *
  268. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  269. * already, and associates it with the Ethernet device.
  270. * The function may be called with addr <= 0, in this case addr value is ignored
  271. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  272. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  273. * which PHY is returned.
  274. *
  275. * @bus: MII/MDIO bus that hosts the PHY
  276. * @addr: PHY address on MDIO bus
  277. * @dev: Ethernet device to associate to the PHY
  278. * @interface: type of MAC-PHY interface
  279. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  280. */
  281. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  282. struct eth_device *dev,
  283. phy_interface_t interface);
  284. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  285. {
  286. return ofnode_null();
  287. }
  288. #endif
  289. int phy_startup(struct phy_device *phydev);
  290. int phy_config(struct phy_device *phydev);
  291. int phy_shutdown(struct phy_device *phydev);
  292. int phy_register(struct phy_driver *drv);
  293. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  294. int genphy_config_aneg(struct phy_device *phydev);
  295. int genphy_restart_aneg(struct phy_device *phydev);
  296. int genphy_update_link(struct phy_device *phydev);
  297. int genphy_parse_link(struct phy_device *phydev);
  298. int genphy_config(struct phy_device *phydev);
  299. int genphy_startup(struct phy_device *phydev);
  300. int genphy_shutdown(struct phy_device *phydev);
  301. int gen10g_config(struct phy_device *phydev);
  302. int gen10g_startup(struct phy_device *phydev);
  303. int gen10g_shutdown(struct phy_device *phydev);
  304. int gen10g_discover_mmds(struct phy_device *phydev);
  305. int phy_b53_init(void);
  306. int phy_mv88e61xx_init(void);
  307. int phy_aquantia_init(void);
  308. int phy_atheros_init(void);
  309. int phy_broadcom_init(void);
  310. int phy_cortina_init(void);
  311. int phy_davicom_init(void);
  312. int phy_et1011c_init(void);
  313. int phy_lxt_init(void);
  314. int phy_marvell_init(void);
  315. int phy_micrel_ksz8xxx_init(void);
  316. int phy_micrel_ksz90x1_init(void);
  317. int phy_meson_gxl_init(void);
  318. int phy_natsemi_init(void);
  319. int phy_realtek_init(void);
  320. int phy_smsc_init(void);
  321. int phy_teranetics_init(void);
  322. int phy_ti_init(void);
  323. int phy_vitesse_init(void);
  324. int phy_xilinx_init(void);
  325. int phy_mscc_init(void);
  326. int phy_fixed_init(void);
  327. int board_phy_config(struct phy_device *phydev);
  328. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  329. /**
  330. * phy_get_interface_by_name() - Look up a PHY interface name
  331. *
  332. * @str: PHY interface name, e.g. "mii"
  333. * @return PHY_INTERFACE_MODE_... value, or -1 if not found
  334. */
  335. int phy_get_interface_by_name(const char *str);
  336. /**
  337. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  338. * is RGMII (all variants)
  339. * @phydev: the phy_device struct
  340. */
  341. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  342. {
  343. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  344. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  345. }
  346. /**
  347. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  348. * is SGMII (all variants)
  349. * @phydev: the phy_device struct
  350. */
  351. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  352. {
  353. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  354. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  355. }
  356. /* PHY UIDs for various PHYs that are referenced in external code */
  357. #define PHY_UID_CS4340 0x13e51002
  358. #define PHY_UID_CS4223 0x03e57003
  359. #define PHY_UID_TN2020 0x00a19410
  360. #define PHY_UID_IN112525_S03 0x02107440
  361. #endif