ls2080a_emu.h 2.7 KB

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  1. /*
  2. * Copyright 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __LS2_EMU_H
  7. #define __LS2_EMU_H
  8. #include "ls2080a_common.h"
  9. #define CONFIG_IDENT_STRING " LS2080A-EMU"
  10. #define CONFIG_BOOTP_VCI_STRING "U-boot.LS2080A-EMU"
  11. #define CONFIG_SYS_CLK_FREQ 100000000
  12. #define CONFIG_DDR_CLK_FREQ 133333333
  13. #define CONFIG_SYS_MXC_I2C1_SPEED 40000000
  14. #define CONFIG_SYS_MXC_I2C2_SPEED 40000000
  15. #define CONFIG_DDR_SPD
  16. #define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */
  17. #define SPD_EEPROM_ADDRESS1 0x51
  18. #define SPD_EEPROM_ADDRESS2 0x52
  19. #define SPD_EEPROM_ADDRESS3 0x53
  20. #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
  21. #define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */
  22. #define CONFIG_DIMM_SLOTS_PER_CTLR 1
  23. #define CONFIG_CHIP_SELECTS_PER_CTRL 4
  24. #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
  25. #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1
  26. #endif
  27. #define CONFIG_FSL_DDR_SYNC_REFRESH
  28. #define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
  29. #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
  30. /*
  31. * NOR Flash Timing Params
  32. */
  33. #define CONFIG_SYS_NOR0_CSPR \
  34. (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
  35. CSPR_PORT_SIZE_16 | \
  36. CSPR_MSEL_NOR | \
  37. CSPR_V)
  38. #define CONFIG_SYS_NOR0_CSPR_EARLY \
  39. (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \
  40. CSPR_PORT_SIZE_16 | \
  41. CSPR_MSEL_NOR | \
  42. CSPR_V)
  43. #define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(12)
  44. #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x1) | \
  45. FTIM0_NOR_TEADC(0x1) | \
  46. FTIM0_NOR_TEAHC(0x1))
  47. #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x1) | \
  48. FTIM1_NOR_TRAD_NOR(0x1))
  49. #define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x0) | \
  50. FTIM2_NOR_TCH(0x0) | \
  51. FTIM2_NOR_TWP(0x1))
  52. #define CONFIG_SYS_NOR_FTIM3 0x04000000
  53. #define CONFIG_SYS_IFC_CCR 0x01000000
  54. #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
  55. #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
  56. #define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR
  57. #define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK
  58. #define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR
  59. #define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0
  60. #define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1
  61. #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2
  62. #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3
  63. /* Debug Server firmware */
  64. #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
  65. #define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL
  66. /*
  67. * This trick allows users to load MC images into DDR directly without
  68. * copying from NOR flash. It dramatically improves speed.
  69. */
  70. #define CONFIG_SYS_LS_MC_FW_IN_DDR
  71. #define CONFIG_SYS_LS_MC_DPL_IN_DDR
  72. #define CONFIG_SYS_LS_MC_DPC_IN_DDR
  73. #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 200000
  74. /* Store environment at top of flash */
  75. #define CONFIG_ENV_IS_NOWHERE 1
  76. #define CONFIG_ENV_SIZE 0x1000
  77. #endif /* __LS2_EMU_H */