mc.c 29 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <libfdt.h>
  10. #include <fdt_support.h>
  11. #include <fsl-mc/fsl_mc.h>
  12. #include <fsl-mc/fsl_mc_sys.h>
  13. #include <fsl-mc/fsl_mc_private.h>
  14. #include <fsl-mc/fsl_dpmng.h>
  15. #include <fsl-mc/fsl_dprc.h>
  16. #include <fsl-mc/fsl_dpio.h>
  17. #include <fsl-mc/fsl_dpni.h>
  18. #include <fsl-mc/fsl_qbman_portal.h>
  19. #include <fsl-mc/ldpaa_wriop.h>
  20. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  21. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  22. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  23. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  24. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  25. DECLARE_GLOBAL_DATA_PTR;
  26. static int mc_boot_status = -1;
  27. static int mc_dpl_applied = -1;
  28. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  29. static int mc_aiop_applied = -1;
  30. #endif
  31. struct fsl_mc_io *root_mc_io = NULL;
  32. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  33. uint16_t root_dprc_handle = 0;
  34. uint16_t dflt_dprc_handle = 0;
  35. int child_dprc_id;
  36. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  37. struct fsl_dpio_obj *dflt_dpio = NULL;
  38. struct fsl_dpni_obj *dflt_dpni = NULL;
  39. #ifdef DEBUG
  40. void dump_ram_words(const char *title, void *addr)
  41. {
  42. int i;
  43. uint32_t *words = addr;
  44. printf("Dumping beginning of %s (%p):\n", title, addr);
  45. for (i = 0; i < 16; i++)
  46. printf("%#x ", words[i]);
  47. printf("\n");
  48. }
  49. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  50. {
  51. printf("MC CCSR registers:\n"
  52. "reg_gcr1 %#x\n"
  53. "reg_gsr %#x\n"
  54. "reg_sicbalr %#x\n"
  55. "reg_sicbahr %#x\n"
  56. "reg_sicapr %#x\n"
  57. "reg_mcfbalr %#x\n"
  58. "reg_mcfbahr %#x\n"
  59. "reg_mcfapr %#x\n"
  60. "reg_psr %#x\n",
  61. mc_ccsr_regs->reg_gcr1,
  62. mc_ccsr_regs->reg_gsr,
  63. mc_ccsr_regs->reg_sicbalr,
  64. mc_ccsr_regs->reg_sicbahr,
  65. mc_ccsr_regs->reg_sicapr,
  66. mc_ccsr_regs->reg_mcfbalr,
  67. mc_ccsr_regs->reg_mcfbahr,
  68. mc_ccsr_regs->reg_mcfapr,
  69. mc_ccsr_regs->reg_psr);
  70. }
  71. #else
  72. #define dump_ram_words(title, addr)
  73. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  74. #endif /* DEBUG */
  75. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  76. /**
  77. * Copying MC firmware or DPL image to DDR
  78. */
  79. static int mc_copy_image(const char *title,
  80. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  81. {
  82. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  83. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  84. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  85. return 0;
  86. }
  87. /**
  88. * MC firmware FIT image parser checks if the image is in FIT
  89. * format, verifies integrity of the image and calculates
  90. * raw image address and size values.
  91. * Returns 0 on success and a negative errno on error.
  92. * task fail.
  93. **/
  94. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  95. const void **raw_image_addr,
  96. size_t *raw_image_size)
  97. {
  98. int format;
  99. void *fit_hdr;
  100. int node_offset;
  101. const void *data;
  102. size_t size;
  103. const char *uname = "firmware";
  104. fit_hdr = (void *)mc_fw_addr;
  105. /* Check if Image is in FIT format */
  106. format = genimg_get_format(fit_hdr);
  107. if (format != IMAGE_FORMAT_FIT) {
  108. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  109. return -EINVAL;
  110. }
  111. if (!fit_check_format(fit_hdr)) {
  112. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  113. return -EINVAL;
  114. }
  115. node_offset = fit_image_get_node(fit_hdr, uname);
  116. if (node_offset < 0) {
  117. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  118. return -ENOENT;
  119. }
  120. /* Verify MC firmware image */
  121. if (!(fit_image_verify(fit_hdr, node_offset))) {
  122. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  123. return -EINVAL;
  124. }
  125. /* Get address and size of raw image */
  126. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  127. *raw_image_addr = data;
  128. *raw_image_size = size;
  129. return 0;
  130. }
  131. #endif
  132. /*
  133. * Calculates the values to be used to specify the address range
  134. * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
  135. * It returns the highest 512MB-aligned address within the given
  136. * address range, in '*aligned_base_addr', and the number of 256 MiB
  137. * blocks in it, in 'num_256mb_blocks'.
  138. */
  139. static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
  140. size_t mc_ram_size,
  141. u64 *aligned_base_addr,
  142. u8 *num_256mb_blocks)
  143. {
  144. u64 addr;
  145. u16 num_blocks;
  146. if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
  147. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  148. mc_ram_size);
  149. return -EINVAL;
  150. }
  151. num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  152. if (num_blocks < 1 || num_blocks > 0xff) {
  153. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  154. mc_ram_size);
  155. return -EINVAL;
  156. }
  157. addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
  158. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  159. if (addr < mc_private_ram_start_addr) {
  160. printf("fsl-mc: ERROR: bad start address %#llx\n",
  161. mc_private_ram_start_addr);
  162. return -EFAULT;
  163. }
  164. *aligned_base_addr = addr;
  165. *num_256mb_blocks = num_blocks;
  166. return 0;
  167. }
  168. static int mc_fixup_dpc(u64 dpc_addr)
  169. {
  170. void *blob = (void *)dpc_addr;
  171. int nodeoffset;
  172. /* delete any existing ICID pools */
  173. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  174. if (fdt_del_node(blob, nodeoffset) < 0)
  175. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  176. /* add a new pool */
  177. nodeoffset = fdt_path_offset(blob, "/resources");
  178. if (nodeoffset < 0) {
  179. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  180. return -EINVAL;
  181. }
  182. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  183. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  184. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  185. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  186. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  187. "num",
  188. FSL_DPAA2_STREAM_ID_END -
  189. FSL_DPAA2_STREAM_ID_START + 1, 1);
  190. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  191. return 0;
  192. }
  193. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  194. {
  195. u64 mc_dpc_offset;
  196. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  197. int error;
  198. void *dpc_fdt_hdr;
  199. int dpc_size;
  200. #endif
  201. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  202. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  203. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  204. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  205. #else
  206. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  207. #endif
  208. /*
  209. * Load the MC DPC blob in the MC private DRAM block:
  210. */
  211. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  212. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  213. #else
  214. /*
  215. * Get address and size of the DPC blob stored in flash:
  216. */
  217. dpc_fdt_hdr = (void *)mc_dpc_addr;
  218. error = fdt_check_header(dpc_fdt_hdr);
  219. if (error != 0) {
  220. /*
  221. * Don't return with error here, since the MC firmware can
  222. * still boot without a DPC
  223. */
  224. printf("\nfsl-mc: WARNING: No DPC image found");
  225. return 0;
  226. }
  227. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  228. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  229. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  230. dpc_size);
  231. return -EINVAL;
  232. }
  233. mc_copy_image("MC DPC blob",
  234. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  235. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  236. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  237. return -EINVAL;
  238. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  239. return 0;
  240. }
  241. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  242. {
  243. u64 mc_dpl_offset;
  244. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  245. int error;
  246. void *dpl_fdt_hdr;
  247. int dpl_size;
  248. #endif
  249. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  250. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  251. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  252. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  253. #else
  254. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  255. #endif
  256. /*
  257. * Load the MC DPL blob in the MC private DRAM block:
  258. */
  259. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  260. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  261. #else
  262. /*
  263. * Get address and size of the DPL blob stored in flash:
  264. */
  265. dpl_fdt_hdr = (void *)mc_dpl_addr;
  266. error = fdt_check_header(dpl_fdt_hdr);
  267. if (error != 0) {
  268. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  269. return error;
  270. }
  271. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  272. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  273. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  274. dpl_size);
  275. return -EINVAL;
  276. }
  277. mc_copy_image("MC DPL blob",
  278. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  279. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  280. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  281. return 0;
  282. }
  283. /**
  284. * Return the MC boot timeout value in milliseconds
  285. */
  286. static unsigned long get_mc_boot_timeout_ms(void)
  287. {
  288. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  289. char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
  290. if (timeout_ms_env_var) {
  291. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  292. if (timeout_ms == 0) {
  293. printf("fsl-mc: WARNING: Invalid value for \'"
  294. MC_BOOT_TIMEOUT_ENV_VAR
  295. "\' environment variable: %lu\n",
  296. timeout_ms);
  297. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  298. }
  299. }
  300. return timeout_ms;
  301. }
  302. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  303. static int load_mc_aiop_img(u64 aiop_fw_addr)
  304. {
  305. u64 mc_ram_addr = mc_get_dram_addr();
  306. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  307. void *aiop_img;
  308. #endif
  309. /*
  310. * Load the MC AIOP image in the MC private DRAM block:
  311. */
  312. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  313. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  314. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  315. #else
  316. aiop_img = (void *)aiop_fw_addr;
  317. mc_copy_image("MC AIOP image",
  318. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  319. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  320. #endif
  321. mc_aiop_applied = 0;
  322. return 0;
  323. }
  324. #endif
  325. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  326. {
  327. u32 reg_gsr;
  328. u32 mc_fw_boot_status;
  329. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  330. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  331. dmb();
  332. assert(timeout_ms > 0);
  333. for (;;) {
  334. udelay(1000); /* throttle polling */
  335. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  336. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  337. if (mc_fw_boot_status & 0x1)
  338. break;
  339. timeout_ms--;
  340. if (timeout_ms == 0)
  341. break;
  342. }
  343. if (timeout_ms == 0) {
  344. printf("ERROR: timeout\n");
  345. /* TODO: Get an error status from an MC CCSR register */
  346. return -ETIMEDOUT;
  347. }
  348. if (mc_fw_boot_status != 0x1) {
  349. /*
  350. * TODO: Identify critical errors from the GSR register's FS
  351. * field and for those errors, set error to -ENODEV or other
  352. * appropriate errno, so that the status property is set to
  353. * failure in the fsl,dprc device tree node.
  354. */
  355. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  356. reg_gsr);
  357. } else {
  358. printf("SUCCESS\n");
  359. }
  360. *final_reg_gsr = reg_gsr;
  361. return 0;
  362. }
  363. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  364. {
  365. int error = 0;
  366. int portal_id = 0;
  367. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  368. u64 mc_ram_addr = mc_get_dram_addr();
  369. u32 reg_gsr;
  370. u32 reg_mcfbalr;
  371. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  372. const void *raw_image_addr;
  373. size_t raw_image_size = 0;
  374. #endif
  375. struct mc_version mc_ver_info;
  376. u64 mc_ram_aligned_base_addr;
  377. u8 mc_ram_num_256mb_blocks;
  378. size_t mc_ram_size = mc_get_dram_block_size();
  379. error = calculate_mc_private_ram_params(mc_ram_addr,
  380. mc_ram_size,
  381. &mc_ram_aligned_base_addr,
  382. &mc_ram_num_256mb_blocks);
  383. if (error != 0)
  384. goto out;
  385. /*
  386. * Management Complex cores should be held at reset out of POR.
  387. * U-boot should be the first software to touch MC. To be safe,
  388. * we reset all cores again by setting GCR1 to 0. It doesn't do
  389. * anything if they are held at reset. After we setup the firmware
  390. * we kick off MC by deasserting the reset bit for core 0, and
  391. * deasserting the reset bits for Command Portal Managers.
  392. * The stop bits are not touched here. They are used to stop the
  393. * cores when they are active. Setting stop bits doesn't stop the
  394. * cores from fetching instructions when they are released from
  395. * reset.
  396. */
  397. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  398. dmb();
  399. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  400. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  401. #else
  402. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  403. &raw_image_size);
  404. if (error != 0)
  405. goto out;
  406. /*
  407. * Load the MC FW at the beginning of the MC private DRAM block:
  408. */
  409. mc_copy_image("MC Firmware",
  410. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  411. #endif
  412. dump_ram_words("firmware", (void *)mc_ram_addr);
  413. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  414. if (error != 0)
  415. goto out;
  416. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  417. dump_mc_ccsr_regs(mc_ccsr_regs);
  418. /*
  419. * Tell MC what is the address range of the DRAM block assigned to it:
  420. */
  421. reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
  422. (mc_ram_num_256mb_blocks - 1);
  423. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  424. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  425. (u32)(mc_ram_aligned_base_addr >> 32));
  426. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  427. /*
  428. * Tell the MC that we want delayed DPL deployment.
  429. */
  430. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  431. printf("\nfsl-mc: Booting Management Complex ... ");
  432. /*
  433. * Deassert reset and release MC core 0 to run
  434. */
  435. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  436. error = wait_for_mc(true, &reg_gsr);
  437. if (error != 0)
  438. goto out;
  439. /*
  440. * TODO: need to obtain the portal_id for the root container from the
  441. * DPL
  442. */
  443. portal_id = 0;
  444. /*
  445. * Initialize the global default MC portal
  446. * And check that the MC firmware is responding portal commands:
  447. */
  448. root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  449. if (!root_mc_io) {
  450. printf(" No memory: malloc() failed\n");
  451. return -ENOMEM;
  452. }
  453. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  454. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  455. portal_id, root_mc_io->mmio_regs);
  456. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  457. if (error != 0) {
  458. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  459. error);
  460. goto out;
  461. }
  462. if (MC_VER_MAJOR != mc_ver_info.major) {
  463. printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
  464. mc_ver_info.major, MC_VER_MAJOR);
  465. printf("fsl-mc: Update the Management Complex firmware\n");
  466. error = -ENODEV;
  467. goto out;
  468. }
  469. if (MC_VER_MINOR != mc_ver_info.minor)
  470. printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
  471. mc_ver_info.minor, MC_VER_MINOR);
  472. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  473. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  474. reg_gsr & GSR_FS_MASK);
  475. out:
  476. if (error != 0)
  477. mc_boot_status = error;
  478. else
  479. mc_boot_status = 0;
  480. return error;
  481. }
  482. int mc_apply_dpl(u64 mc_dpl_addr)
  483. {
  484. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  485. int error = 0;
  486. u32 reg_gsr;
  487. u64 mc_ram_addr = mc_get_dram_addr();
  488. size_t mc_ram_size = mc_get_dram_block_size();
  489. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  490. if (error != 0)
  491. return error;
  492. /*
  493. * Tell the MC to deploy the DPL:
  494. */
  495. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  496. printf("fsl-mc: Deploying data path layout ... ");
  497. error = wait_for_mc(false, &reg_gsr);
  498. if (!error)
  499. mc_dpl_applied = 0;
  500. return error;
  501. }
  502. int get_mc_boot_status(void)
  503. {
  504. return mc_boot_status;
  505. }
  506. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  507. int get_aiop_apply_status(void)
  508. {
  509. return mc_aiop_applied;
  510. }
  511. #endif
  512. int get_dpl_apply_status(void)
  513. {
  514. return mc_dpl_applied;
  515. }
  516. /**
  517. * Return the MC address of private DRAM block.
  518. */
  519. u64 mc_get_dram_addr(void)
  520. {
  521. u64 mc_ram_addr;
  522. /*
  523. * The MC private DRAM block was already carved at the end of DRAM
  524. * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
  525. */
  526. if (gd->bd->bi_dram[1].start) {
  527. mc_ram_addr =
  528. gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
  529. } else {
  530. mc_ram_addr =
  531. gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  532. }
  533. return mc_ram_addr;
  534. }
  535. /**
  536. * Return the actual size of the MC private DRAM block.
  537. */
  538. unsigned long mc_get_dram_block_size(void)
  539. {
  540. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  541. char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
  542. if (dram_block_size_env_var) {
  543. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  544. 10);
  545. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  546. printf("fsl-mc: WARNING: Invalid value for \'"
  547. MC_MEM_SIZE_ENV_VAR
  548. "\' environment variable: %lu\n",
  549. dram_block_size);
  550. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  551. }
  552. }
  553. return dram_block_size;
  554. }
  555. int fsl_mc_ldpaa_init(bd_t *bis)
  556. {
  557. int i;
  558. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  559. if ((wriop_is_enabled_dpmac(i) == 1) &&
  560. (wriop_get_phy_address(i) != -1))
  561. ldpaa_eth_init(i, wriop_get_enet_if(i));
  562. return 0;
  563. }
  564. static int dpio_init(void)
  565. {
  566. struct qbman_swp_desc p_des;
  567. struct dpio_attr attr;
  568. struct dpio_cfg dpio_cfg;
  569. int err = 0;
  570. dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
  571. if (!dflt_dpio) {
  572. printf("No memory: malloc() failed\n");
  573. err = -ENOMEM;
  574. goto err_malloc;
  575. }
  576. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  577. dpio_cfg.num_priorities = 8;
  578. err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
  579. &dflt_dpio->dpio_handle);
  580. if (err < 0) {
  581. printf("dpio_create() failed: %d\n", err);
  582. err = -ENODEV;
  583. goto err_create;
  584. }
  585. memset(&attr, 0, sizeof(struct dpio_attr));
  586. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  587. dflt_dpio->dpio_handle, &attr);
  588. if (err < 0) {
  589. printf("dpio_get_attributes() failed: %d\n", err);
  590. goto err_get_attr;
  591. }
  592. dflt_dpio->dpio_id = attr.id;
  593. #ifdef DEBUG
  594. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  595. #endif
  596. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  597. if (err < 0) {
  598. printf("dpio_enable() failed %d\n", err);
  599. goto err_get_enable;
  600. }
  601. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  602. attr.qbman_portal_ce_offset,
  603. attr.qbman_portal_ci_offset,
  604. attr.qbman_portal_id,
  605. attr.num_priorities);
  606. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  607. + attr.qbman_portal_ce_offset);
  608. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  609. + attr.qbman_portal_ci_offset);
  610. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  611. if (dflt_dpio->sw_portal == NULL) {
  612. printf("qbman_swp_init() failed\n");
  613. goto err_get_swp_init;
  614. }
  615. return 0;
  616. err_get_swp_init:
  617. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  618. err_get_enable:
  619. free(dflt_dpio);
  620. err_get_attr:
  621. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  622. dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  623. err_create:
  624. err_malloc:
  625. return err;
  626. }
  627. static int dpio_exit(void)
  628. {
  629. int err;
  630. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  631. if (err < 0) {
  632. printf("dpio_disable() failed: %d\n", err);
  633. goto err;
  634. }
  635. err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  636. if (err < 0) {
  637. printf("dpio_destroy() failed: %d\n", err);
  638. goto err;
  639. }
  640. #ifdef DEBUG
  641. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  642. #endif
  643. if (dflt_dpio)
  644. free(dflt_dpio);
  645. return 0;
  646. err:
  647. return err;
  648. }
  649. static int dprc_init(void)
  650. {
  651. int err, child_portal_id, container_id;
  652. struct dprc_cfg cfg;
  653. uint64_t mc_portal_offset;
  654. /* Open root container */
  655. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  656. if (err < 0) {
  657. printf("dprc_get_container_id(): Root failed: %d\n", err);
  658. goto err_root_container_id;
  659. }
  660. #ifdef DEBUG
  661. printf("Root container id = %d\n", container_id);
  662. #endif
  663. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  664. &root_dprc_handle);
  665. if (err < 0) {
  666. printf("dprc_open(): Root Container failed: %d\n", err);
  667. goto err_root_open;
  668. }
  669. if (!root_dprc_handle) {
  670. printf("dprc_open(): Root Container Handle is not valid\n");
  671. goto err_root_open;
  672. }
  673. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  674. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  675. DPRC_CFG_OPT_ALLOC_ALLOWED;
  676. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  677. cfg.portal_id = 250;
  678. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  679. root_dprc_handle,
  680. &cfg,
  681. &child_dprc_id,
  682. &mc_portal_offset);
  683. if (err < 0) {
  684. printf("dprc_create_container() failed: %d\n", err);
  685. goto err_create;
  686. }
  687. dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  688. if (!dflt_mc_io) {
  689. err = -ENOMEM;
  690. printf(" No memory: malloc() failed\n");
  691. goto err_malloc;
  692. }
  693. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  694. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  695. #ifdef DEBUG
  696. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  697. child_dprc_id, dflt_mc_io->mmio_regs);
  698. #endif
  699. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  700. &dflt_dprc_handle);
  701. if (err < 0) {
  702. printf("dprc_open(): Child container failed: %d\n", err);
  703. goto err_child_open;
  704. }
  705. if (!dflt_dprc_handle) {
  706. printf("dprc_open(): Child container Handle is not valid\n");
  707. goto err_child_open;
  708. }
  709. return 0;
  710. err_child_open:
  711. free(dflt_mc_io);
  712. err_malloc:
  713. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  714. root_dprc_handle, child_dprc_id);
  715. err_create:
  716. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  717. err_root_open:
  718. err_root_container_id:
  719. return err;
  720. }
  721. static int dprc_exit(void)
  722. {
  723. int err;
  724. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  725. if (err < 0) {
  726. printf("dprc_close(): Child failed: %d\n", err);
  727. goto err;
  728. }
  729. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  730. root_dprc_handle, child_dprc_id);
  731. if (err < 0) {
  732. printf("dprc_destroy_container() failed: %d\n", err);
  733. goto err;
  734. }
  735. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  736. if (err < 0) {
  737. printf("dprc_close(): Root failed: %d\n", err);
  738. goto err;
  739. }
  740. if (dflt_mc_io)
  741. free(dflt_mc_io);
  742. if (root_mc_io)
  743. free(root_mc_io);
  744. return 0;
  745. err:
  746. return err;
  747. }
  748. static int dpbp_init(void)
  749. {
  750. int err;
  751. struct dpbp_attr dpbp_attr;
  752. struct dpbp_cfg dpbp_cfg;
  753. dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
  754. if (!dflt_dpbp) {
  755. printf("No memory: malloc() failed\n");
  756. err = -ENOMEM;
  757. goto err_malloc;
  758. }
  759. dpbp_cfg.options = 512;
  760. err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
  761. &dflt_dpbp->dpbp_handle);
  762. if (err < 0) {
  763. err = -ENODEV;
  764. printf("dpbp_create() failed: %d\n", err);
  765. goto err_create;
  766. }
  767. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  768. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  769. dflt_dpbp->dpbp_handle,
  770. &dpbp_attr);
  771. if (err < 0) {
  772. printf("dpbp_get_attributes() failed: %d\n", err);
  773. goto err_get_attr;
  774. }
  775. dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
  776. #ifdef DEBUG
  777. printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  778. #endif
  779. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  780. if (err < 0) {
  781. printf("dpbp_close() failed: %d\n", err);
  782. goto err_close;
  783. }
  784. return 0;
  785. err_close:
  786. free(dflt_dpbp);
  787. err_get_attr:
  788. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  789. dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  790. err_create:
  791. err_malloc:
  792. return err;
  793. }
  794. static int dpbp_exit(void)
  795. {
  796. int err;
  797. err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
  798. &dflt_dpbp->dpbp_handle);
  799. if (err < 0) {
  800. printf("dpbp_open() failed: %d\n", err);
  801. goto err;
  802. }
  803. err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  804. dflt_dpbp->dpbp_handle);
  805. if (err < 0) {
  806. printf("dpbp_destroy() failed: %d\n", err);
  807. goto err;
  808. }
  809. #ifdef DEBUG
  810. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  811. #endif
  812. if (dflt_dpbp)
  813. free(dflt_dpbp);
  814. return 0;
  815. err:
  816. return err;
  817. }
  818. static int dpni_init(void)
  819. {
  820. int err;
  821. struct dpni_attr dpni_attr;
  822. struct dpni_cfg dpni_cfg;
  823. dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
  824. if (!dflt_dpni) {
  825. printf("No memory: malloc() failed\n");
  826. err = -ENOMEM;
  827. goto err_malloc;
  828. }
  829. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  830. dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
  831. DPNI_OPT_MULTICAST_FILTER;
  832. err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
  833. &dflt_dpni->dpni_handle);
  834. if (err < 0) {
  835. err = -ENODEV;
  836. printf("dpni_create() failed: %d\n", err);
  837. goto err_create;
  838. }
  839. memset(&dpni_attr, 0, sizeof(struct dpni_attr));
  840. err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  841. dflt_dpni->dpni_handle,
  842. &dpni_attr);
  843. if (err < 0) {
  844. printf("dpni_get_attributes() failed: %d\n", err);
  845. goto err_get_attr;
  846. }
  847. dflt_dpni->dpni_id = dpni_attr.id;
  848. #ifdef DEBUG
  849. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  850. #endif
  851. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  852. if (err < 0) {
  853. printf("dpni_close() failed: %d\n", err);
  854. goto err_close;
  855. }
  856. return 0;
  857. err_close:
  858. free(dflt_dpni);
  859. err_get_attr:
  860. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  861. dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  862. err_create:
  863. err_malloc:
  864. return err;
  865. }
  866. static int dpni_exit(void)
  867. {
  868. int err;
  869. err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
  870. &dflt_dpni->dpni_handle);
  871. if (err < 0) {
  872. printf("dpni_open() failed: %d\n", err);
  873. goto err;
  874. }
  875. err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  876. dflt_dpni->dpni_handle);
  877. if (err < 0) {
  878. printf("dpni_destroy() failed: %d\n", err);
  879. goto err;
  880. }
  881. #ifdef DEBUG
  882. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  883. #endif
  884. if (dflt_dpni)
  885. free(dflt_dpni);
  886. return 0;
  887. err:
  888. return err;
  889. }
  890. static int mc_init_object(void)
  891. {
  892. int err = 0;
  893. err = dprc_init();
  894. if (err < 0) {
  895. printf("dprc_init() failed: %d\n", err);
  896. goto err;
  897. }
  898. err = dpbp_init();
  899. if (err < 0) {
  900. printf("dpbp_init() failed: %d\n", err);
  901. goto err;
  902. }
  903. err = dpio_init();
  904. if (err < 0) {
  905. printf("dpio_init() failed: %d\n", err);
  906. goto err;
  907. }
  908. err = dpni_init();
  909. if (err < 0) {
  910. printf("dpni_init() failed: %d\n", err);
  911. goto err;
  912. }
  913. return 0;
  914. err:
  915. return err;
  916. }
  917. int fsl_mc_ldpaa_exit(bd_t *bd)
  918. {
  919. int err = 0;
  920. if (bd && get_mc_boot_status() == -1)
  921. return 0;
  922. if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
  923. printf("ERROR: fsl-mc: DPL is not applied\n");
  924. err = -ENODEV;
  925. return err;
  926. }
  927. if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
  928. return err;
  929. err = dpbp_exit();
  930. if (err < 0) {
  931. printf("dpni_exit() failed: %d\n", err);
  932. goto err;
  933. }
  934. err = dpio_exit();
  935. if (err < 0) {
  936. printf("dpio_exit() failed: %d\n", err);
  937. goto err;
  938. }
  939. err = dpni_exit();
  940. if (err < 0) {
  941. printf("dpni_exit() failed: %d\n", err);
  942. goto err;
  943. }
  944. err = dprc_exit();
  945. if (err < 0) {
  946. printf("dprc_exit() failed: %d\n", err);
  947. goto err;
  948. }
  949. return 0;
  950. err:
  951. return err;
  952. }
  953. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  954. {
  955. int err = 0;
  956. if (argc < 3)
  957. goto usage;
  958. switch (argv[1][0]) {
  959. case 's': {
  960. char sub_cmd;
  961. u64 mc_fw_addr, mc_dpc_addr;
  962. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  963. u64 aiop_fw_addr;
  964. #endif
  965. sub_cmd = argv[2][0];
  966. switch (sub_cmd) {
  967. case 'm':
  968. if (argc < 5)
  969. goto usage;
  970. if (get_mc_boot_status() == 0) {
  971. printf("fsl-mc: MC is already booted");
  972. printf("\n");
  973. return err;
  974. }
  975. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  976. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  977. 16);
  978. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  979. err = mc_init_object();
  980. break;
  981. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  982. case 'a':
  983. if (argc < 4)
  984. goto usage;
  985. if (get_aiop_apply_status() == 0) {
  986. printf("fsl-mc: AIOP FW is already");
  987. printf(" applied\n");
  988. return err;
  989. }
  990. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  991. 16);
  992. err = load_mc_aiop_img(aiop_fw_addr);
  993. if (!err)
  994. printf("fsl-mc: AIOP FW applied\n");
  995. break;
  996. #endif
  997. default:
  998. printf("Invalid option: %s\n", argv[2]);
  999. goto usage;
  1000. break;
  1001. }
  1002. }
  1003. break;
  1004. case 'a': {
  1005. u64 mc_dpl_addr;
  1006. if (argc < 4)
  1007. goto usage;
  1008. if (get_dpl_apply_status() == 0) {
  1009. printf("fsl-mc: DPL already applied\n");
  1010. return err;
  1011. }
  1012. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1013. 16);
  1014. if (get_mc_boot_status() != 0) {
  1015. printf("fsl-mc: Deploying data path layout ..");
  1016. printf("ERROR (MC is not booted)\n");
  1017. return -ENODEV;
  1018. }
  1019. if (!fsl_mc_ldpaa_exit(NULL))
  1020. err = mc_apply_dpl(mc_dpl_addr);
  1021. break;
  1022. }
  1023. default:
  1024. printf("Invalid option: %s\n", argv[1]);
  1025. goto usage;
  1026. break;
  1027. }
  1028. return err;
  1029. usage:
  1030. return CMD_RET_USAGE;
  1031. }
  1032. U_BOOT_CMD(
  1033. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1034. "DPAA2 command to manage Management Complex (MC)",
  1035. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1036. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1037. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1038. );