cache-sifive-ccache.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2021 SiFive
  4. */
  5. #include <common.h>
  6. #include <cache.h>
  7. #include <dm.h>
  8. #include <asm/io.h>
  9. #include <dm/device.h>
  10. #include <linux/bitfield.h>
  11. #define SIFIVE_CCACHE_CONFIG 0x000
  12. #define SIFIVE_CCACHE_CONFIG_WAYS GENMASK(15, 8)
  13. #define SIFIVE_CCACHE_WAY_ENABLE 0x008
  14. struct sifive_ccache {
  15. void __iomem *base;
  16. };
  17. static int sifive_ccache_enable(struct udevice *dev)
  18. {
  19. struct sifive_ccache *priv = dev_get_priv(dev);
  20. u32 config;
  21. u32 ways;
  22. /* Enable all ways of composable cache */
  23. config = readl(priv->base + SIFIVE_CCACHE_CONFIG);
  24. ways = FIELD_GET(SIFIVE_CCACHE_CONFIG_WAYS, config);
  25. writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE);
  26. return 0;
  27. }
  28. static int sifive_ccache_get_info(struct udevice *dev, struct cache_info *info)
  29. {
  30. struct sifive_ccache *priv = dev_get_priv(dev);
  31. info->base = (phys_addr_t)priv->base;
  32. return 0;
  33. }
  34. static const struct cache_ops sifive_ccache_ops = {
  35. .enable = sifive_ccache_enable,
  36. .get_info = sifive_ccache_get_info,
  37. };
  38. static int sifive_ccache_probe(struct udevice *dev)
  39. {
  40. struct sifive_ccache *priv = dev_get_priv(dev);
  41. priv->base = dev_read_addr_ptr(dev);
  42. if (!priv->base)
  43. return -EINVAL;
  44. return 0;
  45. }
  46. static const struct udevice_id sifive_ccache_ids[] = {
  47. { .compatible = "sifive,fu540-c000-ccache" },
  48. { .compatible = "sifive,fu740-c000-ccache" },
  49. {}
  50. };
  51. U_BOOT_DRIVER(sifive_ccache) = {
  52. .name = "sifive_ccache",
  53. .id = UCLASS_CACHE,
  54. .of_match = sifive_ccache_ids,
  55. .probe = sifive_ccache_probe,
  56. .priv_auto = sizeof(struct sifive_ccache),
  57. .ops = &sifive_ccache_ops,
  58. };