ti-j721e-ufs.c 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
  4. */
  5. #include <asm/io.h>
  6. #include <clk.h>
  7. #include <common.h>
  8. #include <dm.h>
  9. #define UFS_SS_CTRL 0x4
  10. #define UFS_SS_RST_N_PCS BIT(0)
  11. #define UFS_SS_CLK_26MHZ BIT(4)
  12. static int ti_j721e_ufs_probe(struct udevice *dev)
  13. {
  14. void __iomem *base;
  15. unsigned int clock;
  16. struct clk clk;
  17. u32 reg = 0;
  18. int ret;
  19. ret = clk_get_by_index(dev, 0, &clk);
  20. if (ret) {
  21. dev_err(dev, "failed to get M-PHY clock\n");
  22. return ret;
  23. }
  24. clock = clk_get_rate(&clk);
  25. if (IS_ERR_VALUE(clock)) {
  26. dev_err(dev, "failed to get rate\n");
  27. return ret;
  28. }
  29. base = dev_remap_addr_index(dev, 0);
  30. if (clock == 26000000)
  31. reg |= UFS_SS_CLK_26MHZ;
  32. /* Take UFS slave device out of reset */
  33. reg |= UFS_SS_RST_N_PCS;
  34. writel(reg, base + UFS_SS_CTRL);
  35. return 0;
  36. }
  37. static int ti_j721e_ufs_remove(struct udevice *dev)
  38. {
  39. void __iomem *base = dev_remap_addr_index(dev, 0);
  40. u32 reg = readl(base + UFS_SS_CTRL);
  41. reg &= ~UFS_SS_RST_N_PCS;
  42. writel(reg, base + UFS_SS_CTRL);
  43. return 0;
  44. }
  45. static const struct udevice_id ti_j721e_ufs_ids[] = {
  46. {
  47. .compatible = "ti,j721e-ufs",
  48. },
  49. {},
  50. };
  51. U_BOOT_DRIVER(ti_j721e_ufs) = {
  52. .name = "ti-j721e-ufs",
  53. .id = UCLASS_MISC,
  54. .of_match = ti_j721e_ufs_ids,
  55. .probe = ti_j721e_ufs_probe,
  56. .remove = ti_j721e_ufs_remove,
  57. .flags = DM_FLAG_OS_PREPARE,
  58. };