board_common.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) Aspeed Technology Inc.
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <ram.h>
  8. #include <timer.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/timer.h>
  11. #include <linux/bitops.h>
  12. #include <linux/err.h>
  13. #include <dm/uclass.h>
  14. #include <asm/arch/scu_ast2600.h>
  15. #include <asm/global_data.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. /* Memory Control registers */
  18. #define MCR_BASE 0x1e6e0000
  19. #define MCR_CONF (MCR_BASE + 0x004)
  20. /* bit fields of MCR_CONF */
  21. #define MCR_CONF_ECC_EN BIT(7)
  22. #define MCR_CONF_VGA_MEMSZ_MASK GENMASK(3, 2)
  23. #define MCR_CONF_VGA_MEMSZ_SHIFT 2
  24. #define MCR_CONF_MEMSZ_MASK GENMASK(1, 0)
  25. #define MCR_CONF_MEMSZ_SHIFT 0
  26. int dram_init(void)
  27. {
  28. int ret;
  29. struct udevice *dev;
  30. struct ram_info ram;
  31. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  32. if (ret) {
  33. debug("cannot get DRAM driver\n");
  34. return ret;
  35. }
  36. ret = ram_get_info(dev, &ram);
  37. if (ret) {
  38. debug("cannot get DRAM information\n");
  39. return ret;
  40. }
  41. gd->ram_size = ram.size;
  42. return 0;
  43. }
  44. int board_init(void)
  45. {
  46. int i = 0, rc;
  47. struct udevice *dev;
  48. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  49. while (1) {
  50. rc = uclass_get_device(UCLASS_MISC, i++, &dev);
  51. if (rc)
  52. break;
  53. }
  54. return 0;
  55. }
  56. void board_add_ram_info(int use_default)
  57. {
  58. int rc;
  59. uint32_t conf;
  60. uint32_t ecc, act_size, vga_rsvd;
  61. struct udevice *scu_dev;
  62. struct ast2600_scu *scu;
  63. rc = uclass_get_device_by_driver(UCLASS_CLK,
  64. DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev);
  65. if (rc) {
  66. debug("%s: cannot find SCU device, rc=%d\n", __func__, rc);
  67. return;
  68. }
  69. scu = devfdt_get_addr_ptr(scu_dev);
  70. if (IS_ERR_OR_NULL(scu)) {
  71. debug("%s: cannot get SCU address pointer\n", __func__);
  72. return;
  73. }
  74. conf = readl(MCR_CONF);
  75. ecc = conf & MCR_CONF_ECC_EN;
  76. act_size = 0x100 << ((conf & MCR_CONF_MEMSZ_MASK) >> MCR_CONF_MEMSZ_SHIFT);
  77. vga_rsvd = 0x8 << ((conf & MCR_CONF_VGA_MEMSZ_MASK) >> MCR_CONF_VGA_MEMSZ_SHIFT);
  78. /* no VGA reservation if efuse VGA disable bit is set */
  79. if (readl(scu->efuse) & SCU_EFUSE_DIS_VGA)
  80. vga_rsvd = 0;
  81. printf(" (capacity:%d MiB, VGA:%d MiB), ECC %s", act_size,
  82. vga_rsvd, (ecc) ? "on" : "off");
  83. }
  84. void enable_caches(void)
  85. {
  86. /* get rid of the warning message */
  87. }