board_common.c 1.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2016 Google, Inc
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <init.h>
  8. #include <log.h>
  9. #include <ram.h>
  10. #include <timer.h>
  11. #include <asm/global_data.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/timer.h>
  14. #include <asm/arch/wdt.h>
  15. #include <linux/err.h>
  16. #include <dm/uclass.h>
  17. /*
  18. * Second Watchdog Timer by default is configured
  19. * to trigger secondary boot source.
  20. */
  21. #define AST_2ND_BOOT_WDT 1
  22. /*
  23. * Third Watchdog Timer by default is configured
  24. * to toggle Flash address mode switch before reset.
  25. */
  26. #define AST_FLASH_ADDR_DETECT_WDT 2
  27. DECLARE_GLOBAL_DATA_PTR;
  28. int board_init(void)
  29. {
  30. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  31. return 0;
  32. }
  33. int dram_init(void)
  34. {
  35. struct udevice *dev;
  36. struct ram_info ram;
  37. int ret;
  38. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  39. if (ret) {
  40. debug("DRAM FAIL1\r\n");
  41. return ret;
  42. }
  43. ret = ram_get_info(dev, &ram);
  44. if (ret) {
  45. debug("DRAM FAIL2\r\n");
  46. return ret;
  47. }
  48. gd->ram_size = ram.size;
  49. return 0;
  50. }