generic_timer.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2013
  4. * David Feng <fenghua@phytium.com.cn>
  5. */
  6. #include <common.h>
  7. #include <bootstage.h>
  8. #include <command.h>
  9. #include <time.h>
  10. #include <asm/global_data.h>
  11. #include <asm/system.h>
  12. #include <linux/bitops.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. /*
  15. * Generic timer implementation of get_tbclk()
  16. */
  17. unsigned long get_tbclk(void)
  18. {
  19. unsigned long cntfrq;
  20. asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq));
  21. return cntfrq;
  22. }
  23. #ifdef CONFIG_SYS_FSL_ERRATUM_A008585
  24. /*
  25. * FSL erratum A-008585 says that the ARM generic timer counter "has the
  26. * potential to contain an erroneous value for a small number of core
  27. * clock cycles every time the timer value changes".
  28. * This sometimes leads to a consecutive counter read returning a lower
  29. * value than the previous one, thus reporting the time to go backwards.
  30. * The workaround is to read the counter twice and only return when the value
  31. * was the same in both reads.
  32. * Assumes that the CPU runs in much higher frequency than the timer.
  33. */
  34. unsigned long timer_read_counter(void)
  35. {
  36. unsigned long cntpct;
  37. unsigned long temp;
  38. isb();
  39. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  40. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  41. while (temp != cntpct) {
  42. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  43. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  44. }
  45. return cntpct;
  46. }
  47. #elif CONFIG_SUNXI_A64_TIMER_ERRATUM
  48. /*
  49. * This erratum sometimes flips the lower 11 bits of the counter value
  50. * to all 0's or all 1's, leading to jumps forwards or backwards.
  51. * Backwards jumps might be interpreted all roll-overs and be treated as
  52. * huge jumps forward.
  53. * The workaround is to check whether the lower 11 bits of the counter are
  54. * all 0 or all 1, then discard this value and read again.
  55. * This occasionally discards valid values, but will catch all erroneous
  56. * reads and fixes the problem reliably. Also this mostly requires only a
  57. * single read, so does not have any significant overhead.
  58. * The algorithm was conceived by Samuel Holland.
  59. */
  60. unsigned long timer_read_counter(void)
  61. {
  62. unsigned long cntpct;
  63. isb();
  64. do {
  65. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  66. } while (((cntpct + 1) & GENMASK(10, 0)) <= 1);
  67. return cntpct;
  68. }
  69. #else
  70. /*
  71. * timer_read_counter() using the Arm Generic Timer (aka arch timer).
  72. */
  73. unsigned long timer_read_counter(void)
  74. {
  75. unsigned long cntpct;
  76. isb();
  77. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  78. return cntpct;
  79. }
  80. #endif
  81. uint64_t get_ticks(void)
  82. {
  83. unsigned long ticks = timer_read_counter();
  84. gd->arch.tbl = ticks;
  85. return ticks;
  86. }
  87. unsigned long usec2ticks(unsigned long usec)
  88. {
  89. ulong ticks;
  90. if (usec < 1000)
  91. ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  92. else
  93. ticks = ((usec / 10) * (get_tbclk() / 100000));
  94. return ticks;
  95. }
  96. ulong timer_get_boot_us(void)
  97. {
  98. u64 val = get_ticks() * 1000000;
  99. return val / get_tbclk();
  100. }