timer.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007-2011
  4. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  5. * Tom Cubie <tangliang@allwinnertech.com>
  6. */
  7. #include <common.h>
  8. #include <init.h>
  9. #include <time.h>
  10. #include <asm/global_data.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/timer.h>
  13. #include <linux/delay.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. #define TIMER_MODE (0x0 << 7) /* continuous mode */
  16. #define TIMER_DIV (0x0 << 4) /* pre scale 1 */
  17. #define TIMER_SRC (0x1 << 2) /* osc24m */
  18. #define TIMER_RELOAD (0x1 << 1) /* reload internal value */
  19. #define TIMER_EN (0x1 << 0) /* enable timer */
  20. #define TIMER_CLOCK (24 * 1000 * 1000)
  21. #define COUNT_TO_USEC(x) ((x) / 24)
  22. #define USEC_TO_COUNT(x) ((x) * 24)
  23. #define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
  24. #define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
  25. #define TIMER_LOAD_VAL 0xffffffff
  26. #define TIMER_NUM 0 /* we use timer 0 */
  27. /* read the 32-bit timer */
  28. static ulong read_timer(void)
  29. {
  30. struct sunxi_timer_reg *timers =
  31. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  32. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  33. /*
  34. * The hardware timer counts down, therefore we invert to
  35. * produce an incrementing timer.
  36. */
  37. return ~readl(&timer->val);
  38. }
  39. /* init timer register */
  40. int timer_init(void)
  41. {
  42. struct sunxi_timer_reg *timers =
  43. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  44. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  45. writel(TIMER_LOAD_VAL, &timer->inter);
  46. writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
  47. &timer->ctl);
  48. return 0;
  49. }
  50. /* timer without interrupts */
  51. static ulong get_timer_masked(void)
  52. {
  53. /* current tick value */
  54. ulong now = TICKS_TO_HZ(read_timer());
  55. if (now >= gd->arch.lastinc) /* normal (non rollover) */
  56. gd->arch.tbl += (now - gd->arch.lastinc);
  57. else {
  58. /* rollover */
  59. gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
  60. - gd->arch.lastinc) + now;
  61. }
  62. gd->arch.lastinc = now;
  63. return gd->arch.tbl;
  64. }
  65. ulong get_timer(ulong base)
  66. {
  67. return get_timer_masked() - base;
  68. }
  69. /* delay x useconds */
  70. void __udelay(unsigned long usec)
  71. {
  72. long tmo = USEC_TO_COUNT(usec);
  73. ulong now, last = read_timer();
  74. while (tmo > 0) {
  75. now = read_timer();
  76. if (now > last) /* normal (non rollover) */
  77. tmo -= now - last;
  78. else /* rollover */
  79. tmo -= TIMER_LOAD_VAL - last + now;
  80. last = now;
  81. }
  82. }
  83. /*
  84. * This function is derived from PowerPC code (read timebase as long long).
  85. * On ARM it just returns the timer value.
  86. */
  87. unsigned long long get_ticks(void)
  88. {
  89. return get_timer(0);
  90. }
  91. /*
  92. * This function is derived from PowerPC code (timebase clock frequency).
  93. * On ARM it returns the number of timer ticks per second.
  94. */
  95. ulong get_tbclk(void)
  96. {
  97. return CONFIG_SYS_HZ;
  98. }