timer.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
  4. * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <time.h>
  9. #include <asm/global_data.h>
  10. #include <asm/io.h>
  11. #include <asm/arch-stv0991/hardware.h>
  12. #include <asm/arch-stv0991/stv0991_cgu.h>
  13. #include <asm/arch-stv0991/stv0991_gpt.h>
  14. #include <linux/delay.h>
  15. static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
  16. (struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
  17. #define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
  18. #define GPT_RESOLUTION (CONFIG_STV0991_HZ_CLOCK / CONFIG_STV0991_HZ)
  19. DECLARE_GLOBAL_DATA_PTR;
  20. #define timestamp gd->arch.tbl
  21. #define lastdec gd->arch.lastinc
  22. static ulong get_timer_masked(void);
  23. int timer_init(void)
  24. {
  25. /* Timer1 clock configuration */
  26. writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq);
  27. writel(readl(&stv0991_cgu_regs->cgu_enable_2) |
  28. TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2);
  29. /* Stop the timer */
  30. writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
  31. writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc);
  32. /* Configure timer for auto-reload */
  33. writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
  34. &gpt1_regs_ptr->cr1);
  35. /* load value for free running */
  36. writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
  37. /* start timer */
  38. writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN,
  39. &gpt1_regs_ptr->cr1);
  40. /* Reset the timer */
  41. lastdec = READ_TIMER();
  42. timestamp = 0;
  43. return 0;
  44. }
  45. /*
  46. * timer without interrupts
  47. */
  48. ulong get_timer(ulong base)
  49. {
  50. return (get_timer_masked() / GPT_RESOLUTION) - base;
  51. }
  52. void __udelay(unsigned long usec)
  53. {
  54. ulong tmo;
  55. ulong start = get_timer_masked();
  56. ulong tenudelcnt = CONFIG_STV0991_HZ_CLOCK / (1000 * 100);
  57. ulong rndoff;
  58. rndoff = (usec % 10) ? 1 : 0;
  59. /* tenudelcnt timer tick gives 10 microsecconds delay */
  60. tmo = ((usec / 10) + rndoff) * tenudelcnt;
  61. while ((ulong) (get_timer_masked() - start) < tmo)
  62. ;
  63. }
  64. static ulong get_timer_masked(void)
  65. {
  66. ulong now = READ_TIMER();
  67. if (now >= lastdec) {
  68. /* normal mode */
  69. timestamp += now - lastdec;
  70. } else {
  71. /* we have an overflow ... */
  72. timestamp += now + GPT_FREE_RUNNING - lastdec;
  73. }
  74. lastdec = now;
  75. return timestamp;
  76. }
  77. /*
  78. * This function is derived from PowerPC code (read timebase as long long).
  79. * On ARM it just returns the timer value.
  80. */
  81. unsigned long long get_ticks(void)
  82. {
  83. return get_timer(0);
  84. }
  85. /*
  86. * This function is derived from PowerPC code (timebase clock frequency).
  87. * On ARM it returns the number of timer ticks per second.
  88. */
  89. ulong get_tbclk(void)
  90. {
  91. return CONFIG_STV0991_HZ;
  92. }