timer.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <time.h>
  9. #include <asm/global_data.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/hardware.h>
  12. #include <asm/arch/spr_gpt.h>
  13. #include <asm/arch/spr_misc.h>
  14. #include <asm/ptrace.h>
  15. #include <linux/delay.h>
  16. #define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
  17. #define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
  18. static struct gpt_regs *const gpt_regs_p =
  19. (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
  20. static struct misc_regs *const misc_regs_p =
  21. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  22. DECLARE_GLOBAL_DATA_PTR;
  23. static ulong get_timer_masked(void);
  24. #define timestamp gd->arch.tbl
  25. #define lastdec gd->arch.lastinc
  26. int timer_init(void)
  27. {
  28. u32 synth;
  29. /* Prescaler setting */
  30. #if defined(CONFIG_SPEAR3XX)
  31. writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
  32. synth = MISC_GPT4SYNTH;
  33. #elif defined(CONFIG_SPEAR600)
  34. writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
  35. synth = MISC_GPT3SYNTH;
  36. #else
  37. # error Incorrect config. Can only be SPEAR{600|300|310|320}
  38. #endif
  39. writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
  40. &misc_regs_p->periph_clk_cfg);
  41. /* disable timers */
  42. writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
  43. /* load value for free running */
  44. writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
  45. /* auto reload, start timer */
  46. writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
  47. /* Reset the timer */
  48. lastdec = READ_TIMER();
  49. timestamp = 0;
  50. return 0;
  51. }
  52. /*
  53. * timer without interrupts
  54. */
  55. ulong get_timer(ulong base)
  56. {
  57. return (get_timer_masked() / GPT_RESOLUTION) - base;
  58. }
  59. void __udelay(unsigned long usec)
  60. {
  61. ulong tmo;
  62. ulong start = get_timer_masked();
  63. ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
  64. ulong rndoff;
  65. rndoff = (usec % 10) ? 1 : 0;
  66. /* tenudelcnt timer tick gives 10 microsecconds delay */
  67. tmo = ((usec / 10) + rndoff) * tenudelcnt;
  68. while ((ulong) (get_timer_masked() - start) < tmo)
  69. ;
  70. }
  71. static ulong get_timer_masked(void)
  72. {
  73. ulong now = READ_TIMER();
  74. if (now >= lastdec) {
  75. /* normal mode */
  76. timestamp += now - lastdec;
  77. } else {
  78. /* we have an overflow ... */
  79. timestamp += now + GPT_FREE_RUNNING - lastdec;
  80. }
  81. lastdec = now;
  82. return timestamp;
  83. }
  84. /*
  85. * This function is derived from PowerPC code (read timebase as long long).
  86. * On ARM it just returns the timer value.
  87. */
  88. unsigned long long get_ticks(void)
  89. {
  90. return get_timer(0);
  91. }
  92. /*
  93. * This function is derived from PowerPC code (timebase clock frequency).
  94. * On ARM it returns the number of timer ticks per second.
  95. */
  96. ulong get_tbclk(void)
  97. {
  98. return CONFIG_SPEAR_HZ;
  99. }