spr_misc.c 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <command.h>
  8. #include <cpu_func.h>
  9. #include <env.h>
  10. #include <i2c.h>
  11. #include <init.h>
  12. #include <net.h>
  13. #include <asm/global_data.h>
  14. #include <linux/mtd/st_smi.h>
  15. #include <asm/io.h>
  16. #include <asm/arch/hardware.h>
  17. #include <asm/arch/spr_emi.h>
  18. #include <asm/arch/spr_defs.h>
  19. #define CPU 0
  20. #define DDR 1
  21. #define SRAM_REL 0xD2801000
  22. DECLARE_GLOBAL_DATA_PTR;
  23. #if defined(CONFIG_CMD_NET)
  24. static int i2c_read_mac(uchar *buffer);
  25. #endif
  26. int dram_init(void)
  27. {
  28. /* Store complete RAM size and return */
  29. gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
  30. return 0;
  31. }
  32. int dram_init_banksize(void)
  33. {
  34. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  35. gd->bd->bi_dram[0].size = gd->ram_size;
  36. return 0;
  37. }
  38. int board_early_init_f()
  39. {
  40. #if defined(CONFIG_ST_SMI)
  41. smi_init();
  42. #endif
  43. return 0;
  44. }
  45. int misc_init_r(void)
  46. {
  47. #if defined(CONFIG_CMD_NET)
  48. uchar mac_id[6];
  49. if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
  50. eth_env_set_enetaddr("ethaddr", mac_id);
  51. #endif
  52. env_set("verify", "n");
  53. #if defined(CONFIG_SPEAR_USBTTY)
  54. env_set("stdin", "usbtty");
  55. env_set("stdout", "usbtty");
  56. env_set("stderr", "usbtty");
  57. #ifndef CONFIG_SYS_NO_DCACHE
  58. dcache_enable();
  59. #endif
  60. #endif
  61. return 0;
  62. }
  63. #ifdef CONFIG_SPEAR_EMI
  64. struct cust_emi_para {
  65. unsigned int tap;
  66. unsigned int tsdp;
  67. unsigned int tdpw;
  68. unsigned int tdpr;
  69. unsigned int tdcs;
  70. };
  71. /* EMI timing setting of m28w640hc of linux kernel */
  72. const struct cust_emi_para emi_timing_m28w640hc = {
  73. .tap = 0x10,
  74. .tsdp = 0x05,
  75. .tdpw = 0x0a,
  76. .tdpr = 0x0a,
  77. .tdcs = 0x05,
  78. };
  79. /* EMI timing setting of bootrom */
  80. const struct cust_emi_para emi_timing_bootrom = {
  81. .tap = 0xf,
  82. .tsdp = 0x0,
  83. .tdpw = 0xff,
  84. .tdpr = 0x111,
  85. .tdcs = 0x02,
  86. };
  87. void spear_emi_init(void)
  88. {
  89. const struct cust_emi_para *p = &emi_timing_m28w640hc;
  90. struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
  91. unsigned int cs;
  92. unsigned int val, tmp;
  93. val = readl(CONFIG_SPEAR_RASBASE);
  94. if (val & EMI_ACKMSK)
  95. tmp = 0x3f;
  96. else
  97. tmp = 0x0;
  98. writel(tmp, &emi_regs_p->ack);
  99. for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
  100. writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
  101. writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
  102. writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
  103. writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
  104. writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
  105. writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
  106. &emi_regs_p->bank_regs[cs].control);
  107. }
  108. }
  109. #endif
  110. int spear_board_init(ulong mach_type)
  111. {
  112. gd->bd->bi_arch_number = mach_type;
  113. /* adress of boot parameters */
  114. gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
  115. #ifdef CONFIG_SPEAR_EMI
  116. spear_emi_init();
  117. #endif
  118. return 0;
  119. }
  120. #if defined(CONFIG_CMD_NET)
  121. static int i2c_read_mac(uchar *buffer)
  122. {
  123. u8 buf[2];
  124. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  125. /* Check if mac in i2c memory is valid */
  126. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  127. /* Valid mac address is saved in i2c eeprom */
  128. i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
  129. return 0;
  130. }
  131. return -1;
  132. }
  133. static int write_mac(uchar *mac)
  134. {
  135. u8 buf[2];
  136. buf[0] = (u8)MAGIC_BYTE0;
  137. buf[1] = (u8)MAGIC_BYTE1;
  138. i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  139. buf[0] = (u8)~MAGIC_BYTE0;
  140. buf[1] = (u8)~MAGIC_BYTE1;
  141. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  142. /* check if valid MAC address is saved in I2C EEPROM or not? */
  143. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  144. i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
  145. puts("I2C EEPROM written with mac address \n");
  146. return 0;
  147. }
  148. puts("I2C EEPROM writing failed\n");
  149. return -1;
  150. }
  151. #endif
  152. int do_chip_config(struct cmd_tbl *cmdtp, int flag, int argc,
  153. char *const argv[])
  154. {
  155. void (*sram_setfreq) (unsigned int, unsigned int);
  156. unsigned int frequency;
  157. #if defined(CONFIG_CMD_NET)
  158. unsigned char mac[6];
  159. #endif
  160. if ((argc > 3) || (argc < 2))
  161. return cmd_usage(cmdtp);
  162. if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
  163. frequency = simple_strtoul(argv[2], NULL, 0);
  164. if (frequency > 333) {
  165. printf("Frequency is limited to 333MHz\n");
  166. return 1;
  167. }
  168. sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
  169. if (!strcmp(argv[1], "cpufreq")) {
  170. sram_setfreq(CPU, frequency);
  171. printf("CPU frequency changed to %u\n", frequency);
  172. } else {
  173. sram_setfreq(DDR, frequency);
  174. printf("DDR frequency changed to %u\n", frequency);
  175. }
  176. return 0;
  177. #if defined(CONFIG_CMD_NET)
  178. } else if (!strcmp(argv[1], "ethaddr")) {
  179. u32 reg;
  180. char *e, *s = argv[2];
  181. for (reg = 0; reg < 6; ++reg) {
  182. mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
  183. if (s)
  184. s = (*e) ? e + 1 : e;
  185. }
  186. write_mac(mac);
  187. return 0;
  188. #endif
  189. } else if (!strcmp(argv[1], "print")) {
  190. #if defined(CONFIG_CMD_NET)
  191. if (!i2c_read_mac(mac)) {
  192. printf("Ethaddr (from i2c mem) = %pM\n", mac);
  193. } else {
  194. printf("Ethaddr (from i2c mem) = Not set\n");
  195. }
  196. #endif
  197. return 0;
  198. }
  199. return cmd_usage(cmdtp);
  200. }
  201. U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
  202. "configure chip",
  203. "chip_config cpufreq/ddrfreq frequency\n"
  204. #if defined(CONFIG_CMD_NET)
  205. "chip_config ethaddr XX:XX:XX:XX:XX:XX\n"
  206. #endif
  207. "chip_config print");