start.S 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * armboot - Startup Code for ARM926EJS CPU-core
  4. *
  5. * Copyright (c) 2003 Texas Instruments
  6. *
  7. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  8. *
  9. * Copyright (c) 2001 Marius Groger <mag@sysgo.de>
  10. * Copyright (c) 2002 Alex Zupke <azu@sysgo.de>
  11. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  12. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  13. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  14. * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
  15. *
  16. * Change to support call back into iMX28 bootrom
  17. * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com>
  18. * on behalf of DENX Software Engineering GmbH
  19. */
  20. #include <asm-offsets.h>
  21. #include <config.h>
  22. #include <common.h>
  23. /*
  24. *************************************************************************
  25. *
  26. * Startup Code (reset vector)
  27. *
  28. * do important init only if we don't start from memory!
  29. * setup Memory and board specific bits prior to relocation.
  30. * relocate armboot to ram
  31. * setup stack
  32. *
  33. *************************************************************************
  34. */
  35. .globl reset
  36. reset:
  37. /*
  38. * If the CPU is configured in "Wait JTAG connection mode", the stack
  39. * pointer is not configured and is zero. This will cause crash when
  40. * trying to push data onto stack right below here. Load the SP and make
  41. * it point to the end of OCRAM if the SP is zero.
  42. */
  43. cmp sp, #0x00000000
  44. ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
  45. /*
  46. * Store all registers on old stack pointer, this will allow us later to
  47. * return to the BootROM and let the BootROM load U-Boot into RAM.
  48. *
  49. * WARNING: Register r0 and r1 are used by the BootROM to pass data
  50. * to the called code. Register r0 will contain arbitrary
  51. * data that are set in the BootStream. In case this code
  52. * was started with CALL instruction, register r1 will contain
  53. * pointer to the return value this function can then set.
  54. * The code below MUST NOT CHANGE register r0 and r1 !
  55. */
  56. push {r0-r12,r14}
  57. /* Save control register c1 */
  58. mrc p15, 0, r2, c1, c0, 0
  59. push {r2}
  60. /* Set the cpu to SVC32 mode and store old CPSR register content. */
  61. mrs r2, cpsr
  62. push {r2}
  63. bic r2, r2, #0x1f
  64. orr r2, r2, #0xd3
  65. msr cpsr, r2
  66. bl board_init_ll
  67. /* Restore BootROM's CPU mode (especially FIQ). */
  68. pop {r2}
  69. msr cpsr,r2
  70. /*
  71. * Restore c1 register. Especially set exception vector location
  72. * back to BootROM space which is required by bootrom for USB boot.
  73. */
  74. pop {r2}
  75. mcr p15, 0, r2, c1, c0, 0
  76. pop {r0-r12,r14}
  77. /*
  78. * In case this code was started by the CALL instruction, the register
  79. * r0 is examined by the BootROM after this code returns. The value in
  80. * r0 must be set to 0 to indicate successful return.
  81. */
  82. mov r0, #0
  83. bx lr