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  1. /*
  2. * armboot - Startup Code for ARM926EJS CPU-core
  3. *
  4. * Copyright (c) 2003 Texas Instruments
  5. *
  6. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  7. *
  8. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  9. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  10. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  11. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  12. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <asm-offsets.h>
  33. #include <config.h>
  34. #include <version.h>
  35. /*
  36. *************************************************************************
  37. *
  38. * Jump vector table
  39. *
  40. *************************************************************************
  41. */
  42. .globl _start
  43. _start:
  44. b reset
  45. ldr pc, _undefined_instruction
  46. ldr pc, _software_interrupt
  47. ldr pc, _prefetch_abort
  48. ldr pc, _data_abort
  49. ldr pc, _not_used
  50. ldr pc, _irq
  51. ldr pc, _fiq
  52. _undefined_instruction:
  53. .word undefined_instruction
  54. _software_interrupt:
  55. .word software_interrupt
  56. _prefetch_abort:
  57. .word prefetch_abort
  58. _data_abort:
  59. .word data_abort
  60. _not_used:
  61. .word not_used
  62. _irq:
  63. .word irq
  64. _fiq:
  65. .word fiq
  66. .balignl 16,0xdeadbeef
  67. /*
  68. *************************************************************************
  69. *
  70. * Startup Code (reset vector)
  71. *
  72. * do important init only if we don't start from memory!
  73. * setup memory and board specific bits prior to relocation.
  74. * relocate armboot to ram
  75. * setup stack
  76. *
  77. *************************************************************************
  78. */
  79. .globl _TEXT_BASE
  80. _TEXT_BASE:
  81. .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
  82. /*
  83. * These are defined in the board-specific linker script.
  84. * Subtracting _start from them lets the linker put their
  85. * relative position in the executable instead of leaving
  86. * them null.
  87. */
  88. .globl _bss_start_ofs
  89. _bss_start_ofs:
  90. .word __bss_start - _start
  91. .globl _bss_end_ofs
  92. _bss_end_ofs:
  93. .word __bss_end__ - _start
  94. .globl _end_ofs
  95. _end_ofs:
  96. .word _end - _start
  97. #ifdef CONFIG_USE_IRQ
  98. /* IRQ stack memory (calculated at run-time) */
  99. .globl IRQ_STACK_START
  100. IRQ_STACK_START:
  101. .word 0x0badc0de
  102. /* IRQ stack memory (calculated at run-time) */
  103. .globl FIQ_STACK_START
  104. FIQ_STACK_START:
  105. .word 0x0badc0de
  106. #endif
  107. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  108. .globl IRQ_STACK_START_IN
  109. IRQ_STACK_START_IN:
  110. .word 0x0badc0de
  111. /*
  112. * the actual reset code
  113. */
  114. reset:
  115. /*
  116. * set the cpu to SVC32 mode
  117. */
  118. mrs r0,cpsr
  119. bic r0,r0,#0x1f
  120. orr r0,r0,#0xd3
  121. msr cpsr,r0
  122. /*
  123. * we do sys-critical inits only at reboot,
  124. * not when booting from ram!
  125. */
  126. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  127. bl cpu_init_crit
  128. #endif
  129. /* Set stackpointer in internal RAM to call board_init_f */
  130. call_board_init_f:
  131. ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  132. bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  133. ldr r0,=0x00000000
  134. bl board_init_f
  135. /*------------------------------------------------------------------------------*/
  136. /*
  137. * void relocate_code (addr_sp, gd, addr_moni)
  138. *
  139. * This "function" does not return, instead it continues in RAM
  140. * after relocating the monitor code.
  141. *
  142. */
  143. .globl relocate_code
  144. relocate_code:
  145. mov r4, r0 /* save addr_sp */
  146. mov r5, r1 /* save addr of gd */
  147. mov r6, r2 /* save addr of destination */
  148. /* Set up the stack */
  149. stack_setup:
  150. mov sp, r4
  151. adr r0, _start
  152. cmp r0, r6
  153. beq clear_bss /* skip relocation */
  154. mov r1, r6 /* r1 <- scratch for copy_loop */
  155. ldr r3, _bss_start_ofs
  156. add r2, r0, r3 /* r2 <- source end address */
  157. copy_loop:
  158. ldmia r0!, {r9-r10} /* copy from source address [r0] */
  159. stmia r1!, {r9-r10} /* copy to target address [r1] */
  160. cmp r0, r2 /* until source end address [r2] */
  161. blo copy_loop
  162. #ifndef CONFIG_SPL_BUILD
  163. /*
  164. * fix .rel.dyn relocations
  165. */
  166. ldr r0, _TEXT_BASE /* r0 <- Text base */
  167. sub r9, r6, r0 /* r9 <- relocation offset */
  168. ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
  169. add r10, r10, r0 /* r10 <- sym table in FLASH */
  170. ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
  171. add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
  172. ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
  173. add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
  174. fixloop:
  175. ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
  176. add r0, r0, r9 /* r0 <- location to fix up in RAM */
  177. ldr r1, [r2, #4]
  178. and r7, r1, #0xff
  179. cmp r7, #23 /* relative fixup? */
  180. beq fixrel
  181. cmp r7, #2 /* absolute fixup? */
  182. beq fixabs
  183. /* ignore unknown type of fixup */
  184. b fixnext
  185. fixabs:
  186. /* absolute fix: set location to (offset) symbol value */
  187. mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
  188. add r1, r10, r1 /* r1 <- address of symbol in table */
  189. ldr r1, [r1, #4] /* r1 <- symbol value */
  190. add r1, r1, r9 /* r1 <- relocated sym addr */
  191. b fixnext
  192. fixrel:
  193. /* relative fix: increase location by offset */
  194. ldr r1, [r0]
  195. add r1, r1, r9
  196. fixnext:
  197. str r1, [r0]
  198. add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
  199. cmp r2, r3
  200. blo fixloop
  201. #endif
  202. clear_bss:
  203. #ifndef CONFIG_SPL_BUILD
  204. ldr r0, _bss_start_ofs
  205. ldr r1, _bss_end_ofs
  206. mov r4, r6 /* reloc addr */
  207. add r0, r0, r4
  208. add r1, r1, r4
  209. mov r2, #0x00000000 /* clear */
  210. clbss_l:str r2, [r0] /* clear loop... */
  211. add r0, r0, #4
  212. cmp r0, r1
  213. bne clbss_l
  214. bl coloured_LED_init
  215. bl red_LED_on
  216. #endif
  217. /*
  218. * We are done. Do not return, instead branch to second part of board
  219. * initialization, now running from RAM.
  220. */
  221. #ifdef CONFIG_NAND_SPL
  222. ldr r0, _nand_boot_ofs
  223. mov pc, r0
  224. _nand_boot_ofs:
  225. .word nand_boot
  226. #else
  227. ldr r0, _board_init_r_ofs
  228. adr r1, _start
  229. add lr, r0, r1
  230. add lr, lr, r9
  231. /* setup parameters for board_init_r */
  232. mov r0, r5 /* gd_t */
  233. mov r1, r6 /* dest_addr */
  234. /* jump to it ... */
  235. mov pc, lr
  236. _board_init_r_ofs:
  237. .word board_init_r - _start
  238. #endif
  239. _rel_dyn_start_ofs:
  240. .word __rel_dyn_start - _start
  241. _rel_dyn_end_ofs:
  242. .word __rel_dyn_end - _start
  243. _dynsym_start_ofs:
  244. .word __dynsym_start - _start
  245. /*
  246. *************************************************************************
  247. *
  248. * CPU_init_critical registers
  249. *
  250. * setup important registers
  251. * setup memory timing
  252. *
  253. *************************************************************************
  254. */
  255. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  256. cpu_init_crit:
  257. /* arm_int_generic assumes the ARM boot monitor, or user software,
  258. * has initialized the platform
  259. */
  260. mov pc, lr /* back to my caller */
  261. #endif
  262. /*
  263. *************************************************************************
  264. *
  265. * Interrupt handling
  266. *
  267. *************************************************************************
  268. */
  269. @
  270. @ IRQ stack frame.
  271. @
  272. #define S_FRAME_SIZE 72
  273. #define S_OLD_R0 68
  274. #define S_PSR 64
  275. #define S_PC 60
  276. #define S_LR 56
  277. #define S_SP 52
  278. #define S_IP 48
  279. #define S_FP 44
  280. #define S_R10 40
  281. #define S_R9 36
  282. #define S_R8 32
  283. #define S_R7 28
  284. #define S_R6 24
  285. #define S_R5 20
  286. #define S_R4 16
  287. #define S_R3 12
  288. #define S_R2 8
  289. #define S_R1 4
  290. #define S_R0 0
  291. #define MODE_SVC 0x13
  292. #define I_BIT 0x80
  293. /*
  294. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  295. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  296. */
  297. .macro bad_save_user_regs
  298. @ carve out a frame on current user stack
  299. sub sp, sp, #S_FRAME_SIZE
  300. stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
  301. ldr r2, IRQ_STACK_START_IN
  302. @ get values for "aborted" pc and cpsr (into parm regs)
  303. ldmia r2, {r2 - r3}
  304. add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
  305. add r5, sp, #S_SP
  306. mov r1, lr
  307. stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
  308. mov r0, sp @ save current stack into r0 (param register)
  309. .endm
  310. .macro irq_save_user_regs
  311. sub sp, sp, #S_FRAME_SIZE
  312. stmia sp, {r0 - r12} @ Calling r0-r12
  313. @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
  314. add r8, sp, #S_PC
  315. stmdb r8, {sp, lr}^ @ Calling SP, LR
  316. str lr, [r8, #0] @ Save calling PC
  317. mrs r6, spsr
  318. str r6, [r8, #4] @ Save CPSR
  319. str r0, [r8, #8] @ Save OLD_R0
  320. mov r0, sp
  321. .endm
  322. .macro irq_restore_user_regs
  323. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  324. mov r0, r0
  325. ldr lr, [sp, #S_PC] @ Get PC
  326. add sp, sp, #S_FRAME_SIZE
  327. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  328. .endm
  329. .macro get_bad_stack
  330. ldr r13, IRQ_STACK_START_IN @ setup our mode stack
  331. str lr, [r13] @ save caller lr in position 0 of saved stack
  332. mrs lr, spsr @ get the spsr
  333. str lr, [r13, #4] @ save spsr in position 1 of saved stack
  334. mov r13, #MODE_SVC @ prepare SVC-Mode
  335. @ msr spsr_c, r13
  336. msr spsr, r13 @ switch modes, make sure moves will execute
  337. mov lr, pc @ capture return pc
  338. movs pc, lr @ jump to next instruction & switch modes.
  339. .endm
  340. .macro get_irq_stack @ setup IRQ stack
  341. ldr sp, IRQ_STACK_START
  342. .endm
  343. .macro get_fiq_stack @ setup FIQ stack
  344. ldr sp, FIQ_STACK_START
  345. .endm
  346. /*
  347. * exception handlers
  348. */
  349. .align 5
  350. .globl undefined_instruction
  351. undefined_instruction:
  352. get_bad_stack
  353. bad_save_user_regs
  354. bl do_undefined_instruction
  355. .align 5
  356. .globl software_interrupt
  357. software_interrupt:
  358. get_bad_stack
  359. bad_save_user_regs
  360. bl do_software_interrupt
  361. .align 5
  362. .globl prefetch_abort
  363. prefetch_abort:
  364. get_bad_stack
  365. bad_save_user_regs
  366. bl do_prefetch_abort
  367. .align 5
  368. .globl data_abort
  369. data_abort:
  370. get_bad_stack
  371. bad_save_user_regs
  372. bl do_data_abort
  373. .align 5
  374. .globl not_used
  375. not_used:
  376. get_bad_stack
  377. bad_save_user_regs
  378. bl do_not_used
  379. #ifdef CONFIG_USE_IRQ
  380. .align 5
  381. .globl irq
  382. irq:
  383. get_irq_stack
  384. irq_save_user_regs
  385. bl do_irq
  386. irq_restore_user_regs
  387. .align 5
  388. .globl fiq
  389. fiq:
  390. get_fiq_stack
  391. /* someone ought to write a more effiction fiq_save_user_regs */
  392. irq_save_user_regs
  393. bl do_fiq
  394. irq_restore_user_regs
  395. #else
  396. .align 5
  397. .globl irq
  398. irq:
  399. get_bad_stack
  400. bad_save_user_regs
  401. bl do_irq
  402. .align 5
  403. .globl fiq
  404. fiq:
  405. get_bad_stack
  406. bad_save_user_regs
  407. bl do_fiq
  408. #endif