ti_sci_protocol.h 27 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Texas Instruments System Control Interface Protocol
  4. * Based on include/linux/soc/ti/ti_sci_protocol.h from Linux.
  5. *
  6. * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  7. * Nishanth Menon
  8. * Lokesh Vutla <lokeshvutla@ti.com>
  9. */
  10. #ifndef __TISCI_PROTOCOL_H
  11. #define __TISCI_PROTOCOL_H
  12. /**
  13. * struct ti_sci_version_info - version information structure
  14. * @abi_major: Major ABI version. Change here implies risk of backward
  15. * compatibility break.
  16. * @abi_minor: Minor ABI version. Change here implies new feature addition,
  17. * or compatible change in ABI.
  18. * @firmware_revision: Firmware revision (not usually used).
  19. * @firmware_description: Firmware description (not usually used).
  20. */
  21. #include <linux/bitops.h>
  22. struct ti_sci_version_info {
  23. u8 abi_major;
  24. u8 abi_minor;
  25. u16 firmware_revision;
  26. char firmware_description[32];
  27. };
  28. struct ti_sci_handle;
  29. /**
  30. * struct ti_sci_board_ops - Board config operations
  31. * @board_config: Command to set the board configuration
  32. * Returns 0 for successful exclusive request, else returns
  33. * corresponding error message.
  34. * @board_config_rm: Command to set the board resource management
  35. * configuration
  36. * Returns 0 for successful exclusive request, else returns
  37. * corresponding error message.
  38. * @board_config_security: Command to set the board security configuration
  39. * Returns 0 for successful exclusive request, else returns
  40. * corresponding error message.
  41. * @board_config_pm: Command to trigger and set the board power and clock
  42. * management related configuration
  43. * Returns 0 for successful exclusive request, else returns
  44. * corresponding error message.
  45. */
  46. struct ti_sci_board_ops {
  47. int (*board_config)(const struct ti_sci_handle *handle,
  48. u64 addr, u32 size);
  49. int (*board_config_rm)(const struct ti_sci_handle *handle,
  50. u64 addr, u32 size);
  51. int (*board_config_security)(const struct ti_sci_handle *handle,
  52. u64 addr, u32 size);
  53. int (*board_config_pm)(const struct ti_sci_handle *handle,
  54. u64 addr, u32 size);
  55. };
  56. /**
  57. * struct ti_sci_dev_ops - Device control operations
  58. * @get_device: Command to request for device managed by TISCI
  59. * Returns 0 for successful exclusive request, else returns
  60. * corresponding error message.
  61. * @idle_device: Command to idle a device managed by TISCI
  62. * Returns 0 for successful exclusive request, else returns
  63. * corresponding error message.
  64. * @put_device: Command to release a device managed by TISCI
  65. * Returns 0 for successful release, else returns corresponding
  66. * error message.
  67. * @is_valid: Check if the device ID is a valid ID.
  68. * Returns 0 if the ID is valid, else returns corresponding error.
  69. * @get_context_loss_count: Command to retrieve context loss counter - this
  70. * increments every time the device looses context. Overflow
  71. * is possible.
  72. * - count: pointer to u32 which will retrieve counter
  73. * Returns 0 for successful information request and count has
  74. * proper data, else returns corresponding error message.
  75. * @is_idle: Reports back about device idle state
  76. * - req_state: Returns requested idle state
  77. * Returns 0 for successful information request and req_state and
  78. * current_state has proper data, else returns corresponding error
  79. * message.
  80. * @is_stop: Reports back about device stop state
  81. * - req_state: Returns requested stop state
  82. * - current_state: Returns current stop state
  83. * Returns 0 for successful information request and req_state and
  84. * current_state has proper data, else returns corresponding error
  85. * message.
  86. * @is_on: Reports back about device ON(or active) state
  87. * - req_state: Returns requested ON state
  88. * - current_state: Returns current ON state
  89. * Returns 0 for successful information request and req_state and
  90. * current_state has proper data, else returns corresponding error
  91. * message.
  92. * @is_transitioning: Reports back if the device is in the middle of transition
  93. * of state.
  94. * -current_state: Returns 'true' if currently transitioning.
  95. * @set_device_resets: Command to configure resets for device managed by TISCI.
  96. * -reset_state: Device specific reset bit field
  97. * Returns 0 for successful request, else returns
  98. * corresponding error message.
  99. * @get_device_resets: Command to read state of resets for device managed
  100. * by TISCI.
  101. * -reset_state: pointer to u32 which will retrieve resets
  102. * Returns 0 for successful request, else returns
  103. * corresponding error message.
  104. * @release_exclusive_devices: Command to release all the exclusive devices
  105. * attached to this host. This should be used very carefully
  106. * and only at the end of execution of your software.
  107. *
  108. * NOTE: for all these functions, the following parameters are generic in
  109. * nature:
  110. * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
  111. * -id: Device Identifier
  112. *
  113. * Request for the device - NOTE: the client MUST maintain integrity of
  114. * usage count by balancing get_device with put_device. No refcounting is
  115. * managed by driver for that purpose.
  116. */
  117. struct ti_sci_dev_ops {
  118. int (*get_device)(const struct ti_sci_handle *handle, u32 id);
  119. int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
  120. int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
  121. int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
  122. u32 id);
  123. int (*put_device)(const struct ti_sci_handle *handle, u32 id);
  124. int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
  125. int (*get_context_loss_count)(const struct ti_sci_handle *handle,
  126. u32 id, u32 *count);
  127. int (*is_idle)(const struct ti_sci_handle *handle, u32 id,
  128. bool *requested_state);
  129. int (*is_stop)(const struct ti_sci_handle *handle, u32 id,
  130. bool *req_state, bool *current_state);
  131. int (*is_on)(const struct ti_sci_handle *handle, u32 id,
  132. bool *req_state, bool *current_state);
  133. int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id,
  134. bool *current_state);
  135. int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id,
  136. u32 reset_state);
  137. int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
  138. u32 *reset_state);
  139. int (*release_exclusive_devices)(const struct ti_sci_handle *handle);
  140. };
  141. /**
  142. * struct ti_sci_clk_ops - Clock control operations
  143. * @get_clock: Request for activation of clock and manage by processor
  144. * - needs_ssc: 'true' if Spread Spectrum clock is desired.
  145. * - can_change_freq: 'true' if frequency change is desired.
  146. * - enable_input_term: 'true' if input termination is desired.
  147. * @idle_clock: Request for Idling a clock managed by processor
  148. * @put_clock: Release the clock to be auto managed by TISCI
  149. * @is_auto: Is the clock being auto managed
  150. * - req_state: state indicating if the clock is auto managed
  151. * @is_on: Is the clock ON
  152. * - req_state: if the clock is requested to be forced ON
  153. * - current_state: if the clock is currently ON
  154. * @is_off: Is the clock OFF
  155. * - req_state: if the clock is requested to be forced OFF
  156. * - current_state: if the clock is currently Gated
  157. * @set_parent: Set the clock source of a specific device clock
  158. * - parent_id: Parent clock identifier to set.
  159. * @get_parent: Get the current clock source of a specific device clock
  160. * - parent_id: Parent clock identifier which is the parent.
  161. * @get_num_parents: Get the number of parents of the current clock source
  162. * - num_parents: returns the number of parent clocks.
  163. * @get_best_match_freq: Find a best matching frequency for a frequency
  164. * range.
  165. * - match_freq: Best matching frequency in Hz.
  166. * @set_freq: Set the Clock frequency
  167. * @get_freq: Get the Clock frequency
  168. * - current_freq: Frequency in Hz that the clock is at.
  169. *
  170. * NOTE: for all these functions, the following parameters are generic in
  171. * nature:
  172. * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
  173. * -did: Device identifier this request is for
  174. * -cid: Clock identifier for the device for this request.
  175. * Each device has it's own set of clock inputs. This indexes
  176. * which clock input to modify.
  177. * -min_freq: The minimum allowable frequency in Hz. This is the minimum
  178. * allowable programmed frequency and does not account for clock
  179. * tolerances and jitter.
  180. * -target_freq: The target clock frequency in Hz. A frequency will be
  181. * processed as close to this target frequency as possible.
  182. * -max_freq: The maximum allowable frequency in Hz. This is the maximum
  183. * allowable programmed frequency and does not account for clock
  184. * tolerances and jitter.
  185. *
  186. * Request for the clock - NOTE: the client MUST maintain integrity of
  187. * usage count by balancing get_clock with put_clock. No refcounting is
  188. * managed by driver for that purpose.
  189. */
  190. struct ti_sci_clk_ops {
  191. int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  192. bool needs_ssc, bool can_change_freq,
  193. bool enable_input_term);
  194. int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
  195. int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
  196. int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  197. bool *req_state);
  198. int (*is_on)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  199. bool *req_state, bool *current_state);
  200. int (*is_off)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  201. bool *req_state, bool *current_state);
  202. int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  203. u8 parent_id);
  204. int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  205. u8 *parent_id);
  206. int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did,
  207. u8 cid, u8 *num_parents);
  208. int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did,
  209. u8 cid, u64 min_freq, u64 target_freq,
  210. u64 max_freq, u64 *match_freq);
  211. int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  212. u64 min_freq, u64 target_freq, u64 max_freq);
  213. int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
  214. u64 *current_freq);
  215. };
  216. /**
  217. * struct ti_sci_rm_core_ops - Resource management core operations
  218. * @get_range: Get a range of resources belonging to ti sci host.
  219. * @get_rage_from_shost: Get a range of resources belonging to
  220. * specified host id.
  221. * - s_host: Host processing entity to which the
  222. * resources are allocated
  223. *
  224. * NOTE: for these functions, all the parameters are consolidated and defined
  225. * as below:
  226. * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
  227. * - dev_id: TISCI device ID.
  228. * - subtype: Resource assignment subtype that is being requested
  229. * from the given device.
  230. * - range_start: Start index of the resource range
  231. * - range_end: Number of resources in the range
  232. */
  233. struct ti_sci_rm_core_ops {
  234. int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id,
  235. u8 subtype, u16 *range_start, u16 *range_num);
  236. int (*get_range_from_shost)(const struct ti_sci_handle *handle,
  237. u32 dev_id, u8 subtype, u8 s_host,
  238. u16 *range_start, u16 *range_num);
  239. };
  240. /**
  241. * struct ti_sci_core_ops - SoC Core Operations
  242. * @reboot_device: Reboot the SoC
  243. * Returns 0 for successful request(ideally should never return),
  244. * else returns corresponding error value.
  245. * @query_msmc: Query the size of available msmc
  246. * Return 0 for successful query else appropriate error value.
  247. */
  248. struct ti_sci_core_ops {
  249. int (*reboot_device)(const struct ti_sci_handle *handle);
  250. int (*query_msmc)(const struct ti_sci_handle *handle,
  251. u64 *msmc_start, u64 *msmc_end);
  252. };
  253. /**
  254. * struct ti_sci_proc_ops - Processor specific operations.
  255. *
  256. * @proc_request: Request for controlling a physical processor.
  257. * The requesting host should be in the processor access list.
  258. * @proc_release: Relinquish a physical processor control
  259. * @proc_handover: Handover a physical processor control to another host
  260. * in the permitted list.
  261. * @set_proc_boot_cfg: Base configuration of the processor
  262. * @set_proc_boot_ctrl: Setup limited control flags in specific cases.
  263. * @proc_auth_boot_image:
  264. * @get_proc_boot_status: Get the state of physical processor
  265. * @proc_shutdown_no_wait: Shutdown a core without requesting or waiting for a
  266. * response.
  267. *
  268. * NOTE: for all these functions, the following parameters are generic in
  269. * nature:
  270. * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
  271. * -pid: Processor ID
  272. *
  273. */
  274. struct ti_sci_proc_ops {
  275. int (*proc_request)(const struct ti_sci_handle *handle, u8 pid);
  276. int (*proc_release)(const struct ti_sci_handle *handle, u8 pid);
  277. int (*proc_handover)(const struct ti_sci_handle *handle, u8 pid,
  278. u8 hid);
  279. int (*set_proc_boot_cfg)(const struct ti_sci_handle *handle, u8 pid,
  280. u64 bv, u32 cfg_set, u32 cfg_clr);
  281. int (*set_proc_boot_ctrl)(const struct ti_sci_handle *handle, u8 pid,
  282. u32 ctrl_set, u32 ctrl_clr);
  283. int (*proc_auth_boot_image)(const struct ti_sci_handle *handle,
  284. u64 *image_addr, u32 *image_size);
  285. int (*get_proc_boot_status)(const struct ti_sci_handle *handle, u8 pid,
  286. u64 *bv, u32 *cfg_flags, u32 *ctrl_flags,
  287. u32 *sts_flags);
  288. int (*proc_shutdown_no_wait)(const struct ti_sci_handle *handle,
  289. u8 pid);
  290. };
  291. #define TI_SCI_RING_MODE_RING (0)
  292. #define TI_SCI_RING_MODE_MESSAGE (1)
  293. #define TI_SCI_RING_MODE_CREDENTIALS (2)
  294. #define TI_SCI_RING_MODE_QM (3)
  295. #define TI_SCI_MSG_UNUSED_SECONDARY_HOST TI_SCI_RM_NULL_U8
  296. /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */
  297. #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0)
  298. /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */
  299. #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1)
  300. /* RA config.count parameter is valid for RM ring configure TI_SCI message */
  301. #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2)
  302. /* RA config.mode parameter is valid for RM ring configure TI_SCI message */
  303. #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3)
  304. /* RA config.size parameter is valid for RM ring configure TI_SCI message */
  305. #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4)
  306. /* RA config.order_id parameter is valid for RM ring configure TISCI message */
  307. #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5)
  308. #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \
  309. (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \
  310. TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \
  311. TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \
  312. TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \
  313. TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID)
  314. /**
  315. * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations
  316. * @config: configure the SoC Navigator Subsystem Ring Accelerator ring
  317. */
  318. struct ti_sci_rm_ringacc_ops {
  319. int (*config)(const struct ti_sci_handle *handle,
  320. u32 valid_params, u16 nav_id, u16 index,
  321. u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
  322. u8 size, u8 order_id
  323. );
  324. };
  325. /**
  326. * struct ti_sci_rm_psil_ops - PSI-L thread operations
  327. * @pair: pair PSI-L source thread to a destination thread.
  328. * If the src_thread is mapped to UDMA tchan, the corresponding channel's
  329. * TCHAN_THRD_ID register is updated.
  330. * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
  331. * RCHAN_THRD_ID register is updated.
  332. * @unpair: unpair PSI-L source thread from a destination thread.
  333. * If the src_thread is mapped to UDMA tchan, the corresponding channel's
  334. * TCHAN_THRD_ID register is cleared.
  335. * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
  336. * RCHAN_THRD_ID register is cleared.
  337. */
  338. struct ti_sci_rm_psil_ops {
  339. int (*pair)(const struct ti_sci_handle *handle, u32 nav_id,
  340. u32 src_thread, u32 dst_thread);
  341. int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id,
  342. u32 src_thread, u32 dst_thread);
  343. };
  344. /* UDMAP channel types */
  345. #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2
  346. #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */
  347. #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10
  348. #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11
  349. #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12
  350. #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13
  351. /* UDMAP channel atypes */
  352. #define TI_SCI_RM_UDMAP_ATYPE_PHYS 0
  353. #define TI_SCI_RM_UDMAP_ATYPE_INTERMEDIATE 1
  354. #define TI_SCI_RM_UDMAP_ATYPE_VIRTUAL 2
  355. /* UDMAP channel scheduling priorities */
  356. #define TI_SCI_RM_UDMAP_SCHED_PRIOR_HIGH 0
  357. #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDHIGH 1
  358. #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDLOW 2
  359. #define TI_SCI_RM_UDMAP_SCHED_PRIOR_LOW 3
  360. #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0
  361. #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2
  362. /* UDMAP TX/RX channel valid_params common declarations */
  363. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0)
  364. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1)
  365. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2)
  366. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3)
  367. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4)
  368. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5)
  369. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6)
  370. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7)
  371. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8)
  372. /**
  373. * Configures a Navigator Subsystem UDMAP transmit channel
  374. *
  375. * Configures a Navigator Subsystem UDMAP transmit channel registers.
  376. * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req
  377. */
  378. struct ti_sci_msg_rm_udmap_tx_ch_cfg {
  379. u32 valid_params;
  380. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9)
  381. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10)
  382. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
  383. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
  384. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
  385. u16 nav_id;
  386. u16 index;
  387. u8 tx_pause_on_err;
  388. u8 tx_filt_einfo;
  389. u8 tx_filt_pswords;
  390. u8 tx_atype;
  391. u8 tx_chan_type;
  392. u8 tx_supr_tdpkt;
  393. u16 tx_fetch_size;
  394. u8 tx_credit_count;
  395. u16 txcq_qnum;
  396. u8 tx_priority;
  397. u8 tx_qos;
  398. u8 tx_orderid;
  399. u16 fdepth;
  400. u8 tx_sched_priority;
  401. };
  402. /**
  403. * Configures a Navigator Subsystem UDMAP receive channel
  404. *
  405. * Configures a Navigator Subsystem UDMAP receive channel registers.
  406. * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req
  407. */
  408. struct ti_sci_msg_rm_udmap_rx_ch_cfg {
  409. u32 valid_params;
  410. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9)
  411. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10)
  412. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11)
  413. #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12)
  414. u16 nav_id;
  415. u16 index;
  416. u16 rx_fetch_size;
  417. u16 rxcq_qnum;
  418. u8 rx_priority;
  419. u8 rx_qos;
  420. u8 rx_orderid;
  421. u8 rx_sched_priority;
  422. u16 flowid_start;
  423. u16 flowid_cnt;
  424. u8 rx_pause_on_err;
  425. u8 rx_atype;
  426. u8 rx_chan_type;
  427. u8 rx_ignore_short;
  428. u8 rx_ignore_long;
  429. };
  430. /**
  431. * Configures a Navigator Subsystem UDMAP receive flow
  432. *
  433. * Configures a Navigator Subsystem UDMAP receive flow's registers.
  434. * See @tis_ci_msg_rm_udmap_flow_cfg_req
  435. */
  436. struct ti_sci_msg_rm_udmap_flow_cfg {
  437. u32 valid_params;
  438. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0)
  439. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1)
  440. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2)
  441. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3)
  442. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4)
  443. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5)
  444. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6)
  445. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7)
  446. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8)
  447. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9)
  448. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10)
  449. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11)
  450. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12)
  451. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13)
  452. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14)
  453. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15)
  454. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16)
  455. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17)
  456. #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18)
  457. u16 nav_id;
  458. u16 flow_index;
  459. u8 rx_einfo_present;
  460. u8 rx_psinfo_present;
  461. u8 rx_error_handling;
  462. u8 rx_desc_type;
  463. u16 rx_sop_offset;
  464. u16 rx_dest_qnum;
  465. u8 rx_src_tag_hi;
  466. u8 rx_src_tag_lo;
  467. u8 rx_dest_tag_hi;
  468. u8 rx_dest_tag_lo;
  469. u8 rx_src_tag_hi_sel;
  470. u8 rx_src_tag_lo_sel;
  471. u8 rx_dest_tag_hi_sel;
  472. u8 rx_dest_tag_lo_sel;
  473. u16 rx_fdq0_sz0_qnum;
  474. u16 rx_fdq1_qnum;
  475. u16 rx_fdq2_qnum;
  476. u16 rx_fdq3_qnum;
  477. u8 rx_ps_location;
  478. };
  479. /**
  480. * struct ti_sci_rm_udmap_ops - UDMA Management operations
  481. * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel.
  482. * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel.
  483. * @rx_flow_cfg: configure SoC Navigator Subsystem UDMA receive flow.
  484. */
  485. struct ti_sci_rm_udmap_ops {
  486. int (*tx_ch_cfg)(const struct ti_sci_handle *handle,
  487. const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params);
  488. int (*rx_ch_cfg)(const struct ti_sci_handle *handle,
  489. const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params);
  490. int (*rx_flow_cfg)(
  491. const struct ti_sci_handle *handle,
  492. const struct ti_sci_msg_rm_udmap_flow_cfg *params);
  493. };
  494. /**
  495. * struct ti_sci_msg_fwl_region_cfg - Request and Response for firewalls settings
  496. *
  497. * @fwl_id: Firewall ID in question
  498. * @region: Region or channel number to set config info
  499. * This field is unused in case of a simple firewall and must be initialized
  500. * to zero. In case of a region based firewall, this field indicates the
  501. * region in question. (index starting from 0) In case of a channel based
  502. * firewall, this field indicates the channel in question (index starting
  503. * from 0)
  504. * @n_permission_regs: Number of permission registers to set
  505. * @control: Contents of the firewall CONTROL register to set
  506. * @permissions: Contents of the firewall PERMISSION register to set
  507. * @start_address: Contents of the firewall START_ADDRESS register to set
  508. * @end_address: Contents of the firewall END_ADDRESS register to set
  509. */
  510. struct ti_sci_msg_fwl_region {
  511. u16 fwl_id;
  512. u16 region;
  513. u32 n_permission_regs;
  514. u32 control;
  515. u32 permissions[3];
  516. u64 start_address;
  517. u64 end_address;
  518. } __packed;
  519. /**
  520. * \brief Request and Response for firewall owner change
  521. *
  522. * @fwl_id: Firewall ID in question
  523. * @region: Region or channel number to set config info
  524. * This field is unused in case of a simple firewall and must be initialized
  525. * to zero. In case of a region based firewall, this field indicates the
  526. * region in question. (index starting from 0) In case of a channel based
  527. * firewall, this field indicates the channel in question (index starting
  528. * from 0)
  529. * @n_permission_regs: Number of permission registers <= 3
  530. * @control: Control register value for this region
  531. * @owner_index: New owner index to change to. Owner indexes are setup in DMSC firmware boot configuration data
  532. * @owner_privid: New owner priv-id, used to lookup owner_index is not known, must be set to zero otherwise
  533. * @owner_permission_bits: New owner permission bits
  534. */
  535. struct ti_sci_msg_fwl_owner {
  536. u16 fwl_id;
  537. u16 region;
  538. u8 owner_index;
  539. u8 owner_privid;
  540. u16 owner_permission_bits;
  541. } __packed;
  542. /**
  543. * struct ti_sci_fwl_ops - Firewall specific operations
  544. * @set_fwl_region: Request for configuring the firewall permissions.
  545. * @get_fwl_region: Request for retrieving the firewall permissions.
  546. * @change_fwl_owner: Request for a change of firewall owner.
  547. */
  548. struct ti_sci_fwl_ops {
  549. int (*set_fwl_region)(const struct ti_sci_handle *handle, const struct ti_sci_msg_fwl_region *region);
  550. int (*get_fwl_region)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_region *region);
  551. int (*change_fwl_owner)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_owner *owner);
  552. };
  553. /**
  554. * struct ti_sci_ops - Function support for TI SCI
  555. * @board_ops: Miscellaneous operations
  556. * @dev_ops: Device specific operations
  557. * @clk_ops: Clock specific operations
  558. * @core_ops: Core specific operations
  559. * @proc_ops: Processor specific operations
  560. * @ring_ops: Ring Accelerator Management operations
  561. * @fw_ops: Firewall specific operations
  562. */
  563. struct ti_sci_ops {
  564. struct ti_sci_board_ops board_ops;
  565. struct ti_sci_dev_ops dev_ops;
  566. struct ti_sci_clk_ops clk_ops;
  567. struct ti_sci_core_ops core_ops;
  568. struct ti_sci_proc_ops proc_ops;
  569. struct ti_sci_rm_core_ops rm_core_ops;
  570. struct ti_sci_rm_ringacc_ops rm_ring_ops;
  571. struct ti_sci_rm_psil_ops rm_psil_ops;
  572. struct ti_sci_rm_udmap_ops rm_udmap_ops;
  573. struct ti_sci_fwl_ops fwl_ops;
  574. };
  575. /**
  576. * struct ti_sci_handle - Handle returned to TI SCI clients for usage.
  577. * @ops: operations that are made available to TI SCI clients
  578. * @version: structure containing version information
  579. */
  580. struct ti_sci_handle {
  581. struct ti_sci_ops ops;
  582. struct ti_sci_version_info version;
  583. };
  584. #define TI_SCI_RESOURCE_NULL 0xffff
  585. /**
  586. * struct ti_sci_resource_desc - Description of TI SCI resource instance range.
  587. * @start: Start index of the resource.
  588. * @num: Number of resources.
  589. * @res_map: Bitmap to manage the allocation of these resources.
  590. */
  591. struct ti_sci_resource_desc {
  592. u16 start;
  593. u16 num;
  594. unsigned long *res_map;
  595. };
  596. /**
  597. * struct ti_sci_resource - Structure representing a resource assigned
  598. * to a device.
  599. * @sets: Number of sets available from this resource type
  600. * @desc: Array of resource descriptors.
  601. */
  602. struct ti_sci_resource {
  603. u16 sets;
  604. struct ti_sci_resource_desc *desc;
  605. };
  606. #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL)
  607. const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev);
  608. const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev);
  609. const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
  610. const char *property);
  611. u16 ti_sci_get_free_resource(struct ti_sci_resource *res);
  612. void ti_sci_release_resource(struct ti_sci_resource *res, u16 id);
  613. struct ti_sci_resource *
  614. devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
  615. struct udevice *dev, u32 dev_id, char *of_prop);
  616. #else /* CONFIG_TI_SCI_PROTOCOL */
  617. static inline
  618. const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev)
  619. {
  620. return ERR_PTR(-EINVAL);
  621. }
  622. static inline const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev)
  623. {
  624. return ERR_PTR(-EINVAL);
  625. }
  626. static inline
  627. const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
  628. const char *property)
  629. {
  630. return ERR_PTR(-EINVAL);
  631. }
  632. static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res)
  633. {
  634. return TI_SCI_RESOURCE_NULL;
  635. }
  636. static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id)
  637. {
  638. }
  639. static inline struct ti_sci_resource *
  640. devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
  641. struct udevice *dev, u32 dev_id, char *of_prop)
  642. {
  643. return ERR_PTR(-EINVAL);
  644. }
  645. #endif /* CONFIG_TI_SCI_PROTOCOL */
  646. #endif /* __TISCI_PROTOCOL_H */