imx8qm_rom7720.h 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2018 NXP
  4. */
  5. #ifndef __IMX8QM_ROM7720_H
  6. #define __IMX8QM_ROM7720_H
  7. #include <linux/sizes.h>
  8. #include <linux/stringify.h>
  9. #include <asm/arch/imx-regs.h>
  10. #define CONFIG_REMAKE_ELF
  11. #define CONFIG_SPL_MAX_SIZE (124 * 1024)
  12. #define CONFIG_SPL_BSS_START_ADDR 0x00128000
  13. #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
  14. #define CONFIG_FSL_USDHC
  15. #define CONFIG_SYS_BOOTMAPSZ (256 << 20)
  16. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  17. #define USDHC1_BASE_ADDR 0x5B010000
  18. #define USDHC2_BASE_ADDR 0x5B020000
  19. #define USDHC3_BASE_ADDR 0x5B030000
  20. #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
  21. #define CONFIG_ENV_OVERWRITE
  22. #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  23. /* FUSE command */
  24. /* Boot M4 */
  25. #define M4_BOOT_ENV \
  26. "m4_0_image=m4_0.bin\0" \
  27. "m4_1_image=m4_1.bin\0" \
  28. "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
  29. "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
  30. "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
  31. "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
  32. #ifdef CONFIG_NAND_BOOT
  33. #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
  34. #else
  35. #define MFG_NAND_PARTITION ""
  36. #endif
  37. #define CONFIG_MFG_ENV_SETTINGS \
  38. "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  39. "rdinit=/linuxrc " \
  40. "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  41. "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  42. "g_mass_storage.iSerialNumber=\"\" "\
  43. MFG_NAND_PARTITION \
  44. "clk_ignore_unused "\
  45. "\0" \
  46. "initrd_addr=0x83800000\0" \
  47. "initrd_high=0xffffffffffffffff\0" \
  48. "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  49. /* Initial environment variables */
  50. #define CONFIG_EXTRA_ENV_SETTINGS \
  51. CONFIG_MFG_ENV_SETTINGS \
  52. M4_BOOT_ENV \
  53. "script=boot.scr\0" \
  54. "image=Image\0" \
  55. "panel=NULL\0" \
  56. "console=ttyLP0\0" \
  57. "fdt_addr=0x83000000\0" \
  58. "boot_fdt=try\0" \
  59. "fdt_file=imx8qm-rom7720-a1.dtb\0" \
  60. "initrd_addr=0x83800000\0" \
  61. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  62. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  63. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  64. "mmcautodetect=yes\0" \
  65. "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
  66. "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  67. "bootscript=echo Running bootscript from mmc ...; " \
  68. "source\0" \
  69. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  70. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  71. "mmcboot=echo Booting from mmc ...; " \
  72. "run mmcargs; " \
  73. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  74. "if run loadfdt; then " \
  75. "booti ${loadaddr} - ${fdt_addr}; " \
  76. "else " \
  77. "echo WARN: Cannot load the DT; " \
  78. "fi; " \
  79. "else " \
  80. "echo wait for boot; " \
  81. "fi;\0" \
  82. "netargs=setenv bootargs console=${console},${baudrate} " \
  83. "root=/dev/nfs " \
  84. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
  85. "netboot=echo Booting from net ...; " \
  86. "run netargs; " \
  87. "if test ${ip_dyn} = yes; then " \
  88. "setenv get_cmd dhcp; " \
  89. "else " \
  90. "setenv get_cmd tftp; " \
  91. "fi; " \
  92. "${get_cmd} ${loadaddr} ${image}; " \
  93. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  94. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  95. "booti ${loadaddr} - ${fdt_addr}; " \
  96. "else " \
  97. "echo WARN: Cannot load the DT; " \
  98. "fi; " \
  99. "else " \
  100. "booti; " \
  101. "fi;\0"
  102. #define CONFIG_BOOTCOMMAND \
  103. "mmc dev ${mmcdev}; if mmc rescan; then " \
  104. "if run loadbootscript; then " \
  105. "run bootscript; " \
  106. "else " \
  107. "if run loadimage; then " \
  108. "run mmcboot; " \
  109. "else run netboot; " \
  110. "fi; " \
  111. "fi; " \
  112. "else booti ${loadaddr} - ${fdt_addr}; fi"
  113. /* Link Definitions */
  114. #define CONFIG_LOADADDR 0x80280000
  115. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  116. #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
  117. /* Default environment is in SD */
  118. #ifdef CONFIG_QSPI_BOOT
  119. #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
  120. #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
  121. #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
  122. #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
  123. #else
  124. #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
  125. #endif
  126. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  127. /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
  128. * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
  129. * USDHC2 is for SD, USDHC3 is for SD on base board
  130. */
  131. #define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC3 */
  132. #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
  133. #define CONFIG_SYS_FSL_USDHC_NUM 3
  134. /* Size of malloc() pool */
  135. #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
  136. #define CONFIG_SYS_SDRAM_BASE 0x80000000
  137. #define PHYS_SDRAM_1 0x80000000
  138. #define PHYS_SDRAM_2 0x880000000
  139. #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
  140. /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
  141. #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
  142. /* Generic Timer Definitions */
  143. #define COUNTER_FREQUENCY 8000000 /* 8MHz */
  144. /* Networking */
  145. #define CONFIG_FEC_XCV_TYPE RGMII
  146. #define FEC_QUIRK_ENET_MAC
  147. #include <linux/stringify.h>
  148. #endif /* __IMX8QM_ROM7720_H */