imx8mq_phanbell.h 5.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2020 NXP
  4. */
  5. #ifndef __IMX8M_PHANBELL_H
  6. #define __IMX8M_PHANBELL_H
  7. #include <linux/sizes.h>
  8. #include <asm/arch/imx-regs.h>
  9. #define CONFIG_SPL_MAX_SIZE (172 * 1024)
  10. #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
  11. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  12. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  13. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  14. #ifdef CONFIG_SPL_BUILD
  15. /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  16. #define CONFIG_SPL_WATCHDOG_SUPPORT
  17. #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  18. #define CONFIG_SPL_POWER_SUPPORT
  19. #define CONFIG_SPL_I2C_SUPPORT
  20. #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
  21. #define CONFIG_SPL_STACK 0x187FF0
  22. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  23. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  24. #define CONFIG_SPL_GPIO_SUPPORT
  25. #define CONFIG_SPL_MMC_SUPPORT
  26. #define CONFIG_SPL_BSS_START_ADDR 0x00180000
  27. #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
  28. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  29. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
  30. #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
  31. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  32. #define CONFIG_MALLOC_F_ADDR 0x182000
  33. /* For RAW image gives a error info not panic */
  34. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  35. #undef CONFIG_DM_MMC
  36. #undef CONFIG_DM_PMIC
  37. #undef CONFIG_DM_PMIC_PFUZE100
  38. #define CONFIG_SYS_I2C
  39. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  40. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  41. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  42. #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  43. #define CONFIG_POWER
  44. #define CONFIG_POWER_I2C
  45. #endif
  46. #define CONFIG_REMAKE_ELF
  47. /* ENET Config */
  48. /* ENET1 */
  49. #if defined(CONFIG_CMD_NET)
  50. #define CONFIG_MII
  51. #define CONFIG_ETHPRIME "FEC"
  52. #define CONFIG_FEC_MXC
  53. #define CONFIG_FEC_XCV_TYPE RGMII
  54. #define CONFIG_FEC_MXC_PHYADDR 0
  55. #define FEC_QUIRK_ENET_MAC
  56. #define CONFIG_PHY_GIGE
  57. #define IMX_FEC_BASE 0x30BE0000
  58. #define CONFIG_PHYLIB
  59. #endif
  60. #define CONFIG_MFG_ENV_SETTINGS \
  61. "initrd_addr=0x43800000\0" \
  62. "initrd_high=0xffffffff\0" \
  63. /* Initial environment variables */
  64. #define CONFIG_EXTRA_ENV_SETTINGS \
  65. CONFIG_MFG_ENV_SETTINGS \
  66. "script=boot.scr\0" \
  67. "image=Image\0" \
  68. "console=ttymxc0,115200\0" \
  69. "fdt_addr=0x43000000\0" \
  70. "fdt_high=0xffffffffffffffff\0" \
  71. "boot_fdt=try\0" \
  72. "fdt_file=imx8mq-phanbell.dtb\0" \
  73. "initrd_addr=0x43800000\0" \
  74. "initrd_high=0xffffffffffffffff\0" \
  75. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  76. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  77. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  78. "mmcautodetect=yes\0" \
  79. "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  80. "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  81. "bootscript=echo Running bootscript from mmc ...; " \
  82. "source\0" \
  83. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  84. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  85. "mmcboot=echo Booting from mmc ...; " \
  86. "run mmcargs; " \
  87. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  88. "if run loadfdt; then " \
  89. "booti ${loadaddr} - ${fdt_addr}; " \
  90. "else " \
  91. "echo WARN: Cannot load the DT; " \
  92. "fi; " \
  93. "else " \
  94. "echo wait for boot; " \
  95. "fi;\0" \
  96. "netargs=setenv bootargs console=${console} " \
  97. "root=/dev/nfs " \
  98. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  99. "netboot=echo Booting from net ...; " \
  100. "run netargs; " \
  101. "if test ${ip_dyn} = yes; then " \
  102. "setenv get_cmd dhcp; " \
  103. "else " \
  104. "setenv get_cmd tftp; " \
  105. "fi; " \
  106. "${get_cmd} ${loadaddr} ${image}; " \
  107. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  108. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  109. "booti ${loadaddr} - ${fdt_addr}; " \
  110. "else " \
  111. "echo WARN: Cannot load the DT; " \
  112. "fi; " \
  113. "else " \
  114. "booti; " \
  115. "fi;\0"
  116. #define CONFIG_BOOTCOMMAND \
  117. "mmc dev ${mmcdev}; if mmc rescan; then " \
  118. "if run loadbootscript; then " \
  119. "run bootscript; " \
  120. "else " \
  121. "if run loadimage; then " \
  122. "run mmcboot; " \
  123. "else run netboot; " \
  124. "fi; " \
  125. "fi; " \
  126. "else booti ${loadaddr} - ${fdt_addr}; fi"
  127. /* Link Definitions */
  128. #define CONFIG_LOADADDR 0x40480000
  129. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  130. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  131. #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
  132. #define CONFIG_SYS_INIT_SP_OFFSET \
  133. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  134. #define CONFIG_SYS_INIT_SP_ADDR \
  135. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  136. #define CONFIG_ENV_OVERWRITE
  137. #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
  138. #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
  139. /* Size of malloc() pool */
  140. #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
  141. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  142. #define PHYS_SDRAM 0x40000000
  143. #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
  144. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  145. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
  146. (PHYS_SDRAM_SIZE >> 1))
  147. #define CONFIG_MXC_UART
  148. #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
  149. /* Monitor Command Prompt */
  150. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  151. #define CONFIG_SYS_CBSIZE 1024
  152. #define CONFIG_SYS_MAXARGS 64
  153. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  154. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  155. sizeof(CONFIG_SYS_PROMPT) + 16)
  156. #define CONFIG_IMX_BOOTAUX
  157. #define CONFIG_SYS_FSL_USDHC_NUM 2
  158. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  159. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  160. #define CONFIG_MXC_GPIO
  161. /* I2C Configs */
  162. #define CONFIG_SYS_I2C_SPEED 100000
  163. #define CONFIG_OF_SYSTEM_SETUP
  164. #ifndef CONFIG_SPL_BUILD
  165. #define CONFIG_DM_PMIC
  166. #endif
  167. #endif