ax25-ae350.h 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2017 Andes Technology Corporation
  4. * Rick Chen, Andes Technology Corporation <rick@andestech.com>
  5. */
  6. #ifndef __CONFIG_H
  7. #define __CONFIG_H
  8. #ifdef CONFIG_SPL
  9. #define CONFIG_SPL_MAX_SIZE 0x00100000
  10. #define CONFIG_SPL_BSS_START_ADDR 0x04000000
  11. #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
  12. #ifndef CONFIG_XIP
  13. #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x00200000
  14. #else
  15. #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80010000
  16. #endif
  17. #ifdef CONFIG_SPL_MMC_SUPPORT
  18. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  19. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb"
  20. #endif
  21. #endif
  22. /*
  23. * CPU and Board Configuration Options
  24. */
  25. #define CONFIG_BOOTP_SEND_HOSTNAME
  26. /*
  27. * Miscellaneous configurable options
  28. */
  29. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  30. /*
  31. * Print Buffer Size
  32. */
  33. #define CONFIG_SYS_PBSIZE \
  34. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  35. /*
  36. * max number of command args
  37. */
  38. #define CONFIG_SYS_MAXARGS 16
  39. /*
  40. * Boot Argument Buffer Size
  41. */
  42. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  43. /*
  44. * Size of malloc() pool
  45. * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
  46. */
  47. #define CONFIG_SYS_MALLOC_LEN (512 << 10)
  48. /* DT blob (fdt) address */
  49. #define CONFIG_SYS_FDT_BASE 0x800f0000
  50. /*
  51. * Physical Memory Map
  52. */
  53. #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
  54. #define PHYS_SDRAM_1 \
  55. (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
  56. #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
  57. #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
  58. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
  59. /*
  60. * Serial console configuration
  61. */
  62. #define CONFIG_SYS_NS16550_SERIAL
  63. #ifndef CONFIG_DM_SERIAL
  64. #define CONFIG_SYS_NS16550_REG_SIZE -4
  65. #endif
  66. #define CONFIG_SYS_NS16550_CLK 19660800
  67. /* Init Stack Pointer */
  68. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
  69. GENERATED_GBL_DATA_SIZE)
  70. /*
  71. * Load address and memory test area should agree with
  72. * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
  73. */
  74. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */
  75. /*
  76. * memtest works on 512 MB in DRAM
  77. */
  78. /*
  79. * FLASH and environment organization
  80. */
  81. /* use CFI framework */
  82. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  83. #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
  84. /* support JEDEC */
  85. #ifdef CONFIG_CFI_FLASH
  86. #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
  87. #endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
  88. #define PHYS_FLASH_1 0x88000000 /* BANK 0 */
  89. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  90. #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
  91. #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
  92. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */
  93. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */
  94. /* max number of memory banks */
  95. /*
  96. * There are 4 banks supported for this Controller,
  97. * but we have only 1 bank connected to flash on board
  98. */
  99. #ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  100. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  101. #endif
  102. #define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
  103. /* max number of sectors on one chip */
  104. #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
  105. #define CONFIG_SYS_MAX_FLASH_SECT 512
  106. /* environments */
  107. #define CONFIG_ENV_OVERWRITE
  108. /* SPI FLASH */
  109. /*
  110. * For booting Linux, the board info and command line data
  111. * have to be in the first 16 MB of memory, since this is
  112. * the maximum mapped by the Linux kernel during initialization.
  113. */
  114. /* Initial Memory map for Linux*/
  115. #define CONFIG_SYS_BOOTMAPSZ (64 << 20)
  116. /* Increase max gunzip size */
  117. #define CONFIG_SYS_BOOTM_LEN (64 << 20)
  118. /* When we use RAM as ENV */
  119. /* Enable distro boot */
  120. #define BOOT_TARGET_DEVICES(func) \
  121. func(MMC, mmc, 0) \
  122. func(DHCP, dhcp, na)
  123. #include <config_distro_bootcmd.h>
  124. #define CONFIG_EXTRA_ENV_SETTINGS \
  125. "kernel_addr_r=0x00080000\0" \
  126. "pxefile_addr_r=0x01f00000\0" \
  127. "scriptaddr=0x01f00000\0" \
  128. "fdt_addr_r=0x02000000\0" \
  129. "ramdisk_addr_r=0x02800000\0" \
  130. BOOTENV
  131. #endif /* __CONFIG_H */