start.S 8.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382
  1. /*
  2. * Startup Code for MIPS32 CPU-core
  3. *
  4. * Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <config.h>
  25. #include <version.h>
  26. #include <asm/regdef.h>
  27. #include <asm/mipsregs.h>
  28. #define RVECENT(f,n) \
  29. b f; nop
  30. #define XVECENT(f,bev) \
  31. b f ; \
  32. li k0,bev
  33. .set noreorder
  34. .globl _start
  35. .text
  36. _start:
  37. RVECENT(reset,0) /* U-boot entry point */
  38. RVECENT(reset,1) /* software reboot */
  39. #if defined(CONFIG_INCA_IP)
  40. .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
  41. .word 0x00000000 /* phase of the flash */
  42. #elif defined(CONFIG_PURPLE)
  43. .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
  44. .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
  45. #else
  46. RVECENT(romReserved,2)
  47. #endif
  48. RVECENT(romReserved,3)
  49. RVECENT(romReserved,4)
  50. RVECENT(romReserved,5)
  51. RVECENT(romReserved,6)
  52. RVECENT(romReserved,7)
  53. RVECENT(romReserved,8)
  54. RVECENT(romReserved,9)
  55. RVECENT(romReserved,10)
  56. RVECENT(romReserved,11)
  57. RVECENT(romReserved,12)
  58. RVECENT(romReserved,13)
  59. RVECENT(romReserved,14)
  60. RVECENT(romReserved,15)
  61. RVECENT(romReserved,16)
  62. RVECENT(romReserved,17)
  63. RVECENT(romReserved,18)
  64. RVECENT(romReserved,19)
  65. RVECENT(romReserved,20)
  66. RVECENT(romReserved,21)
  67. RVECENT(romReserved,22)
  68. RVECENT(romReserved,23)
  69. RVECENT(romReserved,24)
  70. RVECENT(romReserved,25)
  71. RVECENT(romReserved,26)
  72. RVECENT(romReserved,27)
  73. RVECENT(romReserved,28)
  74. RVECENT(romReserved,29)
  75. RVECENT(romReserved,30)
  76. RVECENT(romReserved,31)
  77. RVECENT(romReserved,32)
  78. RVECENT(romReserved,33)
  79. RVECENT(romReserved,34)
  80. RVECENT(romReserved,35)
  81. RVECENT(romReserved,36)
  82. RVECENT(romReserved,37)
  83. RVECENT(romReserved,38)
  84. RVECENT(romReserved,39)
  85. RVECENT(romReserved,40)
  86. RVECENT(romReserved,41)
  87. RVECENT(romReserved,42)
  88. RVECENT(romReserved,43)
  89. RVECENT(romReserved,44)
  90. RVECENT(romReserved,45)
  91. RVECENT(romReserved,46)
  92. RVECENT(romReserved,47)
  93. RVECENT(romReserved,48)
  94. RVECENT(romReserved,49)
  95. RVECENT(romReserved,50)
  96. RVECENT(romReserved,51)
  97. RVECENT(romReserved,52)
  98. RVECENT(romReserved,53)
  99. RVECENT(romReserved,54)
  100. RVECENT(romReserved,55)
  101. RVECENT(romReserved,56)
  102. RVECENT(romReserved,57)
  103. RVECENT(romReserved,58)
  104. RVECENT(romReserved,59)
  105. RVECENT(romReserved,60)
  106. RVECENT(romReserved,61)
  107. RVECENT(romReserved,62)
  108. RVECENT(romReserved,63)
  109. XVECENT(romExcHandle,0x200) /* bfc00200: R4000 tlbmiss vector */
  110. RVECENT(romReserved,65)
  111. RVECENT(romReserved,66)
  112. RVECENT(romReserved,67)
  113. RVECENT(romReserved,68)
  114. RVECENT(romReserved,69)
  115. RVECENT(romReserved,70)
  116. RVECENT(romReserved,71)
  117. RVECENT(romReserved,72)
  118. RVECENT(romReserved,73)
  119. RVECENT(romReserved,74)
  120. RVECENT(romReserved,75)
  121. RVECENT(romReserved,76)
  122. RVECENT(romReserved,77)
  123. RVECENT(romReserved,78)
  124. RVECENT(romReserved,79)
  125. XVECENT(romExcHandle,0x280) /* bfc00280: R4000 xtlbmiss vector */
  126. RVECENT(romReserved,81)
  127. RVECENT(romReserved,82)
  128. RVECENT(romReserved,83)
  129. RVECENT(romReserved,84)
  130. RVECENT(romReserved,85)
  131. RVECENT(romReserved,86)
  132. RVECENT(romReserved,87)
  133. RVECENT(romReserved,88)
  134. RVECENT(romReserved,89)
  135. RVECENT(romReserved,90)
  136. RVECENT(romReserved,91)
  137. RVECENT(romReserved,92)
  138. RVECENT(romReserved,93)
  139. RVECENT(romReserved,94)
  140. RVECENT(romReserved,95)
  141. XVECENT(romExcHandle,0x300) /* bfc00300: R4000 cache vector */
  142. RVECENT(romReserved,97)
  143. RVECENT(romReserved,98)
  144. RVECENT(romReserved,99)
  145. RVECENT(romReserved,100)
  146. RVECENT(romReserved,101)
  147. RVECENT(romReserved,102)
  148. RVECENT(romReserved,103)
  149. RVECENT(romReserved,104)
  150. RVECENT(romReserved,105)
  151. RVECENT(romReserved,106)
  152. RVECENT(romReserved,107)
  153. RVECENT(romReserved,108)
  154. RVECENT(romReserved,109)
  155. RVECENT(romReserved,110)
  156. RVECENT(romReserved,111)
  157. XVECENT(romExcHandle,0x380) /* bfc00380: R4000 general vector */
  158. RVECENT(romReserved,113)
  159. RVECENT(romReserved,114)
  160. RVECENT(romReserved,115)
  161. RVECENT(romReserved,116)
  162. RVECENT(romReserved,116)
  163. RVECENT(romReserved,118)
  164. RVECENT(romReserved,119)
  165. RVECENT(romReserved,120)
  166. RVECENT(romReserved,121)
  167. RVECENT(romReserved,122)
  168. RVECENT(romReserved,123)
  169. RVECENT(romReserved,124)
  170. RVECENT(romReserved,125)
  171. RVECENT(romReserved,126)
  172. RVECENT(romReserved,127)
  173. /* We hope there are no more reserved vectors!
  174. * 128 * 8 == 1024 == 0x400
  175. * so this is address R_VEC+0x400 == 0xbfc00400
  176. */
  177. #ifdef CONFIG_PURPLE
  178. /* 0xbfc00400 */
  179. .word 0xdc870000
  180. .word 0xfca70000
  181. .word 0x20840008
  182. .word 0x20a50008
  183. .word 0x20c6ffff
  184. .word 0x14c0fffa
  185. .word 0x00000000
  186. .word 0x03e00008
  187. .word 0x00000000
  188. .word 0x00000000
  189. /* 0xbfc00428 */
  190. .word 0xdc870000
  191. .word 0xfca70000
  192. .word 0x20840008
  193. .word 0x20a50008
  194. .word 0x20c6ffff
  195. .word 0x14c0fffa
  196. .word 0x00000000
  197. .word 0x03e00008
  198. .word 0x00000000
  199. .word 0x00000000
  200. #endif /* CONFIG_PURPLE */
  201. .align 4
  202. reset:
  203. /* Clear watch registers.
  204. */
  205. mtc0 zero, CP0_WATCHLO
  206. mtc0 zero, CP0_WATCHHI
  207. /* STATUS register */
  208. mfc0 k0, CP0_STATUS
  209. li k1, ~ST0_IE
  210. and k0, k1
  211. mtc0 k0, CP0_STATUS
  212. /* CAUSE register */
  213. mtc0 zero, CP0_CAUSE
  214. /* Init Timer */
  215. mtc0 zero, CP0_COUNT
  216. mtc0 zero, CP0_COMPARE
  217. /* CONFIG0 register */
  218. li t0, CONF_CM_UNCACHED
  219. mtc0 t0, CP0_CONFIG
  220. #ifdef CONFIG_INCA_IP
  221. /* Disable INCA-IP Watchdog.
  222. */
  223. bal disable_incaip_wdt
  224. nop
  225. #endif
  226. /* Initialize any external memory.
  227. */
  228. bal memsetup
  229. nop
  230. /* Initialize caches...
  231. */
  232. bal mips_cache_reset
  233. nop
  234. /* ... and enable them.
  235. */
  236. li t0, CONF_CM_CACHABLE_NONCOHERENT
  237. mtc0 t0, CP0_CONFIG
  238. /* Set up temporary stack.
  239. */
  240. li a0, CFG_INIT_SP_OFFSET
  241. bal mips_cache_lock
  242. nop
  243. li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET
  244. la sp, 0(t0)
  245. /* Initialize GOT pointer.
  246. */
  247. bal 1f
  248. nop
  249. .word _GLOBAL_OFFSET_TABLE_ - 1f + 4
  250. 1:
  251. move gp, ra
  252. lw t1, 0(ra)
  253. add gp, t1
  254. la t9, board_init_f
  255. j t9
  256. nop
  257. /*
  258. * void relocate_code (addr_sp, gd, addr_moni)
  259. *
  260. * This "function" does not return, instead it continues in RAM
  261. * after relocating the monitor code.
  262. *
  263. * a0 = addr_sp
  264. * a1 = gd
  265. * a2 = destination address
  266. */
  267. .globl relocate_code
  268. .ent relocate_code
  269. relocate_code:
  270. move sp, a0 /* Set new stack pointer */
  271. /*
  272. * Fix GOT pointer:
  273. *
  274. * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
  275. */
  276. move t6, gp
  277. sub gp, CFG_MONITOR_BASE
  278. add gp, a2 /* gp now adjusted */
  279. sub t6, gp, t6 /* t6 <-- relocation offset */
  280. li t0, CFG_MONITOR_BASE
  281. add t2, t0, CFG_MONITOR_LEN
  282. move t1, a2
  283. /*
  284. * t0 = source address
  285. * t1 = target address
  286. * t2 = source end address
  287. */
  288. /* On the purple board we copy the code earlier in a special way
  289. * in order to solve flash problems
  290. */
  291. #ifndef CONFIG_PURPLE
  292. 1:
  293. lw t3, 0(t0)
  294. sw t3, 0(t1)
  295. addu t0, 4
  296. ble t0, t2, 1b
  297. addu t1, 4 /* delay slot */
  298. #endif
  299. /* If caches were enabled, we would have to flush them here.
  300. */
  301. /* Jump to where we've relocated ourselves.
  302. */
  303. addi t0, a2, in_ram - _start
  304. j t0
  305. nop
  306. .word uboot_end_data
  307. .word uboot_end
  308. .word num_got_entries
  309. in_ram:
  310. /* Now we want to update GOT.
  311. */
  312. lw t3, -4(t0) /* t3 <-- num_got_entries */
  313. addi t4, gp, 8 /* Skipping first two entries. */
  314. li t2, 2
  315. 1:
  316. lw t1, 0(t4)
  317. beqz t1, 2f
  318. add t1, t6
  319. sw t1, 0(t4)
  320. 2:
  321. addi t2, 1
  322. blt t2, t3, 1b
  323. addi t4, 4 /* delay slot */
  324. /* Clear BSS.
  325. */
  326. lw t1, -12(t0) /* t1 <-- uboot_end_data */
  327. lw t2, -8(t0) /* t2 <-- uboot_end */
  328. add t1, t6 /* adjust pointers */
  329. add t2, t6
  330. sub t1, 4
  331. 1: addi t1, 4
  332. bltl t1, t2, 1b
  333. sw zero, 0(t1) /* delay slot */
  334. move a0, a1
  335. la t9, board_init_r
  336. j t9
  337. move a1, a2 /* delay slot */
  338. .end relocate_code
  339. /* Exception handlers.
  340. */
  341. romReserved:
  342. b romReserved
  343. romExcHandle:
  344. b romExcHandle