stm32mp1.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #define LOG_CATEGORY LOGC_BOARD
  6. #include <common.h>
  7. #include <adc.h>
  8. #include <bootm.h>
  9. #include <clk.h>
  10. #include <config.h>
  11. #include <dm.h>
  12. #include <env.h>
  13. #include <env_internal.h>
  14. #include <fdt_support.h>
  15. #include <g_dnl.h>
  16. #include <generic-phy.h>
  17. #include <hang.h>
  18. #include <i2c.h>
  19. #include <init.h>
  20. #include <led.h>
  21. #include <log.h>
  22. #include <malloc.h>
  23. #include <misc.h>
  24. #include <mtd_node.h>
  25. #include <net.h>
  26. #include <netdev.h>
  27. #include <phy.h>
  28. #include <remoteproc.h>
  29. #include <reset.h>
  30. #include <syscon.h>
  31. #include <usb.h>
  32. #include <watchdog.h>
  33. #include <asm/global_data.h>
  34. #include <asm/io.h>
  35. #include <asm/gpio.h>
  36. #include <asm/arch/stm32.h>
  37. #include <asm/arch/sys_proto.h>
  38. #include <jffs2/load_kernel.h>
  39. #include <linux/bitops.h>
  40. #include <linux/delay.h>
  41. #include <linux/err.h>
  42. #include <linux/iopoll.h>
  43. #include <power/regulator.h>
  44. #include <usb/dwc2_udc.h>
  45. #include "../../st/common/stusb160x.h"
  46. /* SYSCFG registers */
  47. #define SYSCFG_BOOTR 0x00
  48. #define SYSCFG_PMCSETR 0x04
  49. #define SYSCFG_IOCTRLSETR 0x18
  50. #define SYSCFG_ICNR 0x1C
  51. #define SYSCFG_CMPCR 0x20
  52. #define SYSCFG_CMPENSETR 0x24
  53. #define SYSCFG_PMCCLRR 0x44
  54. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  55. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  56. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  57. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  58. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  59. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  60. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  61. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  62. #define SYSCFG_CMPCR_READY BIT(8)
  63. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  64. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  65. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  66. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  67. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  68. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  69. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  70. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  71. /*
  72. * Get a global data pointer
  73. */
  74. DECLARE_GLOBAL_DATA_PTR;
  75. #define USB_LOW_THRESHOLD_UV 200000
  76. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  77. #define USB_START_LOW_THRESHOLD_UV 1230000
  78. #define USB_START_HIGH_THRESHOLD_UV 2150000
  79. int board_early_init_f(void)
  80. {
  81. /* nothing to do, only used in SPL */
  82. return 0;
  83. }
  84. int checkboard(void)
  85. {
  86. int ret;
  87. char *mode;
  88. u32 otp;
  89. struct udevice *dev;
  90. const char *fdt_compat;
  91. int fdt_compat_len;
  92. if (IS_ENABLED(CONFIG_TFABOOT))
  93. mode = "trusted";
  94. else
  95. mode = "basic";
  96. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  97. &fdt_compat_len);
  98. log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
  99. fdt_compat && fdt_compat_len ? fdt_compat : "");
  100. /* display the STMicroelectronics board identification */
  101. if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
  102. ret = uclass_get_device_by_driver(UCLASS_MISC,
  103. DM_DRIVER_GET(stm32mp_bsec),
  104. &dev);
  105. if (!ret)
  106. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  107. &otp, sizeof(otp));
  108. if (ret > 0 && otp)
  109. log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
  110. otp >> 16,
  111. (otp >> 12) & 0xF,
  112. (otp >> 4) & 0xF,
  113. ((otp >> 8) & 0xF) - 1 + 'A',
  114. otp & 0xF);
  115. }
  116. return 0;
  117. }
  118. static void board_key_check(void)
  119. {
  120. ofnode node;
  121. struct gpio_desc gpio;
  122. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  123. if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
  124. return;
  125. node = ofnode_path("/config");
  126. if (!ofnode_valid(node)) {
  127. log_debug("no /config node?\n");
  128. return;
  129. }
  130. if (IS_ENABLED(CONFIG_FASTBOOT)) {
  131. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  132. &gpio, GPIOD_IS_IN)) {
  133. log_debug("could not find a /config/st,fastboot-gpios\n");
  134. } else {
  135. if (dm_gpio_get_value(&gpio)) {
  136. log_notice("Fastboot key pressed, ");
  137. boot_mode = BOOT_FASTBOOT;
  138. }
  139. dm_gpio_free(NULL, &gpio);
  140. }
  141. }
  142. if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
  143. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  144. &gpio, GPIOD_IS_IN)) {
  145. log_debug("could not find a /config/st,stm32prog-gpios\n");
  146. } else {
  147. if (dm_gpio_get_value(&gpio)) {
  148. log_notice("STM32Programmer key pressed, ");
  149. boot_mode = BOOT_STM32PROG;
  150. }
  151. dm_gpio_free(NULL, &gpio);
  152. }
  153. }
  154. if (boot_mode != BOOT_NORMAL) {
  155. log_notice("entering download mode...\n");
  156. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  157. TAMP_BOOT_FORCED_MASK,
  158. boot_mode);
  159. }
  160. }
  161. int g_dnl_board_usb_cable_connected(void)
  162. {
  163. struct udevice *dwc2_udc_otg;
  164. int ret;
  165. if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
  166. return -ENODEV;
  167. /* if typec stusb160x is present, means DK1 or DK2 board */
  168. ret = stusb160x_cable_connected();
  169. if (ret >= 0)
  170. return ret;
  171. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  172. DM_DRIVER_GET(dwc2_udc_otg),
  173. &dwc2_udc_otg);
  174. if (ret) {
  175. log_debug("dwc2_udc_otg init failed\n");
  176. return ret;
  177. }
  178. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  179. }
  180. #ifdef CONFIG_USB_GADGET_DOWNLOAD
  181. #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
  182. #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
  183. int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
  184. {
  185. if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
  186. !strcmp(name, "usb_dnl_dfu"))
  187. put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
  188. else if (IS_ENABLED(CONFIG_FASTBOOT) &&
  189. !strcmp(name, "usb_dnl_fastboot"))
  190. put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
  191. &dev->idProduct);
  192. else
  193. put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
  194. return 0;
  195. }
  196. #endif /* CONFIG_USB_GADGET_DOWNLOAD */
  197. static int get_led(struct udevice **dev, char *led_string)
  198. {
  199. char *led_name;
  200. int ret;
  201. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  202. if (!led_name) {
  203. log_debug("could not find %s config string\n", led_string);
  204. return -ENOENT;
  205. }
  206. ret = led_get_by_label(led_name, dev);
  207. if (ret) {
  208. log_debug("get=%d\n", ret);
  209. return ret;
  210. }
  211. return 0;
  212. }
  213. static int setup_led(enum led_state_t cmd)
  214. {
  215. struct udevice *dev;
  216. int ret;
  217. if (!CONFIG_IS_ENABLED(LED))
  218. return 0;
  219. ret = get_led(&dev, "u-boot,boot-led");
  220. if (ret)
  221. return ret;
  222. ret = led_set_state(dev, cmd);
  223. return ret;
  224. }
  225. static void __maybe_unused led_error_blink(u32 nb_blink)
  226. {
  227. int ret;
  228. struct udevice *led;
  229. u32 i;
  230. if (!nb_blink)
  231. return;
  232. if (CONFIG_IS_ENABLED(LED)) {
  233. ret = get_led(&led, "u-boot,error-led");
  234. if (!ret) {
  235. /* make u-boot,error-led blinking */
  236. /* if U32_MAX and 125ms interval, for 17.02 years */
  237. for (i = 0; i < 2 * nb_blink; i++) {
  238. led_set_state(led, LEDST_TOGGLE);
  239. mdelay(125);
  240. WATCHDOG_RESET();
  241. }
  242. led_set_state(led, LEDST_ON);
  243. }
  244. }
  245. /* infinite: the boot process must be stopped */
  246. if (nb_blink == U32_MAX)
  247. hang();
  248. }
  249. static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
  250. {
  251. struct ofnode_phandle_args adc_args;
  252. struct udevice *adc;
  253. unsigned int raw;
  254. int ret, uV;
  255. int i;
  256. for (i = 0; i < adc_count; i++) {
  257. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  258. "#io-channel-cells", 0, i,
  259. &adc_args)) {
  260. log_debug("can't find /config/st,adc_usb_pd\n");
  261. return 0;
  262. }
  263. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  264. &adc);
  265. if (ret) {
  266. log_err("Can't get adc device(%d)\n", ret);
  267. return ret;
  268. }
  269. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  270. &raw);
  271. if (ret) {
  272. log_err("single shot failed for %s[%d]!\n",
  273. adc->name, adc_args.args[0]);
  274. return ret;
  275. }
  276. /* Convert to uV */
  277. if (!adc_raw_to_uV(adc, raw, &uV)) {
  278. if (uV > *max_uV)
  279. *max_uV = uV;
  280. if (uV < *min_uV)
  281. *min_uV = uV;
  282. log_debug("%s[%02d] = %u, %d uV\n",
  283. adc->name, adc_args.args[0], raw, uV);
  284. } else {
  285. log_err("Can't get uV value for %s[%d]\n",
  286. adc->name, adc_args.args[0]);
  287. }
  288. }
  289. return 0;
  290. }
  291. static int board_check_usb_power(void)
  292. {
  293. ofnode node;
  294. int max_uV = 0;
  295. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  296. int adc_count, ret;
  297. u32 nb_blink;
  298. u8 i;
  299. if (!IS_ENABLED(CONFIG_ADC))
  300. return -ENODEV;
  301. node = ofnode_path("/config");
  302. if (!ofnode_valid(node)) {
  303. log_debug("no /config node?\n");
  304. return -ENOENT;
  305. }
  306. /*
  307. * Retrieve the ADC channels devices and get measurement
  308. * for each of them
  309. */
  310. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  311. "#io-channel-cells", 0);
  312. if (adc_count < 0) {
  313. if (adc_count == -ENOENT)
  314. return 0;
  315. log_err("Can't find adc channel (%d)\n", adc_count);
  316. return adc_count;
  317. }
  318. /* perform maximum of 2 ADC measurements to detect power supply current */
  319. for (i = 0; i < 2; i++) {
  320. ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
  321. if (ret)
  322. return ret;
  323. /*
  324. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  325. * board is plugged on an USB-C 3A power supply and boot process can
  326. * continue.
  327. */
  328. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  329. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  330. min_uV <= USB_LOW_THRESHOLD_UV)
  331. return 0;
  332. if (i == 0) {
  333. log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
  334. mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
  335. }
  336. }
  337. log_notice("****************************************************\n");
  338. /*
  339. * If highest and lowest value are either both below
  340. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  341. * means USB TYPE-C is in unattached mode, this is an issue, make
  342. * u-boot,error-led blinking and stop boot process.
  343. */
  344. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  345. min_uV > USB_LOW_THRESHOLD_UV) ||
  346. (max_uV <= USB_LOW_THRESHOLD_UV &&
  347. min_uV <= USB_LOW_THRESHOLD_UV)) {
  348. log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
  349. log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
  350. /* with 125ms interval, led will blink for 17.02 years ....*/
  351. nb_blink = U32_MAX;
  352. }
  353. if (max_uV > USB_LOW_THRESHOLD_UV &&
  354. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  355. min_uV <= USB_LOW_THRESHOLD_UV) {
  356. log_notice("* WARNING 500mA power supply detected *\n");
  357. nb_blink = 2;
  358. }
  359. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  360. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  361. min_uV <= USB_LOW_THRESHOLD_UV) {
  362. log_notice("* WARNING 1.5A power supply detected *\n");
  363. nb_blink = 3;
  364. }
  365. /*
  366. * If highest value is above 2.15 Volts that means that the USB TypeC
  367. * supplies more than 3 Amp, this is not compliant with TypeC specification
  368. */
  369. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  370. log_notice("* USB TYPE-C charger not compliant with *\n");
  371. log_notice("* specification *\n");
  372. log_notice("****************************************************\n\n");
  373. /* with 125ms interval, led will blink for 17.02 years ....*/
  374. nb_blink = U32_MAX;
  375. } else {
  376. log_notice("* Current too low, use a 3A power supply! *\n");
  377. log_notice("****************************************************\n\n");
  378. }
  379. led_error_blink(nb_blink);
  380. return 0;
  381. }
  382. static void sysconf_init(void)
  383. {
  384. u8 *syscfg;
  385. struct udevice *pwr_dev;
  386. struct udevice *pwr_reg;
  387. struct udevice *dev;
  388. u32 otp = 0;
  389. int ret;
  390. u32 bootr, val;
  391. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  392. /* interconnect update : select master using the port 1 */
  393. /* LTDC = AXI_M9 */
  394. /* GPU = AXI_M8 */
  395. /* today information is hardcoded in U-Boot */
  396. writel(BIT(9), syscfg + SYSCFG_ICNR);
  397. /* disable Pull-Down for boot pin connected to VDD */
  398. bootr = readl(syscfg + SYSCFG_BOOTR);
  399. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  400. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  401. writel(bootr, syscfg + SYSCFG_BOOTR);
  402. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  403. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  404. * The customer will have to disable this for low frequencies
  405. * or if AFMUX is selected but the function not used, typically for
  406. * TRACE. Otherwise, impact on power consumption.
  407. *
  408. * WARNING:
  409. * enabling High Speed mode while VDD>2.7V
  410. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  411. * erroneously set to 1 can damage the IC!
  412. * => U-Boot set the register only if VDD < 2.7V (in DT)
  413. * but this value need to be consistent with board design
  414. */
  415. ret = uclass_get_device_by_driver(UCLASS_PMIC,
  416. DM_DRIVER_GET(stm32mp_pwr_pmic),
  417. &pwr_dev);
  418. if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
  419. ret = uclass_get_device_by_driver(UCLASS_MISC,
  420. DM_DRIVER_GET(stm32mp_bsec),
  421. &dev);
  422. if (ret) {
  423. log_err("Can't find stm32mp_bsec driver\n");
  424. return;
  425. }
  426. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  427. if (ret > 0)
  428. otp = otp & BIT(13);
  429. /* get VDD = vdd-supply */
  430. ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
  431. &pwr_reg);
  432. /* check if VDD is Low Voltage */
  433. if (!ret) {
  434. if (regulator_get_value(pwr_reg) < 2700000) {
  435. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  436. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  437. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  438. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  439. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  440. syscfg + SYSCFG_IOCTRLSETR);
  441. if (!otp)
  442. log_err("product_below_2v5=0: HSLVEN protected by HW\n");
  443. } else {
  444. if (otp)
  445. log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  446. }
  447. } else {
  448. log_debug("VDD unknown");
  449. }
  450. }
  451. /* activate automatic I/O compensation
  452. * warning: need to ensure CSI enabled and ready in clock driver
  453. */
  454. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  455. /* poll until ready (1s timeout) */
  456. ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
  457. val & SYSCFG_CMPCR_READY,
  458. 1000000);
  459. if (ret) {
  460. log_err("SYSCFG: I/O compensation failed, timeout.\n");
  461. led_error_blink(10);
  462. }
  463. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  464. }
  465. /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
  466. static int dk2_i2c1_fix(void)
  467. {
  468. ofnode node;
  469. struct gpio_desc hdmi, audio;
  470. int ret = 0;
  471. if (!IS_ENABLED(CONFIG_DM_REGULATOR))
  472. return -ENODEV;
  473. node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
  474. if (!ofnode_valid(node)) {
  475. log_debug("no hdmi-transmitter@39 ?\n");
  476. return -ENOENT;
  477. }
  478. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  479. &hdmi, GPIOD_IS_OUT)) {
  480. log_debug("could not find reset-gpios\n");
  481. return -ENOENT;
  482. }
  483. node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
  484. if (!ofnode_valid(node)) {
  485. log_debug("no cs42l51@4a ?\n");
  486. return -ENOENT;
  487. }
  488. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  489. &audio, GPIOD_IS_OUT)) {
  490. log_debug("could not find reset-gpios\n");
  491. return -ENOENT;
  492. }
  493. /* before power up, insure that HDMI and AUDIO IC is under reset */
  494. ret = dm_gpio_set_value(&hdmi, 1);
  495. if (ret) {
  496. log_err("can't set_value for hdmi_nrst gpio");
  497. goto error;
  498. }
  499. ret = dm_gpio_set_value(&audio, 1);
  500. if (ret) {
  501. log_err("can't set_value for audio_nrst gpio");
  502. goto error;
  503. }
  504. /* power-up audio IC */
  505. regulator_autoset_by_name("v1v8_audio", NULL);
  506. /* power-up HDMI IC */
  507. regulator_autoset_by_name("v1v2_hdmi", NULL);
  508. regulator_autoset_by_name("v3v3_hdmi", NULL);
  509. error:
  510. return ret;
  511. }
  512. static bool board_is_dk2(void)
  513. {
  514. if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
  515. of_machine_is_compatible("st,stm32mp157c-dk2"))
  516. return true;
  517. return false;
  518. }
  519. static bool board_is_ev1(void)
  520. {
  521. if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
  522. (of_machine_is_compatible("st,stm32mp157a-ev1") ||
  523. of_machine_is_compatible("st,stm32mp157c-ev1") ||
  524. of_machine_is_compatible("st,stm32mp157d-ev1") ||
  525. of_machine_is_compatible("st,stm32mp157f-ev1")))
  526. return true;
  527. return false;
  528. }
  529. /* touchscreen driver: only used for pincontrol configuration */
  530. static const struct udevice_id goodix_ids[] = {
  531. { .compatible = "goodix,gt9147", },
  532. { }
  533. };
  534. U_BOOT_DRIVER(goodix) = {
  535. .name = "goodix",
  536. .id = UCLASS_NOP,
  537. .of_match = goodix_ids,
  538. };
  539. static void board_ev1_init(void)
  540. {
  541. struct udevice *dev;
  542. /* configure IRQ line on EV1 for touchscreen before LCD reset */
  543. uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
  544. }
  545. /* board dependent setup after realloc */
  546. int board_init(void)
  547. {
  548. /* address of boot parameters */
  549. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  550. if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
  551. gpio_hog_probe_all();
  552. board_key_check();
  553. if (board_is_ev1())
  554. board_ev1_init();
  555. if (board_is_dk2())
  556. dk2_i2c1_fix();
  557. if (IS_ENABLED(CONFIG_DM_REGULATOR))
  558. regulators_enable_boot_on(_DEBUG);
  559. if (!IS_ENABLED(CONFIG_TFABOOT))
  560. sysconf_init();
  561. if (CONFIG_IS_ENABLED(LED))
  562. led_default_state();
  563. setup_led(LEDST_ON);
  564. return 0;
  565. }
  566. int board_late_init(void)
  567. {
  568. const void *fdt_compat;
  569. int fdt_compat_len;
  570. int ret;
  571. u32 otp;
  572. struct udevice *dev;
  573. char buf[10];
  574. char dtb_name[256];
  575. int buf_len;
  576. if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
  577. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  578. &fdt_compat_len);
  579. if (fdt_compat && fdt_compat_len) {
  580. if (strncmp(fdt_compat, "st,", 3) != 0) {
  581. env_set("board_name", fdt_compat);
  582. } else {
  583. env_set("board_name", fdt_compat + 3);
  584. buf_len = sizeof(dtb_name);
  585. strncpy(dtb_name, fdt_compat + 3, buf_len);
  586. buf_len -= strlen(fdt_compat + 3);
  587. strncat(dtb_name, ".dtb", buf_len);
  588. env_set("fdtfile", dtb_name);
  589. }
  590. }
  591. ret = uclass_get_device_by_driver(UCLASS_MISC,
  592. DM_DRIVER_GET(stm32mp_bsec),
  593. &dev);
  594. if (!ret)
  595. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  596. &otp, sizeof(otp));
  597. if (ret > 0 && otp) {
  598. snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
  599. env_set("board_id", buf);
  600. snprintf(buf, sizeof(buf), "0x%04x",
  601. ((otp >> 8) & 0xF) - 1 + 0xA);
  602. env_set("board_rev", buf);
  603. }
  604. }
  605. /* for DK1/DK2 boards */
  606. board_check_usb_power();
  607. return 0;
  608. }
  609. void board_quiesce_devices(void)
  610. {
  611. setup_led(LEDST_OFF);
  612. }
  613. /* eth init function : weak called in eqos driver */
  614. int board_interface_eth_init(struct udevice *dev,
  615. phy_interface_t interface_type)
  616. {
  617. u8 *syscfg;
  618. u32 value;
  619. bool eth_clk_sel_reg = false;
  620. bool eth_ref_clk_sel_reg = false;
  621. /* Gigabit Ethernet 125MHz clock selection. */
  622. eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
  623. /* Ethernet 50Mhz RMII clock selection */
  624. eth_ref_clk_sel_reg =
  625. dev_read_bool(dev, "st,eth-ref-clk-sel");
  626. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  627. if (!syscfg)
  628. return -ENODEV;
  629. switch (interface_type) {
  630. case PHY_INTERFACE_MODE_MII:
  631. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  632. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  633. log_debug("PHY_INTERFACE_MODE_MII\n");
  634. break;
  635. case PHY_INTERFACE_MODE_GMII:
  636. if (eth_clk_sel_reg)
  637. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  638. SYSCFG_PMCSETR_ETH_CLK_SEL;
  639. else
  640. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  641. log_debug("PHY_INTERFACE_MODE_GMII\n");
  642. break;
  643. case PHY_INTERFACE_MODE_RMII:
  644. if (eth_ref_clk_sel_reg)
  645. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  646. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  647. else
  648. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  649. log_debug("PHY_INTERFACE_MODE_RMII\n");
  650. break;
  651. case PHY_INTERFACE_MODE_RGMII:
  652. case PHY_INTERFACE_MODE_RGMII_ID:
  653. case PHY_INTERFACE_MODE_RGMII_RXID:
  654. case PHY_INTERFACE_MODE_RGMII_TXID:
  655. if (eth_clk_sel_reg)
  656. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  657. SYSCFG_PMCSETR_ETH_CLK_SEL;
  658. else
  659. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  660. log_debug("PHY_INTERFACE_MODE_RGMII\n");
  661. break;
  662. default:
  663. log_debug("Do not manage %d interface\n",
  664. interface_type);
  665. /* Do not manage others interfaces */
  666. return -EINVAL;
  667. }
  668. /* clear and set ETH configuration bits */
  669. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  670. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  671. syscfg + SYSCFG_PMCCLRR);
  672. writel(value, syscfg + SYSCFG_PMCSETR);
  673. return 0;
  674. }
  675. enum env_location env_get_location(enum env_operation op, int prio)
  676. {
  677. u32 bootmode = get_bootmode();
  678. if (prio)
  679. return ENVL_UNKNOWN;
  680. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  681. case BOOT_FLASH_SD:
  682. case BOOT_FLASH_EMMC:
  683. if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
  684. return ENVL_MMC;
  685. else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
  686. return ENVL_EXT4;
  687. else
  688. return ENVL_NOWHERE;
  689. case BOOT_FLASH_NAND:
  690. case BOOT_FLASH_SPINAND:
  691. if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
  692. return ENVL_UBI;
  693. else
  694. return ENVL_NOWHERE;
  695. case BOOT_FLASH_NOR:
  696. if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
  697. return ENVL_SPI_FLASH;
  698. else
  699. return ENVL_NOWHERE;
  700. default:
  701. return ENVL_NOWHERE;
  702. }
  703. }
  704. const char *env_ext4_get_intf(void)
  705. {
  706. u32 bootmode = get_bootmode();
  707. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  708. case BOOT_FLASH_SD:
  709. case BOOT_FLASH_EMMC:
  710. return "mmc";
  711. default:
  712. return "";
  713. }
  714. }
  715. int mmc_get_boot(void)
  716. {
  717. struct udevice *dev;
  718. u32 boot_mode = get_bootmode();
  719. unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
  720. char cmd[20];
  721. const u32 sdmmc_addr[] = {
  722. STM32_SDMMC1_BASE,
  723. STM32_SDMMC2_BASE,
  724. STM32_SDMMC3_BASE
  725. };
  726. if (instance > ARRAY_SIZE(sdmmc_addr))
  727. return 0;
  728. /* search associated sdmmc node in devicetree */
  729. snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
  730. if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
  731. log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
  732. return 0;
  733. }
  734. return dev_seq(dev);
  735. };
  736. const char *env_ext4_get_dev_part(void)
  737. {
  738. static char *const env_dev_part =
  739. #ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
  740. CONFIG_ENV_EXT4_DEVICE_AND_PART;
  741. #else
  742. "";
  743. #endif
  744. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  745. if (strlen(env_dev_part) > 0)
  746. return env_dev_part;
  747. return dev_part[mmc_get_boot()];
  748. }
  749. int mmc_get_env_dev(void)
  750. {
  751. if (CONFIG_SYS_MMC_ENV_DEV >= 0)
  752. return CONFIG_SYS_MMC_ENV_DEV;
  753. /* use boot instance to select the correct mmc device identifier */
  754. return mmc_get_boot();
  755. }
  756. #if defined(CONFIG_OF_BOARD_SETUP)
  757. int ft_board_setup(void *blob, struct bd_info *bd)
  758. {
  759. static const struct node_info nodes[] = {
  760. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  761. { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
  762. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  763. { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
  764. };
  765. char *boot_device;
  766. /* Check the boot-source and don't update MTD for serial or usb boot */
  767. boot_device = env_get("boot_device");
  768. if (!boot_device ||
  769. (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
  770. if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
  771. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  772. return 0;
  773. }
  774. #endif
  775. static void board_copro_image_process(ulong fw_image, size_t fw_size)
  776. {
  777. int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
  778. if (!rproc_is_initialized())
  779. if (rproc_init()) {
  780. log_err("Remote Processor %d initialization failed\n",
  781. id);
  782. return;
  783. }
  784. ret = rproc_load(id, fw_image, fw_size);
  785. log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
  786. id, fw_image, fw_size, ret ? " Failed!" : " Success!");
  787. if (!ret)
  788. rproc_start(id);
  789. }
  790. U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);