qemu-x86_q35.dts 1.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/interrupt-router/intel-irq.h>
  7. /* ICH9 IRQ router has discrete PIRQ control registers */
  8. #undef PIRQE
  9. #undef PIRQF
  10. #undef PIRQG
  11. #undef PIRQH
  12. #define PIRQE 8
  13. #define PIRQF 9
  14. #define PIRQG 10
  15. #define PIRQH 11
  16. /include/ "skeleton.dtsi"
  17. /include/ "serial.dtsi"
  18. /include/ "keyboard.dtsi"
  19. /include/ "reset.dtsi"
  20. /include/ "rtc.dtsi"
  21. #include "tsc_timer.dtsi"
  22. #include "smbios.dtsi"
  23. / {
  24. model = "QEMU x86 (Q35)";
  25. compatible = "qemu,x86";
  26. config {
  27. silent_console = <0>;
  28. u-boot,no-apm-finalize;
  29. };
  30. chosen {
  31. stdout-path = "/serial";
  32. };
  33. cpus {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. u-boot,dm-pre-reloc;
  37. cpu@0 {
  38. device_type = "cpu";
  39. compatible = "cpu-qemu";
  40. u-boot,dm-pre-reloc;
  41. reg = <0>;
  42. intel,apic-id = <0>;
  43. };
  44. };
  45. pci {
  46. compatible = "pci-x86";
  47. #address-cells = <3>;
  48. #size-cells = <2>;
  49. u-boot,dm-pre-reloc;
  50. ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
  51. 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
  52. 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
  53. pch@1f,0 {
  54. reg = <0x0000f800 0 0 0 0>;
  55. compatible = "intel,pch9";
  56. u-boot,dm-pre-reloc;
  57. irq-router {
  58. compatible = "intel,irq-router";
  59. u-boot,dm-pre-reloc;
  60. intel,pirq-config = "pci";
  61. intel,actl-8bit;
  62. intel,actl-addr = <0x44>;
  63. intel,pirq-link = <0x60 8>;
  64. intel,pirq-mask = <0x0e40>;
  65. intel,pirq-routing = <
  66. /* e1000 NIC */
  67. PCI_BDF(0, 2, 0) INTA PIRQG
  68. /* ICH9 UHCI */
  69. PCI_BDF(0, 29, 0) INTA PIRQA
  70. PCI_BDF(0, 29, 1) INTB PIRQB
  71. PCI_BDF(0, 29, 2) INTC PIRQC
  72. /* ICH9 EHCI */
  73. PCI_BDF(0, 29, 7) INTD PIRQD
  74. /* ICH9 SATA */
  75. PCI_BDF(0, 31, 2) INTA PIRQA
  76. >;
  77. };
  78. };
  79. };
  80. };