cadence-ttc.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <timer.h>
  9. #include <asm/io.h>
  10. #define CNT_CNTRL_RESET BIT(4)
  11. struct cadence_ttc_regs {
  12. u32 clk_cntrl1; /* 0x0 - Clock Control 1 */
  13. u32 clk_cntrl2; /* 0x4 - Clock Control 2 */
  14. u32 clk_cntrl3; /* 0x8 - Clock Control 3 */
  15. u32 counter_cntrl1; /* 0xC - Counter Control 1 */
  16. u32 counter_cntrl2; /* 0x10 - Counter Control 2 */
  17. u32 counter_cntrl3; /* 0x14 - Counter Control 3 */
  18. u32 counter_val1; /* 0x18 - Counter Control 1 */
  19. u32 counter_val2; /* 0x1C - Counter Control 2 */
  20. u32 counter_val3; /* 0x20 - Counter Control 3 */
  21. u32 reserved[15];
  22. u32 interrupt_enable1; /* 0x60 - Interrupt Enable 1 */
  23. u32 interrupt_enable2; /* 0x64 - Interrupt Enable 2 */
  24. u32 interrupt_enable3; /* 0x68 - Interrupt Enable 3 */
  25. };
  26. struct cadence_ttc_priv {
  27. struct cadence_ttc_regs *regs;
  28. };
  29. static int cadence_ttc_get_count(struct udevice *dev, u64 *count)
  30. {
  31. struct cadence_ttc_priv *priv = dev_get_priv(dev);
  32. *count = readl(&priv->regs->counter_val1);
  33. return 0;
  34. }
  35. static int cadence_ttc_probe(struct udevice *dev)
  36. {
  37. struct cadence_ttc_priv *priv = dev_get_priv(dev);
  38. /* Disable interrupts for sure */
  39. writel(0, &priv->regs->interrupt_enable1);
  40. writel(0, &priv->regs->interrupt_enable2);
  41. writel(0, &priv->regs->interrupt_enable3);
  42. /* Make sure that clocks are configured properly without prescaller */
  43. writel(0, &priv->regs->clk_cntrl1);
  44. writel(0, &priv->regs->clk_cntrl2);
  45. writel(0, &priv->regs->clk_cntrl3);
  46. /* Reset and enable this counter */
  47. writel(CNT_CNTRL_RESET, &priv->regs->counter_cntrl1);
  48. return 0;
  49. }
  50. static int cadence_ttc_ofdata_to_platdata(struct udevice *dev)
  51. {
  52. struct cadence_ttc_priv *priv = dev_get_priv(dev);
  53. priv->regs = map_physmem(devfdt_get_addr(dev),
  54. sizeof(struct cadence_ttc_regs), MAP_NOCACHE);
  55. return 0;
  56. }
  57. static const struct timer_ops cadence_ttc_ops = {
  58. .get_count = cadence_ttc_get_count,
  59. };
  60. static const struct udevice_id cadence_ttc_ids[] = {
  61. { .compatible = "cdns,ttc" },
  62. {}
  63. };
  64. U_BOOT_DRIVER(cadence_ttc) = {
  65. .name = "cadence_ttc",
  66. .id = UCLASS_TIMER,
  67. .of_match = cadence_ttc_ids,
  68. .ofdata_to_platdata = cadence_ttc_ofdata_to_platdata,
  69. .priv_auto_alloc_size = sizeof(struct cadence_ttc_priv),
  70. .probe = cadence_ttc_probe,
  71. .ops = &cadence_ttc_ops,
  72. .flags = DM_FLAG_PRE_RELOC,
  73. };