spl.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek
  4. */
  5. #include <common.h>
  6. #include <debug_uart.h>
  7. #include <spl.h>
  8. #include <asm/io.h>
  9. #include <asm/spl.h>
  10. #include <asm/arch/hardware.h>
  11. #include <asm/arch/sys_proto.h>
  12. #include <asm/arch/ps7_init_gpl.h>
  13. void board_init_f(ulong dummy)
  14. {
  15. ps7_init();
  16. arch_cpu_init();
  17. #ifdef CONFIG_DEBUG_UART
  18. /* Uart debug for sure */
  19. debug_uart_init();
  20. puts("Debug uart enabled\n"); /* or printch() */
  21. #endif
  22. }
  23. #ifdef CONFIG_SPL_BOARD_INIT
  24. void spl_board_init(void)
  25. {
  26. preloader_console_init();
  27. board_init();
  28. }
  29. #endif
  30. u32 spl_boot_device(void)
  31. {
  32. u32 mode;
  33. switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
  34. #ifdef CONFIG_SPL_SPI_SUPPORT
  35. case ZYNQ_BM_QSPI:
  36. puts("qspi boot\n");
  37. mode = BOOT_DEVICE_SPI;
  38. break;
  39. #endif
  40. case ZYNQ_BM_NAND:
  41. mode = BOOT_DEVICE_NAND;
  42. break;
  43. case ZYNQ_BM_NOR:
  44. mode = BOOT_DEVICE_NOR;
  45. break;
  46. #ifdef CONFIG_SPL_MMC_SUPPORT
  47. case ZYNQ_BM_SD:
  48. puts("mmc boot\n");
  49. mode = BOOT_DEVICE_MMC1;
  50. break;
  51. #endif
  52. case ZYNQ_BM_JTAG:
  53. mode = BOOT_DEVICE_RAM;
  54. break;
  55. default:
  56. puts("Unsupported boot mode selected\n");
  57. hang();
  58. }
  59. return mode;
  60. }
  61. #ifdef CONFIG_SPL_OS_BOOT
  62. int spl_start_uboot(void)
  63. {
  64. /* boot linux */
  65. return 0;
  66. }
  67. #endif
  68. void spl_board_prepare_for_boot(void)
  69. {
  70. ps7_post_config();
  71. debug("SPL bye\n");
  72. }
  73. #ifdef CONFIG_SPL_LOAD_FIT
  74. int board_fit_config_name_match(const char *name)
  75. {
  76. /* Just empty function now - can't decide what to choose */
  77. debug("%s: %s\n", __func__, name);
  78. return 0;
  79. }
  80. #endif