regs-bch.h 9.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Freescale i.MX28 BCH Register Definitions
  4. *
  5. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  6. * on behalf of DENX Software Engineering GmbH
  7. *
  8. * Based on code from LTIB:
  9. * Copyright 2008-2010, 2016 Freescale Semiconductor, Inc. All Rights Reserved.
  10. * Copyright 2020 NXP
  11. *
  12. */
  13. #ifndef __MX28_REGS_BCH_H__
  14. #define __MX28_REGS_BCH_H__
  15. #include <asm/mach-imx/regs-common.h>
  16. #ifndef __ASSEMBLY__
  17. struct mxs_bch_regs {
  18. mxs_reg_32(hw_bch_ctrl)
  19. mxs_reg_32(hw_bch_status0)
  20. mxs_reg_32(hw_bch_mode)
  21. mxs_reg_32(hw_bch_encodeptr)
  22. mxs_reg_32(hw_bch_dataptr)
  23. mxs_reg_32(hw_bch_metaptr)
  24. uint32_t reserved[4];
  25. mxs_reg_32(hw_bch_layoutselect)
  26. mxs_reg_32(hw_bch_flash0layout0)
  27. mxs_reg_32(hw_bch_flash0layout1)
  28. mxs_reg_32(hw_bch_flash1layout0)
  29. mxs_reg_32(hw_bch_flash1layout1)
  30. mxs_reg_32(hw_bch_flash2layout0)
  31. mxs_reg_32(hw_bch_flash2layout1)
  32. mxs_reg_32(hw_bch_flash3layout0)
  33. mxs_reg_32(hw_bch_flash3layout1)
  34. mxs_reg_32(hw_bch_dbgkesread)
  35. mxs_reg_32(hw_bch_dbgcsferead)
  36. mxs_reg_32(hw_bch_dbgsyndegread)
  37. mxs_reg_32(hw_bch_dbgahbmread)
  38. mxs_reg_32(hw_bch_blockname)
  39. mxs_reg_32(hw_bch_version)
  40. mxs_reg_32(hw_bch_debug1)
  41. };
  42. #endif
  43. #define BCH_CTRL_SFTRST (1 << 31)
  44. #define BCH_CTRL_CLKGATE (1 << 30)
  45. #define BCH_CTRL_DEBUGSYNDROME (1 << 22)
  46. #define BCH_CTRL_M2M_LAYOUT_MASK (0x3 << 18)
  47. #define BCH_CTRL_M2M_LAYOUT_OFFSET 18
  48. #define BCH_CTRL_M2M_ENCODE (1 << 17)
  49. #define BCH_CTRL_M2M_ENABLE (1 << 16)
  50. #define BCH_CTRL_DEBUG_STALL_IRQ_EN (1 << 10)
  51. #define BCH_CTRL_COMPLETE_IRQ_EN (1 << 8)
  52. #define BCH_CTRL_BM_ERROR_IRQ (1 << 3)
  53. #define BCH_CTRL_DEBUG_STALL_IRQ (1 << 2)
  54. #define BCH_CTRL_COMPLETE_IRQ (1 << 0)
  55. #define BCH_STATUS0_HANDLE_MASK (0xfff << 20)
  56. #define BCH_STATUS0_HANDLE_OFFSET 20
  57. #define BCH_STATUS0_COMPLETED_CE_MASK (0xf << 16)
  58. #define BCH_STATUS0_COMPLETED_CE_OFFSET 16
  59. #define BCH_STATUS0_STATUS_BLK0_MASK (0xff << 8)
  60. #define BCH_STATUS0_STATUS_BLK0_OFFSET 8
  61. #define BCH_STATUS0_STATUS_BLK0_ZERO (0x00 << 8)
  62. #define BCH_STATUS0_STATUS_BLK0_ERROR1 (0x01 << 8)
  63. #define BCH_STATUS0_STATUS_BLK0_ERROR2 (0x02 << 8)
  64. #define BCH_STATUS0_STATUS_BLK0_ERROR3 (0x03 << 8)
  65. #define BCH_STATUS0_STATUS_BLK0_ERROR4 (0x04 << 8)
  66. #define BCH_STATUS0_STATUS_BLK0_UNCORRECTABLE (0xfe << 8)
  67. #define BCH_STATUS0_STATUS_BLK0_ERASED (0xff << 8)
  68. #define BCH_STATUS0_ALLONES (1 << 4)
  69. #define BCH_STATUS0_CORRECTED (1 << 3)
  70. #define BCH_STATUS0_UNCORRECTABLE (1 << 2)
  71. #define BCH_MODE_ERASE_THRESHOLD_MASK 0xff
  72. #define BCH_MODE_ERASE_THRESHOLD_OFFSET 0
  73. #define BCH_MODE_ERASE_THRESHOLD(v) \
  74. (((v) << BCH_MODE_ERASE_THRESHOLD_OFFSET) & \
  75. BCH_MODE_ERASE_THRESHOLD_MASK)
  76. #define BCH_ENCODEPTR_ADDR_MASK 0xffffffff
  77. #define BCH_ENCODEPTR_ADDR_OFFSET 0
  78. #define BCH_DATAPTR_ADDR_MASK 0xffffffff
  79. #define BCH_DATAPTR_ADDR_OFFSET 0
  80. #define BCH_METAPTR_ADDR_MASK 0xffffffff
  81. #define BCH_METAPTR_ADDR_OFFSET 0
  82. #define BCH_LAYOUTSELECT_CS15_SELECT_MASK (0x3 << 30)
  83. #define BCH_LAYOUTSELECT_CS15_SELECT_OFFSET 30
  84. #define BCH_LAYOUTSELECT_CS14_SELECT_MASK (0x3 << 28)
  85. #define BCH_LAYOUTSELECT_CS14_SELECT_OFFSET 28
  86. #define BCH_LAYOUTSELECT_CS13_SELECT_MASK (0x3 << 26)
  87. #define BCH_LAYOUTSELECT_CS13_SELECT_OFFSET 26
  88. #define BCH_LAYOUTSELECT_CS12_SELECT_MASK (0x3 << 24)
  89. #define BCH_LAYOUTSELECT_CS12_SELECT_OFFSET 24
  90. #define BCH_LAYOUTSELECT_CS11_SELECT_MASK (0x3 << 22)
  91. #define BCH_LAYOUTSELECT_CS11_SELECT_OFFSET 22
  92. #define BCH_LAYOUTSELECT_CS10_SELECT_MASK (0x3 << 20)
  93. #define BCH_LAYOUTSELECT_CS10_SELECT_OFFSET 20
  94. #define BCH_LAYOUTSELECT_CS9_SELECT_MASK (0x3 << 18)
  95. #define BCH_LAYOUTSELECT_CS9_SELECT_OFFSET 18
  96. #define BCH_LAYOUTSELECT_CS8_SELECT_MASK (0x3 << 16)
  97. #define BCH_LAYOUTSELECT_CS8_SELECT_OFFSET 16
  98. #define BCH_LAYOUTSELECT_CS7_SELECT_MASK (0x3 << 14)
  99. #define BCH_LAYOUTSELECT_CS7_SELECT_OFFSET 14
  100. #define BCH_LAYOUTSELECT_CS6_SELECT_MASK (0x3 << 12)
  101. #define BCH_LAYOUTSELECT_CS6_SELECT_OFFSET 12
  102. #define BCH_LAYOUTSELECT_CS5_SELECT_MASK (0x3 << 10)
  103. #define BCH_LAYOUTSELECT_CS5_SELECT_OFFSET 10
  104. #define BCH_LAYOUTSELECT_CS4_SELECT_MASK (0x3 << 8)
  105. #define BCH_LAYOUTSELECT_CS4_SELECT_OFFSET 8
  106. #define BCH_LAYOUTSELECT_CS3_SELECT_MASK (0x3 << 6)
  107. #define BCH_LAYOUTSELECT_CS3_SELECT_OFFSET 6
  108. #define BCH_LAYOUTSELECT_CS2_SELECT_MASK (0x3 << 4)
  109. #define BCH_LAYOUTSELECT_CS2_SELECT_OFFSET 4
  110. #define BCH_LAYOUTSELECT_CS1_SELECT_MASK (0x3 << 2)
  111. #define BCH_LAYOUTSELECT_CS1_SELECT_OFFSET 2
  112. #define BCH_LAYOUTSELECT_CS0_SELECT_MASK (0x3 << 0)
  113. #define BCH_LAYOUTSELECT_CS0_SELECT_OFFSET 0
  114. #define BCH_FLASHLAYOUT0_NBLOCKS_MASK (0xff << 24)
  115. #define BCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24
  116. #define BCH_FLASHLAYOUT0_META_SIZE_MASK (0xff << 16)
  117. #define BCH_FLASHLAYOUT0_META_SIZE_OFFSET 16
  118. #if (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
  119. #define BCH_FLASHLAYOUT0_ECC0_MASK (0x1f << 11)
  120. #define BCH_FLASHLAYOUT0_ECC0_OFFSET 11
  121. #else
  122. #define BCH_FLASHLAYOUT0_ECC0_MASK (0xf << 12)
  123. #define BCH_FLASHLAYOUT0_ECC0_OFFSET 12
  124. #endif
  125. #define BCH_FLASHLAYOUT0_ECC0_NONE (0x0 << 12)
  126. #define BCH_FLASHLAYOUT0_ECC0_ECC2 (0x1 << 12)
  127. #define BCH_FLASHLAYOUT0_ECC0_ECC4 (0x2 << 12)
  128. #define BCH_FLASHLAYOUT0_ECC0_ECC6 (0x3 << 12)
  129. #define BCH_FLASHLAYOUT0_ECC0_ECC8 (0x4 << 12)
  130. #define BCH_FLASHLAYOUT0_ECC0_ECC10 (0x5 << 12)
  131. #define BCH_FLASHLAYOUT0_ECC0_ECC12 (0x6 << 12)
  132. #define BCH_FLASHLAYOUT0_ECC0_ECC14 (0x7 << 12)
  133. #define BCH_FLASHLAYOUT0_ECC0_ECC16 (0x8 << 12)
  134. #define BCH_FLASHLAYOUT0_ECC0_ECC18 (0x9 << 12)
  135. #define BCH_FLASHLAYOUT0_ECC0_ECC20 (0xa << 12)
  136. #define BCH_FLASHLAYOUT0_ECC0_ECC22 (0xb << 12)
  137. #define BCH_FLASHLAYOUT0_ECC0_ECC24 (0xc << 12)
  138. #define BCH_FLASHLAYOUT0_ECC0_ECC26 (0xd << 12)
  139. #define BCH_FLASHLAYOUT0_ECC0_ECC28 (0xe << 12)
  140. #define BCH_FLASHLAYOUT0_ECC0_ECC30 (0xf << 12)
  141. #define BCH_FLASHLAYOUT0_ECC0_ECC32 (0x10 << 12)
  142. #define BCH_FLASHLAYOUT0_GF13_0_GF14_1_MASK BIT(10)
  143. #define BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET 10
  144. #define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK 0x3ff
  145. #define BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET 0
  146. #define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0xffff << 16)
  147. #define BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET 16
  148. #if (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
  149. #define BCH_FLASHLAYOUT1_ECCN_MASK (0x1f << 11)
  150. #define BCH_FLASHLAYOUT1_ECCN_OFFSET 11
  151. #else
  152. #define BCH_FLASHLAYOUT1_ECCN_MASK (0xf << 12)
  153. #define BCH_FLASHLAYOUT1_ECCN_OFFSET 12
  154. #endif
  155. #define BCH_FLASHLAYOUT1_ECCN_NONE (0x0 << 12)
  156. #define BCH_FLASHLAYOUT1_ECCN_ECC2 (0x1 << 12)
  157. #define BCH_FLASHLAYOUT1_ECCN_ECC4 (0x2 << 12)
  158. #define BCH_FLASHLAYOUT1_ECCN_ECC6 (0x3 << 12)
  159. #define BCH_FLASHLAYOUT1_ECCN_ECC8 (0x4 << 12)
  160. #define BCH_FLASHLAYOUT1_ECCN_ECC10 (0x5 << 12)
  161. #define BCH_FLASHLAYOUT1_ECCN_ECC12 (0x6 << 12)
  162. #define BCH_FLASHLAYOUT1_ECCN_ECC14 (0x7 << 12)
  163. #define BCH_FLASHLAYOUT1_ECCN_ECC16 (0x8 << 12)
  164. #define BCH_FLASHLAYOUT1_ECCN_ECC18 (0x9 << 12)
  165. #define BCH_FLASHLAYOUT1_ECCN_ECC20 (0xa << 12)
  166. #define BCH_FLASHLAYOUT1_ECCN_ECC22 (0xb << 12)
  167. #define BCH_FLASHLAYOUT1_ECCN_ECC24 (0xc << 12)
  168. #define BCH_FLASHLAYOUT1_ECCN_ECC26 (0xd << 12)
  169. #define BCH_FLASHLAYOUT1_ECCN_ECC28 (0xe << 12)
  170. #define BCH_FLASHLAYOUT1_ECCN_ECC30 (0xf << 12)
  171. #define BCH_FLASHLAYOUT1_ECCN_ECC32 (0x10 << 12)
  172. #define BCH_FLASHLAYOUT1_GF13_0_GF14_1_MASK BIT(10)
  173. #define BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET 10
  174. #define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK 0x3ff
  175. #define BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET 0
  176. #define BCH_DEBUG0_RSVD1_MASK (0x1f << 27)
  177. #define BCH_DEBUG0_RSVD1_OFFSET 27
  178. #define BCH_DEBUG0_ROM_BIST_ENABLE (1 << 26)
  179. #define BCH_DEBUG0_ROM_BIST_COMPLETE (1 << 25)
  180. #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_MASK (0x1ff << 16)
  181. #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_OFFSET 16
  182. #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_NORMAL (0x0 << 16)
  183. #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_TEST_MODE (0x1 << 16)
  184. #define BCH_DEBUG0_KES_DEBUG_SHIFT_SYND (1 << 15)
  185. #define BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG (1 << 14)
  186. #define BCH_DEBUG0_KES_DEBUG_MODE4K (1 << 13)
  187. #define BCH_DEBUG0_KES_DEBUG_KICK (1 << 12)
  188. #define BCH_DEBUG0_KES_STANDALONE (1 << 11)
  189. #define BCH_DEBUG0_KES_DEBUG_STEP (1 << 10)
  190. #define BCH_DEBUG0_KES_DEBUG_STALL (1 << 9)
  191. #define BCH_DEBUG0_BM_KES_TEST_BYPASS (1 << 8)
  192. #define BCH_DEBUG0_RSVD0_MASK (0x3 << 6)
  193. #define BCH_DEBUG0_RSVD0_OFFSET 6
  194. #define BCH_DEBUG0_DEBUG_REG_SELECT_MASK 0x3f
  195. #define BCH_DEBUG0_DEBUG_REG_SELECT_OFFSET 0
  196. #define BCH_DBGKESREAD_VALUES_MASK 0xffffffff
  197. #define BCH_DBGKESREAD_VALUES_OFFSET 0
  198. #define BCH_DBGCSFEREAD_VALUES_MASK 0xffffffff
  199. #define BCH_DBGCSFEREAD_VALUES_OFFSET 0
  200. #define BCH_DBGSYNDGENREAD_VALUES_MASK 0xffffffff
  201. #define BCH_DBGSYNDGENREAD_VALUES_OFFSET 0
  202. #define BCH_DBGAHBMREAD_VALUES_MASK 0xffffffff
  203. #define BCH_DBGAHBMREAD_VALUES_OFFSET 0
  204. #define BCH_BLOCKNAME_NAME_MASK 0xffffffff
  205. #define BCH_BLOCKNAME_NAME_OFFSET 0
  206. #define BCH_VERSION_MAJOR_MASK (0xff << 24)
  207. #define BCH_VERSION_MAJOR_OFFSET 24
  208. #define BCH_VERSION_MINOR_MASK (0xff << 16)
  209. #define BCH_VERSION_MINOR_OFFSET 16
  210. #define BCH_VERSION_STEP_MASK 0xffff
  211. #define BCH_VERSION_STEP_OFFSET 0
  212. #endif /* __MX28_REGS_BCH_H__ */