am33xx.h 5.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * This header provides constants specific to AM33XX pinctrl bindings.
  4. */
  5. #ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
  6. #define _DT_BINDINGS_PINCTRL_AM33XX_H
  7. #include <dt-bindings/pinctrl/omap.h>
  8. /* am33xx specific mux bit defines */
  9. #undef PULL_ENA
  10. #undef INPUT_EN
  11. #define PULL_DISABLE (1 << 3)
  12. #define INPUT_EN (1 << 5)
  13. #define SLEWCTRL_SLOW (1 << 6)
  14. #define SLEWCTRL_FAST 0
  15. /* update macro depending on INPUT_EN and PULL_ENA */
  16. #undef PIN_OUTPUT
  17. #undef PIN_OUTPUT_PULLUP
  18. #undef PIN_OUTPUT_PULLDOWN
  19. #undef PIN_INPUT
  20. #undef PIN_INPUT_PULLUP
  21. #undef PIN_INPUT_PULLDOWN
  22. #define PIN_OUTPUT (PULL_DISABLE)
  23. #define PIN_OUTPUT_PULLUP (PULL_UP)
  24. #define PIN_OUTPUT_PULLDOWN 0
  25. #define PIN_INPUT (INPUT_EN | PULL_DISABLE)
  26. #define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
  27. #define PIN_INPUT_PULLDOWN (INPUT_EN)
  28. /* undef non-existing modes */
  29. #undef PIN_OFF_NONE
  30. #undef PIN_OFF_OUTPUT_HIGH
  31. #undef PIN_OFF_OUTPUT_LOW
  32. #undef PIN_OFF_INPUT_PULLUP
  33. #undef PIN_OFF_INPUT_PULLDOWN
  34. #undef PIN_OFF_WAKEUPENABLE
  35. #define AM335X_PIN_OFFSET_MIN 0x0800U
  36. #define AM335X_PIN_GPMC_AD0 0x800
  37. #define AM335X_PIN_GPMC_AD1 0x804
  38. #define AM335X_PIN_GPMC_AD2 0x808
  39. #define AM335X_PIN_GPMC_AD3 0x80c
  40. #define AM335X_PIN_GPMC_AD4 0x810
  41. #define AM335X_PIN_GPMC_AD5 0x814
  42. #define AM335X_PIN_GPMC_AD6 0x818
  43. #define AM335X_PIN_GPMC_AD7 0x81c
  44. #define AM335X_PIN_GPMC_AD8 0x820
  45. #define AM335X_PIN_GPMC_AD9 0x824
  46. #define AM335X_PIN_GPMC_AD10 0x828
  47. #define AM335X_PIN_GPMC_AD11 0x82c
  48. #define AM335X_PIN_GPMC_AD12 0x830
  49. #define AM335X_PIN_GPMC_AD13 0x834
  50. #define AM335X_PIN_GPMC_AD14 0x838
  51. #define AM335X_PIN_GPMC_AD15 0x83c
  52. #define AM335X_PIN_GPMC_A0 0x840
  53. #define AM335X_PIN_GPMC_A1 0x844
  54. #define AM335X_PIN_GPMC_A2 0x848
  55. #define AM335X_PIN_GPMC_A3 0x84c
  56. #define AM335X_PIN_GPMC_A4 0x850
  57. #define AM335X_PIN_GPMC_A5 0x854
  58. #define AM335X_PIN_GPMC_A6 0x858
  59. #define AM335X_PIN_GPMC_A7 0x85c
  60. #define AM335X_PIN_GPMC_A8 0x860
  61. #define AM335X_PIN_GPMC_A9 0x864
  62. #define AM335X_PIN_GPMC_A10 0x868
  63. #define AM335X_PIN_GPMC_A11 0x86c
  64. #define AM335X_PIN_GPMC_WAIT0 0x870
  65. #define AM335X_PIN_GPMC_WPN 0x874
  66. #define AM335X_PIN_GPMC_BEN1 0x878
  67. #define AM335X_PIN_GPMC_CSN0 0x87c
  68. #define AM335X_PIN_GPMC_CSN1 0x880
  69. #define AM335X_PIN_GPMC_CSN2 0x884
  70. #define AM335X_PIN_GPMC_CSN3 0x888
  71. #define AM335X_PIN_GPMC_CLK 0x88c
  72. #define AM335X_PIN_GPMC_ADVN_ALE 0x890
  73. #define AM335X_PIN_GPMC_OEN_REN 0x894
  74. #define AM335X_PIN_GPMC_WEN 0x898
  75. #define AM335X_PIN_GPMC_BEN0_CLE 0x89c
  76. #define AM335X_PIN_LCD_DATA0 0x8a0
  77. #define AM335X_PIN_LCD_DATA1 0x8a4
  78. #define AM335X_PIN_LCD_DATA2 0x8a8
  79. #define AM335X_PIN_LCD_DATA3 0x8ac
  80. #define AM335X_PIN_LCD_DATA4 0x8b0
  81. #define AM335X_PIN_LCD_DATA5 0x8b4
  82. #define AM335X_PIN_LCD_DATA6 0x8b8
  83. #define AM335X_PIN_LCD_DATA7 0x8bc
  84. #define AM335X_PIN_LCD_DATA8 0x8c0
  85. #define AM335X_PIN_LCD_DATA9 0x8c4
  86. #define AM335X_PIN_LCD_DATA10 0x8c8
  87. #define AM335X_PIN_LCD_DATA11 0x8cc
  88. #define AM335X_PIN_LCD_DATA12 0x8d0
  89. #define AM335X_PIN_LCD_DATA13 0x8d4
  90. #define AM335X_PIN_LCD_DATA14 0x8d8
  91. #define AM335X_PIN_LCD_DATA15 0x8dc
  92. #define AM335X_PIN_LCD_VSYNC 0x8e0
  93. #define AM335X_PIN_LCD_HSYNC 0x8e4
  94. #define AM335X_PIN_LCD_PCLK 0x8e8
  95. #define AM335X_PIN_LCD_AC_BIAS_EN 0x8ec
  96. #define AM335X_PIN_MMC0_DAT3 0x8f0
  97. #define AM335X_PIN_MMC0_DAT2 0x8f4
  98. #define AM335X_PIN_MMC0_DAT1 0x8f8
  99. #define AM335X_PIN_MMC0_DAT0 0x8fc
  100. #define AM335X_PIN_MMC0_CLK 0x900
  101. #define AM335X_PIN_MMC0_CMD 0x904
  102. #define AM335X_PIN_MII1_COL 0x908
  103. #define AM335X_PIN_MII1_CRS 0x90c
  104. #define AM335X_PIN_MII1_RX_ER 0x910
  105. #define AM335X_PIN_MII1_TX_EN 0x914
  106. #define AM335X_PIN_MII1_RX_DV 0x918
  107. #define AM335X_PIN_MII1_TXD3 0x91c
  108. #define AM335X_PIN_MII1_TXD2 0x920
  109. #define AM335X_PIN_MII1_TXD1 0x924
  110. #define AM335X_PIN_MII1_TXD0 0x928
  111. #define AM335X_PIN_MII1_TX_CLK 0x92c
  112. #define AM335X_PIN_MII1_RX_CLK 0x930
  113. #define AM335X_PIN_MII1_RXD3 0x934
  114. #define AM335X_PIN_MII1_RXD2 0x938
  115. #define AM335X_PIN_MII1_RXD1 0x93c
  116. #define AM335X_PIN_MII1_RXD0 0x940
  117. #define AM335X_PIN_RMII1_REF_CLK 0x944
  118. #define AM335X_PIN_MDIO 0x948
  119. #define AM335X_PIN_MDC 0x94c
  120. #define AM335X_PIN_SPI0_SCLK 0x950
  121. #define AM335X_PIN_SPI0_D0 0x954
  122. #define AM335X_PIN_SPI0_D1 0x958
  123. #define AM335X_PIN_SPI0_CS0 0x95c
  124. #define AM335X_PIN_SPI0_CS1 0x960
  125. #define AM335X_PIN_ECAP0_IN_PWM0_OUT 0x964
  126. #define AM335X_PIN_UART0_CTSN 0x968
  127. #define AM335X_PIN_UART0_RTSN 0x96c
  128. #define AM335X_PIN_UART0_RXD 0x970
  129. #define AM335X_PIN_UART0_TXD 0x974
  130. #define AM335X_PIN_UART1_CTSN 0x978
  131. #define AM335X_PIN_UART1_RTSN 0x97c
  132. #define AM335X_PIN_UART1_RXD 0x980
  133. #define AM335X_PIN_UART1_TXD 0x984
  134. #define AM335X_PIN_I2C0_SDA 0x988
  135. #define AM335X_PIN_I2C0_SCL 0x98c
  136. #define AM335X_PIN_MCASP0_ACLKX 0x990
  137. #define AM335X_PIN_MCASP0_FSX 0x994
  138. #define AM335X_PIN_MCASP0_AXR0 0x998
  139. #define AM335X_PIN_MCASP0_AHCLKR 0x99c
  140. #define AM335X_PIN_MCASP0_ACLKR 0x9a0
  141. #define AM335X_PIN_MCASP0_FSR 0x9a4
  142. #define AM335X_PIN_MCASP0_AXR1 0x9a8
  143. #define AM335X_PIN_MCASP0_AHCLKX 0x9ac
  144. #define AM335X_PIN_XDMA_EVENT_INTR0 0x9b0
  145. #define AM335X_PIN_XDMA_EVENT_INTR1 0x9b4
  146. #define AM335X_PIN_WARMRSTN 0x9b8
  147. #define AM335X_PIN_NNMI 0x9c0
  148. #define AM335X_PIN_TMS 0x9d0
  149. #define AM335X_PIN_TDI 0x9d4
  150. #define AM335X_PIN_TDO 0x9d8
  151. #define AM335X_PIN_TCK 0x9dc
  152. #define AM335X_PIN_TRSTN 0x9e0
  153. #define AM335X_PIN_EMU0 0x9e4
  154. #define AM335X_PIN_EMU1 0x9e8
  155. #define AM335X_PIN_RTC_PWRONRSTN 0x9f8
  156. #define AM335X_PIN_PMIC_POWER_EN 0x9fc
  157. #define AM335X_PIN_EXT_WAKEUP 0xa00
  158. #define AM335X_PIN_USB0_DRVVBUS 0xa1c
  159. #define AM335X_PIN_USB1_DRVVBUS 0xa34
  160. #define AM335X_PIN_OFFSET_MAX 0x0a34U
  161. #endif