am335x-boneblack.dts 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "am33xx.dtsi"
  7. #include "am335x-bone-common.dtsi"
  8. #include "am335x-boneblack-common.dtsi"
  9. / {
  10. model = "TI AM335x BeagleBone Black";
  11. compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  12. };
  13. &cpu0_opp_table {
  14. /*
  15. * All PG 2.0 silicon may not support 1GHz but some of the early
  16. * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
  17. * to support 1GHz OPP so enable it for PG 2.0 on this board.
  18. */
  19. oppnitro-1000000000 {
  20. opp-supported-hw = <0x06 0x0100>;
  21. };
  22. };
  23. &gpio0 {
  24. gpio-line-names =
  25. "[mdio_data]",
  26. "[mdio_clk]",
  27. "P9_22 [spi0_sclk]",
  28. "P9_21 [spi0_d0]",
  29. "P9_18 [spi0_d1]",
  30. "P9_17 [spi0_cs0]",
  31. "[mmc0_cd]",
  32. "P8_42A [ecappwm0]",
  33. "P8_35 [lcd d12]",
  34. "P8_33 [lcd d13]",
  35. "P8_31 [lcd d14]",
  36. "P8_32 [lcd d15]",
  37. "P9_20 [i2c2_sda]",
  38. "P9_19 [i2c2_scl]",
  39. "P9_26 [uart1_rxd]",
  40. "P9_24 [uart1_txd]",
  41. "[rmii1_txd3]",
  42. "[rmii1_txd2]",
  43. "[usb0_drvvbus]",
  44. "[hdmi cec]",
  45. "P9_41B",
  46. "[rmii1_txd1]",
  47. "P8_19 [ehrpwm2a]",
  48. "P8_13 [ehrpwm2b]",
  49. "NC",
  50. "NC",
  51. "P8_14",
  52. "P8_17",
  53. "[rmii1_txd0]",
  54. "[rmii1_refclk]",
  55. "P9_11 [uart4_rxd]",
  56. "P9_13 [uart4_txd]";
  57. };
  58. &gpio1 {
  59. gpio-line-names =
  60. "P8_25 [mmc1_dat0]",
  61. "[mmc1_dat1]",
  62. "P8_5 [mmc1_dat2]",
  63. "P8_6 [mmc1_dat3]",
  64. "P8_23 [mmc1_dat4]",
  65. "P8_22 [mmc1_dat5]",
  66. "P8_3 [mmc1_dat6]",
  67. "P8_4 [mmc1_dat7]",
  68. "NC",
  69. "NC",
  70. "NC",
  71. "NC",
  72. "P8_12",
  73. "P8_11",
  74. "P8_16",
  75. "P8_15",
  76. "P9_15A",
  77. "P9_23",
  78. "P9_14 [ehrpwm1a]",
  79. "P9_16 [ehrpwm1b]",
  80. "[emmc rst]",
  81. "[usr0 led]",
  82. "[usr1 led]",
  83. "[usr2 led]",
  84. "[usr3 led]",
  85. "[hdmi irq]",
  86. "[usb vbus oc]",
  87. "[hdmi audio]",
  88. "P9_12",
  89. "P8_26",
  90. "P8_21 [emmc]",
  91. "P8_20 [emmc]";
  92. };
  93. &gpio2 {
  94. gpio-line-names =
  95. "P9_15B",
  96. "P8_18",
  97. "P8_7",
  98. "P8_8",
  99. "P8_10",
  100. "P8_9",
  101. "P8_45 [hdmi]",
  102. "P8_46 [hdmi]",
  103. "P8_43 [hdmi]",
  104. "P8_44 [hdmi]",
  105. "P8_41 [hdmi]",
  106. "P8_42 [hdmi]",
  107. "P8_39 [hdmi]",
  108. "P8_40 [hdmi]",
  109. "P8_37 [hdmi]",
  110. "P8_38 [hdmi]",
  111. "P8_36 [hdmi]",
  112. "P8_34 [hdmi]",
  113. "[rmii1_rxd3]",
  114. "[rmii1_rxd2]",
  115. "[rmii1_rxd1]",
  116. "[rmii1_rxd0]",
  117. "P8_27 [hdmi]",
  118. "P8_29 [hdmi]",
  119. "P8_28 [hdmi]",
  120. "P8_30 [hdmi]",
  121. "[mmc0_dat3]",
  122. "[mmc0_dat2]",
  123. "[mmc0_dat1]",
  124. "[mmc0_dat0]",
  125. "[mmc0_clk]",
  126. "[mmc0_cmd]";
  127. };
  128. &gpio3 {
  129. gpio-line-names =
  130. "[mii col]",
  131. "[mii crs]",
  132. "[mii rx err]",
  133. "[mii tx en]",
  134. "[mii rx dv]",
  135. "[i2c0 sda]",
  136. "[i2c0 scl]",
  137. "[jtag emu0]",
  138. "[jtag emu1]",
  139. "[mii tx clk]",
  140. "[mii rx clk]",
  141. "NC",
  142. "NC",
  143. "[usb vbus en]",
  144. "P9_31 [spi1_sclk]",
  145. "P9_29 [spi1_d0]",
  146. "P9_30 [spi1_d1]",
  147. "P9_28 [spi1_cs0]",
  148. "P9_42B [ecappwm0]",
  149. "P9_27",
  150. "P9_41A",
  151. "P9_25",
  152. "NC",
  153. "NC",
  154. "NC",
  155. "NC",
  156. "NC",
  157. "NC",
  158. "NC",
  159. "NC",
  160. "NC",
  161. "NC";
  162. };