board_f.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <bootstage.h>
  14. #include <clock_legacy.h>
  15. #include <console.h>
  16. #include <cpu.h>
  17. #include <cpu_func.h>
  18. #include <dm.h>
  19. #include <env.h>
  20. #include <env_internal.h>
  21. #include <fdtdec.h>
  22. #include <fs.h>
  23. #include <hang.h>
  24. #include <i2c.h>
  25. #include <init.h>
  26. #include <initcall.h>
  27. #include <lcd.h>
  28. #include <log.h>
  29. #include <malloc.h>
  30. #include <mapmem.h>
  31. #include <os.h>
  32. #include <post.h>
  33. #include <relocate.h>
  34. #include <serial.h>
  35. #ifdef CONFIG_SPL
  36. #include <spl.h>
  37. #endif
  38. #include <status_led.h>
  39. #include <sysreset.h>
  40. #include <timer.h>
  41. #include <trace.h>
  42. #include <video.h>
  43. #include <watchdog.h>
  44. #include <asm/cache.h>
  45. #ifdef CONFIG_MACH_TYPE
  46. #include <asm/mach-types.h>
  47. #endif
  48. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  49. #include <asm/mp.h>
  50. #endif
  51. #include <asm/global_data.h>
  52. #include <asm/io.h>
  53. #include <asm/sections.h>
  54. #include <dm/root.h>
  55. #include <linux/errno.h>
  56. /*
  57. * Pointer to initial global data area
  58. *
  59. * Here we initialize it if needed.
  60. */
  61. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  62. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  63. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  64. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  65. #else
  66. DECLARE_GLOBAL_DATA_PTR;
  67. #endif
  68. /*
  69. * TODO(sjg@chromium.org): IMO this code should be
  70. * refactored to a single function, something like:
  71. *
  72. * void led_set_state(enum led_colour_t colour, int on);
  73. */
  74. /************************************************************************
  75. * Coloured LED functionality
  76. ************************************************************************
  77. * May be supplied by boards if desired
  78. */
  79. __weak void coloured_LED_init(void) {}
  80. __weak void red_led_on(void) {}
  81. __weak void red_led_off(void) {}
  82. __weak void green_led_on(void) {}
  83. __weak void green_led_off(void) {}
  84. __weak void yellow_led_on(void) {}
  85. __weak void yellow_led_off(void) {}
  86. __weak void blue_led_on(void) {}
  87. __weak void blue_led_off(void) {}
  88. /*
  89. * Why is gd allocated a register? Prior to reloc it might be better to
  90. * just pass it around to each function in this file?
  91. *
  92. * After reloc one could argue that it is hardly used and doesn't need
  93. * to be in a register. Or if it is it should perhaps hold pointers to all
  94. * global data for all modules, so that post-reloc we can avoid the massive
  95. * literal pool we get on ARM. Or perhaps just encourage each module to use
  96. * a structure...
  97. */
  98. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  99. static int init_func_watchdog_init(void)
  100. {
  101. # if defined(CONFIG_HW_WATCHDOG) && \
  102. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  103. defined(CONFIG_SH) || \
  104. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  105. defined(CONFIG_IMX_WATCHDOG))
  106. hw_watchdog_init();
  107. puts(" Watchdog enabled\n");
  108. # endif
  109. WATCHDOG_RESET();
  110. return 0;
  111. }
  112. int init_func_watchdog_reset(void)
  113. {
  114. WATCHDOG_RESET();
  115. return 0;
  116. }
  117. #endif /* CONFIG_WATCHDOG */
  118. __weak void board_add_ram_info(int use_default)
  119. {
  120. /* please define platform specific board_add_ram_info() */
  121. }
  122. static int init_baud_rate(void)
  123. {
  124. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  125. return 0;
  126. }
  127. static int display_text_info(void)
  128. {
  129. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  130. ulong bss_start, bss_end, text_base;
  131. bss_start = (ulong)&__bss_start;
  132. bss_end = (ulong)&__bss_end;
  133. #ifdef CONFIG_SYS_TEXT_BASE
  134. text_base = CONFIG_SYS_TEXT_BASE;
  135. #else
  136. text_base = CONFIG_SYS_MONITOR_BASE;
  137. #endif
  138. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  139. text_base, bss_start, bss_end);
  140. #endif
  141. return 0;
  142. }
  143. #ifdef CONFIG_SYSRESET
  144. static int print_resetinfo(void)
  145. {
  146. struct udevice *dev;
  147. char status[256];
  148. int ret;
  149. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  150. if (ret) {
  151. debug("%s: No sysreset device found (error: %d)\n",
  152. __func__, ret);
  153. /* Not all boards have sysreset drivers available during early
  154. * boot, so don't fail if one can't be found.
  155. */
  156. return 0;
  157. }
  158. if (!sysreset_get_status(dev, status, sizeof(status)))
  159. printf("%s", status);
  160. return 0;
  161. }
  162. #endif
  163. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  164. static int print_cpuinfo(void)
  165. {
  166. struct udevice *dev;
  167. char desc[512];
  168. int ret;
  169. dev = cpu_get_current_dev();
  170. if (!dev) {
  171. debug("%s: Could not get CPU device\n",
  172. __func__);
  173. return -ENODEV;
  174. }
  175. ret = cpu_get_desc(dev, desc, sizeof(desc));
  176. if (ret) {
  177. debug("%s: Could not get CPU description (err = %d)\n",
  178. dev->name, ret);
  179. return ret;
  180. }
  181. printf("CPU: %s\n", desc);
  182. return 0;
  183. }
  184. #endif
  185. static int announce_dram_init(void)
  186. {
  187. puts("DRAM: ");
  188. return 0;
  189. }
  190. static int show_dram_config(void)
  191. {
  192. unsigned long long size;
  193. int i;
  194. debug("\nRAM Configuration:\n");
  195. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  196. size += gd->bd->bi_dram[i].size;
  197. debug("Bank #%d: %llx ", i,
  198. (unsigned long long)(gd->bd->bi_dram[i].start));
  199. #ifdef DEBUG
  200. print_size(gd->bd->bi_dram[i].size, "\n");
  201. #endif
  202. }
  203. debug("\nDRAM: ");
  204. print_size(size, "");
  205. board_add_ram_info(0);
  206. putc('\n');
  207. return 0;
  208. }
  209. __weak int dram_init_banksize(void)
  210. {
  211. gd->bd->bi_dram[0].start = gd->ram_base;
  212. gd->bd->bi_dram[0].size = get_effective_memsize();
  213. return 0;
  214. }
  215. #if defined(CONFIG_SYS_I2C)
  216. static int init_func_i2c(void)
  217. {
  218. puts("I2C: ");
  219. i2c_init_all();
  220. puts("ready\n");
  221. return 0;
  222. }
  223. #endif
  224. #if defined(CONFIG_VID)
  225. __weak int init_func_vid(void)
  226. {
  227. return 0;
  228. }
  229. #endif
  230. static int setup_mon_len(void)
  231. {
  232. #if defined(__ARM__) || defined(__MICROBLAZE__)
  233. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  234. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  235. gd->mon_len = (ulong)&_end - (ulong)_init;
  236. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  237. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  238. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  239. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  240. #elif defined(CONFIG_SYS_MONITOR_BASE)
  241. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  242. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  243. #endif
  244. return 0;
  245. }
  246. static int setup_spl_handoff(void)
  247. {
  248. #if CONFIG_IS_ENABLED(HANDOFF)
  249. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  250. sizeof(struct spl_handoff));
  251. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  252. #endif
  253. return 0;
  254. }
  255. __weak int arch_cpu_init(void)
  256. {
  257. return 0;
  258. }
  259. __weak int mach_cpu_init(void)
  260. {
  261. return 0;
  262. }
  263. /* Get the top of usable RAM */
  264. __weak ulong board_get_usable_ram_top(ulong total_size)
  265. {
  266. #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
  267. /*
  268. * Detect whether we have so much RAM that it goes past the end of our
  269. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  270. */
  271. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  272. /*
  273. * Will wrap back to top of 32-bit space when reservations
  274. * are made.
  275. */
  276. return 0;
  277. #endif
  278. return gd->ram_top;
  279. }
  280. static int setup_dest_addr(void)
  281. {
  282. debug("Monitor len: %08lX\n", gd->mon_len);
  283. /*
  284. * Ram is setup, size stored in gd !!
  285. */
  286. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  287. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  288. /*
  289. * Subtract specified amount of memory to hide so that it won't
  290. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  291. * the Linux kernel should now get passed the now "corrected"
  292. * memory size and won't touch it either. This should work
  293. * for arch/ppc and arch/powerpc. Only Linux board ports in
  294. * arch/powerpc with bootwrapper support, that recalculate the
  295. * memory size from the SDRAM controller setup will have to
  296. * get fixed.
  297. */
  298. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  299. #endif
  300. #ifdef CONFIG_SYS_SDRAM_BASE
  301. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  302. #endif
  303. gd->ram_top = gd->ram_base + get_effective_memsize();
  304. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  305. gd->relocaddr = gd->ram_top;
  306. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  307. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  308. /*
  309. * We need to make sure the location we intend to put secondary core
  310. * boot code is reserved and not used by any part of u-boot
  311. */
  312. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  313. gd->relocaddr = determine_mp_bootpg(NULL);
  314. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  315. }
  316. #endif
  317. return 0;
  318. }
  319. #ifdef CONFIG_PRAM
  320. /* reserve protected RAM */
  321. static int reserve_pram(void)
  322. {
  323. ulong reg;
  324. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  325. gd->relocaddr -= (reg << 10); /* size is in kB */
  326. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  327. gd->relocaddr);
  328. return 0;
  329. }
  330. #endif /* CONFIG_PRAM */
  331. /* Round memory pointer down to next 4 kB limit */
  332. static int reserve_round_4k(void)
  333. {
  334. gd->relocaddr &= ~(4096 - 1);
  335. return 0;
  336. }
  337. __weak int arch_reserve_mmu(void)
  338. {
  339. return 0;
  340. }
  341. static int reserve_video(void)
  342. {
  343. #ifdef CONFIG_DM_VIDEO
  344. ulong addr;
  345. int ret;
  346. addr = gd->relocaddr;
  347. ret = video_reserve(&addr);
  348. if (ret)
  349. return ret;
  350. debug("Reserving %luk for video at: %08lx\n",
  351. ((unsigned long)gd->relocaddr - addr) >> 10, addr);
  352. gd->relocaddr = addr;
  353. #elif defined(CONFIG_LCD)
  354. # ifdef CONFIG_FB_ADDR
  355. gd->fb_base = CONFIG_FB_ADDR;
  356. # else
  357. /* reserve memory for LCD display (always full pages) */
  358. gd->relocaddr = lcd_setmem(gd->relocaddr);
  359. gd->fb_base = gd->relocaddr;
  360. # endif /* CONFIG_FB_ADDR */
  361. #endif
  362. return 0;
  363. }
  364. static int reserve_trace(void)
  365. {
  366. #ifdef CONFIG_TRACE
  367. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  368. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  369. debug("Reserving %luk for trace data at: %08lx\n",
  370. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  371. #endif
  372. return 0;
  373. }
  374. static int reserve_uboot(void)
  375. {
  376. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  377. /*
  378. * reserve memory for U-Boot code, data & bss
  379. * round down to next 4 kB limit
  380. */
  381. gd->relocaddr -= gd->mon_len;
  382. gd->relocaddr &= ~(4096 - 1);
  383. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  384. /* round down to next 64 kB limit so that IVPR stays aligned */
  385. gd->relocaddr &= ~(65536 - 1);
  386. #endif
  387. debug("Reserving %ldk for U-Boot at: %08lx\n",
  388. gd->mon_len >> 10, gd->relocaddr);
  389. }
  390. gd->start_addr_sp = gd->relocaddr;
  391. return 0;
  392. }
  393. /*
  394. * reserve after start_addr_sp the requested size and make the stack pointer
  395. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  396. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  397. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  398. */
  399. static unsigned long reserve_stack_aligned(size_t size)
  400. {
  401. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  402. }
  403. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  404. static int reserve_noncached(void)
  405. {
  406. /*
  407. * The value of gd->start_addr_sp must match the value of malloc_start
  408. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  409. * board_r.c:mem_malloc_init() and then used by
  410. * cache.c:noncached_init()
  411. *
  412. * These calculations must match the code in cache.c:noncached_init()
  413. */
  414. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  415. MMU_SECTION_SIZE;
  416. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  417. MMU_SECTION_SIZE);
  418. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  419. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  420. return 0;
  421. }
  422. #endif
  423. /* reserve memory for malloc() area */
  424. static int reserve_malloc(void)
  425. {
  426. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  427. debug("Reserving %dk for malloc() at: %08lx\n",
  428. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  429. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  430. reserve_noncached();
  431. #endif
  432. return 0;
  433. }
  434. /* (permanently) allocate a Board Info struct */
  435. static int reserve_board(void)
  436. {
  437. if (!gd->bd) {
  438. gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
  439. gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
  440. sizeof(struct bd_info));
  441. memset(gd->bd, '\0', sizeof(struct bd_info));
  442. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  443. sizeof(struct bd_info), gd->start_addr_sp);
  444. }
  445. return 0;
  446. }
  447. static int reserve_global_data(void)
  448. {
  449. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  450. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  451. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  452. sizeof(gd_t), gd->start_addr_sp);
  453. return 0;
  454. }
  455. static int reserve_fdt(void)
  456. {
  457. if (!IS_ENABLED(CONFIG_OF_EMBED)) {
  458. /*
  459. * If the device tree is sitting immediately above our image
  460. * then we must relocate it. If it is embedded in the data
  461. * section, then it will be relocated with other data.
  462. */
  463. if (gd->fdt_blob) {
  464. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
  465. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  466. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  467. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  468. gd->fdt_size, gd->start_addr_sp);
  469. }
  470. }
  471. return 0;
  472. }
  473. static int reserve_bootstage(void)
  474. {
  475. #ifdef CONFIG_BOOTSTAGE
  476. int size = bootstage_get_size();
  477. gd->start_addr_sp = reserve_stack_aligned(size);
  478. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  479. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  480. gd->start_addr_sp);
  481. #endif
  482. return 0;
  483. }
  484. __weak int arch_reserve_stacks(void)
  485. {
  486. return 0;
  487. }
  488. static int reserve_stacks(void)
  489. {
  490. /* make stack pointer 16-byte aligned */
  491. gd->start_addr_sp = reserve_stack_aligned(16);
  492. /*
  493. * let the architecture-specific code tailor gd->start_addr_sp and
  494. * gd->irq_sp
  495. */
  496. return arch_reserve_stacks();
  497. }
  498. static int reserve_bloblist(void)
  499. {
  500. #ifdef CONFIG_BLOBLIST
  501. /* Align to a 4KB boundary for easier reading of addresses */
  502. gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
  503. CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
  504. gd->new_bloblist = map_sysmem(gd->start_addr_sp,
  505. CONFIG_BLOBLIST_SIZE_RELOC);
  506. #endif
  507. return 0;
  508. }
  509. static int display_new_sp(void)
  510. {
  511. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  512. return 0;
  513. }
  514. __weak int arch_setup_bdinfo(void)
  515. {
  516. return 0;
  517. }
  518. int setup_bdinfo(void)
  519. {
  520. struct bd_info *bd = gd->bd;
  521. if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
  522. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  523. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  524. }
  525. #ifdef CONFIG_MACH_TYPE
  526. bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  527. #endif
  528. return arch_setup_bdinfo();
  529. }
  530. #ifdef CONFIG_POST
  531. static int init_post(void)
  532. {
  533. post_bootmode_init();
  534. post_run(NULL, POST_ROM | post_bootmode_get(0));
  535. return 0;
  536. }
  537. #endif
  538. static int reloc_fdt(void)
  539. {
  540. if (!IS_ENABLED(CONFIG_OF_EMBED)) {
  541. if (gd->flags & GD_FLG_SKIP_RELOC)
  542. return 0;
  543. if (gd->new_fdt) {
  544. memcpy(gd->new_fdt, gd->fdt_blob,
  545. fdt_totalsize(gd->fdt_blob));
  546. gd->fdt_blob = gd->new_fdt;
  547. }
  548. }
  549. return 0;
  550. }
  551. static int reloc_bootstage(void)
  552. {
  553. #ifdef CONFIG_BOOTSTAGE
  554. if (gd->flags & GD_FLG_SKIP_RELOC)
  555. return 0;
  556. if (gd->new_bootstage) {
  557. int size = bootstage_get_size();
  558. debug("Copying bootstage from %p to %p, size %x\n",
  559. gd->bootstage, gd->new_bootstage, size);
  560. memcpy(gd->new_bootstage, gd->bootstage, size);
  561. gd->bootstage = gd->new_bootstage;
  562. bootstage_relocate();
  563. }
  564. #endif
  565. return 0;
  566. }
  567. static int reloc_bloblist(void)
  568. {
  569. #ifdef CONFIG_BLOBLIST
  570. if (gd->flags & GD_FLG_SKIP_RELOC)
  571. return 0;
  572. if (gd->new_bloblist) {
  573. int size = CONFIG_BLOBLIST_SIZE;
  574. debug("Copying bloblist from %p to %p, size %x\n",
  575. gd->bloblist, gd->new_bloblist, size);
  576. bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
  577. gd->bloblist, size);
  578. gd->bloblist = gd->new_bloblist;
  579. }
  580. #endif
  581. return 0;
  582. }
  583. static int setup_reloc(void)
  584. {
  585. if (gd->flags & GD_FLG_SKIP_RELOC) {
  586. debug("Skipping relocation due to flag\n");
  587. return 0;
  588. }
  589. #ifdef CONFIG_SYS_TEXT_BASE
  590. #ifdef ARM
  591. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  592. #elif defined(CONFIG_M68K)
  593. /*
  594. * On all ColdFire arch cpu, monitor code starts always
  595. * just after the default vector table location, so at 0x400
  596. */
  597. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  598. #elif !defined(CONFIG_SANDBOX)
  599. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  600. #endif
  601. #endif
  602. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  603. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  604. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  605. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  606. gd->start_addr_sp);
  607. return 0;
  608. }
  609. #ifdef CONFIG_OF_BOARD_FIXUP
  610. static int fix_fdt(void)
  611. {
  612. return board_fix_fdt((void *)gd->fdt_blob);
  613. }
  614. #endif
  615. /* ARM calls relocate_code from its crt0.S */
  616. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  617. !CONFIG_IS_ENABLED(X86_64)
  618. static int jump_to_copy(void)
  619. {
  620. if (gd->flags & GD_FLG_SKIP_RELOC)
  621. return 0;
  622. /*
  623. * x86 is special, but in a nice way. It uses a trampoline which
  624. * enables the dcache if possible.
  625. *
  626. * For now, other archs use relocate_code(), which is implemented
  627. * similarly for all archs. When we do generic relocation, hopefully
  628. * we can make all archs enable the dcache prior to relocation.
  629. */
  630. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  631. /*
  632. * SDRAM and console are now initialised. The final stack can now
  633. * be setup in SDRAM. Code execution will continue in Flash, but
  634. * with the stack in SDRAM and Global Data in temporary memory
  635. * (CPU cache)
  636. */
  637. arch_setup_gd(gd->new_gd);
  638. board_init_f_r_trampoline(gd->start_addr_sp);
  639. #else
  640. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  641. #endif
  642. return 0;
  643. }
  644. #endif
  645. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  646. static int initf_bootstage(void)
  647. {
  648. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  649. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  650. int ret;
  651. ret = bootstage_init(!from_spl);
  652. if (ret)
  653. return ret;
  654. if (from_spl) {
  655. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  656. CONFIG_BOOTSTAGE_STASH_SIZE);
  657. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  658. if (ret && ret != -ENOENT) {
  659. debug("Failed to unstash bootstage: err=%d\n", ret);
  660. return ret;
  661. }
  662. }
  663. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  664. return 0;
  665. }
  666. static int initf_dm(void)
  667. {
  668. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  669. int ret;
  670. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  671. ret = dm_init_and_scan(true);
  672. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  673. if (ret)
  674. return ret;
  675. if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
  676. ret = dm_timer_init();
  677. if (ret)
  678. return ret;
  679. }
  680. #endif
  681. return 0;
  682. }
  683. /* Architecture-specific memory reservation */
  684. __weak int reserve_arch(void)
  685. {
  686. return 0;
  687. }
  688. __weak int arch_cpu_init_dm(void)
  689. {
  690. return 0;
  691. }
  692. __weak int checkcpu(void)
  693. {
  694. return 0;
  695. }
  696. __weak int clear_bss(void)
  697. {
  698. return 0;
  699. }
  700. static const init_fnc_t init_sequence_f[] = {
  701. setup_mon_len,
  702. #ifdef CONFIG_OF_CONTROL
  703. fdtdec_setup,
  704. #endif
  705. #ifdef CONFIG_TRACE_EARLY
  706. trace_early_init,
  707. #endif
  708. initf_malloc,
  709. log_init,
  710. initf_bootstage, /* uses its own timer, so does not need DM */
  711. #ifdef CONFIG_BLOBLIST
  712. bloblist_init,
  713. #endif
  714. setup_spl_handoff,
  715. #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
  716. console_record_init,
  717. #endif
  718. #if defined(CONFIG_HAVE_FSP)
  719. arch_fsp_init,
  720. #endif
  721. arch_cpu_init, /* basic arch cpu dependent setup */
  722. mach_cpu_init, /* SoC/machine dependent CPU setup */
  723. initf_dm,
  724. arch_cpu_init_dm,
  725. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  726. board_early_init_f,
  727. #endif
  728. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  729. /* get CPU and bus clocks according to the environment variable */
  730. get_clocks, /* get CPU and bus clocks (etc.) */
  731. #endif
  732. #if !defined(CONFIG_M68K)
  733. timer_init, /* initialize timer */
  734. #endif
  735. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  736. board_postclk_init,
  737. #endif
  738. env_init, /* initialize environment */
  739. init_baud_rate, /* initialze baudrate settings */
  740. serial_init, /* serial communications setup */
  741. console_init_f, /* stage 1 init of console */
  742. display_options, /* say that we are here */
  743. display_text_info, /* show debugging info if required */
  744. checkcpu,
  745. #if defined(CONFIG_SYSRESET)
  746. print_resetinfo,
  747. #endif
  748. #if defined(CONFIG_DISPLAY_CPUINFO)
  749. print_cpuinfo, /* display cpu info (and speed) */
  750. #endif
  751. #if defined(CONFIG_DTB_RESELECT)
  752. embedded_dtb_select,
  753. #endif
  754. #if defined(CONFIG_DISPLAY_BOARDINFO)
  755. show_board_info,
  756. #endif
  757. INIT_FUNC_WATCHDOG_INIT
  758. #if defined(CONFIG_MISC_INIT_F)
  759. misc_init_f,
  760. #endif
  761. INIT_FUNC_WATCHDOG_RESET
  762. #if defined(CONFIG_SYS_I2C)
  763. init_func_i2c,
  764. #endif
  765. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  766. init_func_vid,
  767. #endif
  768. announce_dram_init,
  769. dram_init, /* configure available RAM banks */
  770. #ifdef CONFIG_POST
  771. post_init_f,
  772. #endif
  773. INIT_FUNC_WATCHDOG_RESET
  774. #if defined(CONFIG_SYS_DRAM_TEST)
  775. testdram,
  776. #endif /* CONFIG_SYS_DRAM_TEST */
  777. INIT_FUNC_WATCHDOG_RESET
  778. #ifdef CONFIG_POST
  779. init_post,
  780. #endif
  781. INIT_FUNC_WATCHDOG_RESET
  782. /*
  783. * Now that we have DRAM mapped and working, we can
  784. * relocate the code and continue running from DRAM.
  785. *
  786. * Reserve memory at end of RAM for (top down in that order):
  787. * - area that won't get touched by U-Boot and Linux (optional)
  788. * - kernel log buffer
  789. * - protected RAM
  790. * - LCD framebuffer
  791. * - monitor code
  792. * - board info struct
  793. */
  794. setup_dest_addr,
  795. #ifdef CONFIG_OF_BOARD_FIXUP
  796. fix_fdt,
  797. #endif
  798. #ifdef CONFIG_PRAM
  799. reserve_pram,
  800. #endif
  801. reserve_round_4k,
  802. arch_reserve_mmu,
  803. reserve_video,
  804. reserve_trace,
  805. reserve_uboot,
  806. reserve_malloc,
  807. reserve_board,
  808. reserve_global_data,
  809. reserve_fdt,
  810. reserve_bootstage,
  811. reserve_bloblist,
  812. reserve_arch,
  813. reserve_stacks,
  814. dram_init_banksize,
  815. show_dram_config,
  816. INIT_FUNC_WATCHDOG_RESET
  817. setup_bdinfo,
  818. display_new_sp,
  819. INIT_FUNC_WATCHDOG_RESET
  820. reloc_fdt,
  821. reloc_bootstage,
  822. reloc_bloblist,
  823. setup_reloc,
  824. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  825. copy_uboot_to_ram,
  826. do_elf_reloc_fixups,
  827. #endif
  828. clear_bss,
  829. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  830. !CONFIG_IS_ENABLED(X86_64)
  831. jump_to_copy,
  832. #endif
  833. NULL,
  834. };
  835. void board_init_f(ulong boot_flags)
  836. {
  837. gd->flags = boot_flags;
  838. gd->have_console = 0;
  839. if (initcall_run_list(init_sequence_f))
  840. hang();
  841. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  842. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  843. !defined(CONFIG_ARC)
  844. /* NOTREACHED - jump_to_copy() does not return */
  845. hang();
  846. #endif
  847. }
  848. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  849. /*
  850. * For now this code is only used on x86.
  851. *
  852. * init_sequence_f_r is the list of init functions which are run when
  853. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  854. * The following limitations must be considered when implementing an
  855. * '_f_r' function:
  856. * - 'static' variables are read-only
  857. * - Global Data (gd->xxx) is read/write
  858. *
  859. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  860. * supported). It _should_, if possible, copy global data to RAM and
  861. * initialise the CPU caches (to speed up the relocation process)
  862. *
  863. * NOTE: At present only x86 uses this route, but it is intended that
  864. * all archs will move to this when generic relocation is implemented.
  865. */
  866. static const init_fnc_t init_sequence_f_r[] = {
  867. #if !CONFIG_IS_ENABLED(X86_64)
  868. init_cache_f_r,
  869. #endif
  870. NULL,
  871. };
  872. void board_init_f_r(void)
  873. {
  874. if (initcall_run_list(init_sequence_f_r))
  875. hang();
  876. /*
  877. * The pre-relocation drivers may be using memory that has now gone
  878. * away. Mark serial as unavailable - this will fall back to the debug
  879. * UART if available.
  880. *
  881. * Do the same with log drivers since the memory may not be available.
  882. */
  883. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  884. #ifdef CONFIG_TIMER
  885. gd->timer = NULL;
  886. #endif
  887. /*
  888. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  889. * Transfer execution from Flash to RAM by calculating the address
  890. * of the in-RAM copy of board_init_r() and calling it
  891. */
  892. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  893. /* NOTREACHED - board_init_r() does not return */
  894. hang();
  895. }
  896. #endif /* CONFIG_X86 */