durian.c 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019
  4. * shuyiqi <shuyiqi@phytium.com.cn>
  5. * liuhao <liuhao@phytium.com.cn>
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <cpu_func.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <asm/armv8/mmu.h>
  13. #include <asm/cache.h>
  14. #include <asm/global_data.h>
  15. #include <asm/system.h>
  16. #include <asm/io.h>
  17. #include <linux/arm-smccc.h>
  18. #include <linux/kernel.h>
  19. #include <scsi.h>
  20. #include "cpu.h"
  21. DECLARE_GLOBAL_DATA_PTR;
  22. int dram_init(void)
  23. {
  24. gd->mem_clk = 0;
  25. gd->ram_size = PHYS_SDRAM_1_SIZE;
  26. return 0;
  27. }
  28. int dram_init_banksize(void)
  29. {
  30. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  31. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  32. return 0;
  33. }
  34. int board_init(void)
  35. {
  36. return 0;
  37. }
  38. void reset_cpu(void)
  39. {
  40. struct arm_smccc_res res;
  41. arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
  42. debug("reset cpu error, %lx\n", res.a0);
  43. }
  44. static struct mm_region durian_mem_map[] = {
  45. {
  46. .virt = 0x0UL,
  47. .phys = 0x0UL,
  48. .size = 0x80000000UL,
  49. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  50. PTE_BLOCK_NON_SHARE |
  51. PTE_BLOCK_PXN |
  52. PTE_BLOCK_UXN
  53. },
  54. {
  55. .virt = (u64)PHYS_SDRAM_1,
  56. .phys = (u64)PHYS_SDRAM_1,
  57. .size = (u64)PHYS_SDRAM_1_SIZE,
  58. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  59. PTE_BLOCK_NS |
  60. PTE_BLOCK_INNER_SHARE
  61. },
  62. {
  63. 0,
  64. }
  65. };
  66. struct mm_region *mem_map = durian_mem_map;
  67. int print_cpuinfo(void)
  68. {
  69. printf("CPU: Phytium ft2004 %ld MHz\n", gd->cpu_clk);
  70. return 0;
  71. }
  72. int __asm_flush_l3_dcache(void)
  73. {
  74. int i, pstate;
  75. for (i = 0; i < HNF_COUNT; i++)
  76. writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE);
  77. for (i = 0; i < HNF_COUNT; i++) {
  78. do {
  79. pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE);
  80. } while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
  81. }
  82. for (i = 0; i < HNF_COUNT; i++)
  83. writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE);
  84. return 0;
  85. }
  86. int last_stage_init(void)
  87. {
  88. int ret;
  89. /* pci e */
  90. pci_init();
  91. /* scsi scan */
  92. ret = scsi_scan(true);
  93. if (ret) {
  94. printf("scsi scan failed\n");
  95. return CMD_RET_FAILURE;
  96. }
  97. return ret;
  98. }