README.pblimage 3.2 KB

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  1. ------------------------------------------------------------------
  2. Freescale PBL(pre-boot loader) Boot Image generation using mkimage
  3. ------------------------------------------------------------------
  4. The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
  5. NAND, etc. These SoCs use PBL to load RCW and/or pre-initialization
  6. instructions. For more details refer section 5 Pre-boot loader
  7. specifications of reference manual P3041RM/P4080RM/P5020RM at link:
  8. http://www.freescale.com/webapp/search/Serp.jsp?Reference+Manuals
  9. Building PBL Boot Image and boot steps
  10. --------------------------------------
  11. 1. Building PBL Boot Image.
  12. The default Image is u-boot.pbl.
  13. For eSPI boot(available on P3041/P4080/P5020):
  14. To build the eSPI boot image:
  15. make <board_name>_SPIFLASH_config
  16. make u-boot.pbl
  17. For SD boot(available on P3041/P4080/P5020):
  18. To build the SD boot image:
  19. make <board_name>_SDCARD_config
  20. make u-boot.pbl
  21. For Nand boot(available on P3041/P5020):
  22. To build the NAND boot image:
  23. make <board_name>_NAND_config
  24. make u-boot.pbl
  25. 2. pblimage support available with mkimage utility will generate Freescale PBL
  26. boot image that can be flashed on the board eSPI flash, SD/MMC and NAND.
  27. Following steps describe it in detail.
  28. 1). Boot from eSPI flash
  29. Write u-boot.pbl to eSPI flash from offset 0x0.
  30. for ex in u-boot:
  31. =>tftp 100000 u-boot.pbl
  32. =>sf probe 0
  33. =>sf erase 0 100000
  34. =>sf write 100000 0 $filesize
  35. Change SW1[1:5] = off off on off on.
  36. 2). Boot from SD/MMC
  37. Write u-boot.pbl to SD/MMC from offset 0x1000.
  38. for ex in u-boot:
  39. =>tftp 100000 u-boot.pbl
  40. =>mmcinfo
  41. =>mmc write 100000 8 441
  42. Change SW1[1:5] = off off on on off.
  43. 3). Boot from Nand
  44. Write u-boot.pbl to Nand from offset 0x0.
  45. for ex in u-boot:
  46. =>tftp 100000 u-boot.pbl
  47. =>nand info
  48. =>nand erase 0 100000
  49. =>nand write 100000 0 $filesize
  50. Change SW1[1:5] = off on off off on
  51. Change SW7[1:4] = on off off on
  52. Board specific configuration file specifications:
  53. ------------------------------------------------
  54. 1. Configuration files rcw.cfg and pbi.cfg must present in the
  55. board/freescale/corenet_ds/, rcw.cfg is for RCW, pbi.cfg is for
  56. PBI instructions. File name must not be changed since they are used
  57. in Makefile.
  58. 2. These files can have empty lines and lines starting with "#" as first
  59. character to put comments
  60. Typical example of rcw.cfg file:
  61. -----------------------------------
  62. #PBL preamble and RCW header
  63. aa55aa55 010e0100
  64. #64 bytes RCW data
  65. 4c580000 00000000 18185218 0000cccc
  66. 40464000 3c3c2000 58000000 61000000
  67. 00000000 00000000 00000000 008b6000
  68. 00000000 00000000 00000000 00000000
  69. Typical example of pbi.cfg file:
  70. -----------------------------------
  71. #PBI commands
  72. #Initialize CPC1
  73. 09010000 00200400
  74. 09138000 00000000
  75. 091380c0 00000100
  76. 09010100 00000000
  77. 09010104 fff0000b
  78. 09010f00 08000000
  79. 09010000 80000000
  80. #Configure LAW for CPC1
  81. 09000d00 00000000
  82. 09000d04 fff00000
  83. 09000d08 81000013
  84. 09000010 00000000
  85. 09000014 ff000000
  86. 09000018 81000000
  87. #Initialize eSPI controller
  88. 09110000 80000403
  89. 09110020 2d170008
  90. 09110024 00100008
  91. 09110028 00100008
  92. 0911002c 00100008
  93. #Flush PBL data
  94. 09138000 00000000
  95. 091380c0 00000000
  96. ------------------------------------------------
  97. Author: Shaohui Xie<Shaohui.Xie@freescale.com>