trats2.h 5.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2013 Samsung Electronics
  4. * Sanghee Kim <sh0130.kim@samsung.com>
  5. * Piotr Wilczek <p.wilczek@samsung.com>
  6. *
  7. * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
  8. */
  9. #ifndef __CONFIG_TRATS2_H
  10. #define __CONFIG_TRATS2_H
  11. #include <configs/exynos4-common.h>
  12. #define CONFIG_TIZEN /* TIZEN lib */
  13. #define CONFIG_SYS_L2CACHE_OFF
  14. #ifndef CONFIG_SYS_L2CACHE_OFF
  15. #define CONFIG_SYS_L2_PL310
  16. #define CONFIG_SYS_PL310_BASE 0x10502000
  17. #endif
  18. /* TRATS2 has 4 banks of DRAM */
  19. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  20. #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
  21. #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
  22. /* memtest works on */
  23. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
  24. #define CONFIG_BOOTCOMMAND "run autoboot"
  25. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
  26. - GENERATED_GBL_DATA_SIZE)
  27. #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
  28. #define CONFIG_SYS_MONITOR_BASE 0x00000000
  29. /* Tizen - partitions definitions */
  30. #define PARTS_CSA "csa-mmc"
  31. #define PARTS_BOOT "boot"
  32. #define PARTS_QBOOT "qboot"
  33. #define PARTS_CSC "csc"
  34. #define PARTS_ROOT "platform"
  35. #define PARTS_DATA "data"
  36. #define PARTS_UMS "ums"
  37. #define PARTS_DEFAULT \
  38. "uuid_disk=${uuid_gpt_disk};" \
  39. "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
  40. "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
  41. "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
  42. "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
  43. "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
  44. "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
  45. "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
  46. #define CONFIG_DFU_ALT \
  47. "u-boot raw 0x80 0x800;" \
  48. "/uImage ext4 0 2;" \
  49. "/modem.bin ext4 0 2;" \
  50. "/exynos4412-trats2.dtb ext4 0 2;" \
  51. ""PARTS_CSA" part 0 1;" \
  52. ""PARTS_BOOT" part 0 2;" \
  53. ""PARTS_QBOOT" part 0 3;" \
  54. ""PARTS_CSC" part 0 4;" \
  55. ""PARTS_ROOT" part 0 5;" \
  56. ""PARTS_DATA" part 0 6;" \
  57. ""PARTS_UMS" part 0 7;" \
  58. "params.bin raw 0x38 0x8;" \
  59. "/Image.itb ext4 0 2\0"
  60. #define CONFIG_EXTRA_ENV_SETTINGS \
  61. "bootk=" \
  62. "run loaduimage;" \
  63. "if run loaddtb; then " \
  64. "bootm 0x40007FC0 - ${fdtaddr};" \
  65. "fi;" \
  66. "bootm 0x40007FC0;\0" \
  67. "updatebackup=" \
  68. "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
  69. " mmc dev 0 0\0" \
  70. "updatebootb=" \
  71. "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
  72. "mmcboot=" \
  73. "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
  74. "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
  75. "run bootk\0" \
  76. "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
  77. "boottrace=setenv opts initcall_debug; run bootcmd\0" \
  78. "verify=n\0" \
  79. "rootfstype=ext4\0" \
  80. "console=console=ttySAC2,115200n8\0" \
  81. "kernelname=uImage\0" \
  82. "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
  83. "${kernelname}\0" \
  84. "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
  85. "${fdtfile}\0" \
  86. "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
  87. "mmcbootpart=2\0" \
  88. "mmcrootpart=5\0" \
  89. "opts=always_resume=1\0" \
  90. "partitions=" PARTS_DEFAULT \
  91. "dfu_alt_info=" CONFIG_DFU_ALT \
  92. "uartpath=ap\0" \
  93. "usbpath=ap\0" \
  94. "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
  95. "consoleoff=set console console=ram; save; reset\0" \
  96. "spladdr=0x40000100\0" \
  97. "splsize=0x200\0" \
  98. "splfile=falcon.bin\0" \
  99. "spl_export=" \
  100. "setexpr spl_imgsize ${splsize} + 8 ;" \
  101. "setenv spl_imgsize 0x${spl_imgsize};" \
  102. "setexpr spl_imgaddr ${spladdr} - 8 ;" \
  103. "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
  104. "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
  105. "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
  106. "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
  107. "spl export atags 0x40007FC0;" \
  108. "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
  109. "mw.l ${spl_addr_tmp} ${splsize};" \
  110. "ext4write mmc ${mmcdev}:${mmcbootpart}" \
  111. " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
  112. "setenv spl_imgsize;" \
  113. "setenv spl_imgaddr;" \
  114. "setenv spl_addr_tmp;\0" \
  115. CONFIG_EXTRA_ENV_ITB \
  116. "fdtaddr=40800000\0" \
  117. /* GPT */
  118. /* Security subsystem - enable hw_rand() */
  119. #define CONFIG_EXYNOS_ACE_SHA
  120. /* Common misc for Samsung */
  121. #define CONFIG_MISC_COMMON
  122. /* Download menu - Samsung common */
  123. #define CONFIG_LCD_MENU
  124. /* Download menu - definitions for check keys */
  125. #ifndef __ASSEMBLY__
  126. #define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
  127. #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
  128. #define KEY_PWR_STATUS_MASK (1 << 0)
  129. #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
  130. #define KEY_PWR_INTERRUPT_MASK (1 << 1)
  131. #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
  132. #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
  133. #endif /* __ASSEMBLY__ */
  134. /* LCD console */
  135. #define LCD_BPP LCD_COLOR16
  136. /* LCD */
  137. #define CONFIG_FB_ADDR 0x52504000
  138. #define CONFIG_EXYNOS_MIPI_DSIM
  139. #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
  140. #endif /* __CONFIG_H */