mt7620.h 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
  4. *
  5. * Author: Weijie Gao <weijie.gao@mediatek.com>
  6. */
  7. #ifndef __CONFIG_MT7620_H
  8. #define __CONFIG_MT7620_H
  9. #define CONFIG_SYS_HZ 1000
  10. #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
  11. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  12. #define CONFIG_SYS_MALLOC_LEN 0x100000
  13. #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
  14. #define CONFIG_SYS_SDRAM_BASE 0x80000000
  15. #define CONFIG_SYS_LOAD_ADDR 0x80010000
  16. #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
  17. #define CONFIG_SYS_BOOTM_LEN 0x1000000
  18. #define CONFIG_SYS_MAXARGS 16
  19. #define CONFIG_SYS_CBSIZE 1024
  20. /* Serial common */
  21. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  22. /* SPL */
  23. #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
  24. #define CONFIG_SKIP_LOWLEVEL_INIT
  25. #endif
  26. #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
  27. #define CONFIG_SPL_BSS_START_ADDR 0x80010000
  28. #define CONFIG_SPL_BSS_MAX_SIZE 0x10000
  29. #define CONFIG_SPL_MAX_SIZE 0x10000
  30. #define CONFIG_SPL_PAD_TO 0
  31. /* Dummy value */
  32. #define CONFIG_SYS_UBOOT_BASE 0
  33. #endif /* __CONFIG_MT7620_H */