imx8mq_cm.h 2.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2018 NXP
  4. */
  5. #ifndef __IMX8M_CM_H
  6. #define __IMX8M_CM_H
  7. #include <linux/sizes.h>
  8. #include <linux/stringify.h>
  9. #include <asm/arch/imx-regs.h>
  10. #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
  11. #define CONFIG_SPL_MAX_SIZE (124 * 1024)
  12. #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
  13. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  14. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  15. #ifdef CONFIG_SPL_BUILD
  16. #define CONFIG_SPL_STACK 0x187FF0
  17. #define CONFIG_SPL_BSS_START_ADDR 0x00180000
  18. #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
  19. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  20. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
  21. #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
  22. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  23. #define CONFIG_MALLOC_F_ADDR 0x182000
  24. /* For RAW image gives a error info not panic */
  25. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  26. #endif
  27. #define CONFIG_REMAKE_ELF
  28. /* ENET Config */
  29. /* ENET1 */
  30. #if defined(CONFIG_CMD_NET)
  31. #define CONFIG_ETHPRIME "FEC"
  32. #endif
  33. #ifndef CONFIG_SPL_BUILD
  34. #define BOOT_TARGET_DEVICES(func) \
  35. func(MMC, mmc, 0) \
  36. func(MMC, mmc, 1) \
  37. func(DHCP, dhcp, na)
  38. #include <config_distro_bootcmd.h>
  39. #endif
  40. /* Initial environment variables */
  41. #define CONFIG_EXTRA_ENV_SETTINGS \
  42. BOOTENV \
  43. "scriptaddr=0x43500000\0" \
  44. "kernel_addr_r=0x40880000\0" \
  45. "image=Image\0" \
  46. "console=ttymxc0,115200\0" \
  47. "fdt_addr=0x43000000\0" \
  48. "boot_fdt=try\0" \
  49. "fdt_file=imx8mq-cm.dtb\0" \
  50. "initrd_addr=0x43800000\0" \
  51. "bootm_size=0x10000000\0" \
  52. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  53. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  54. /* Link Definitions */
  55. #define CONFIG_LOADADDR 0x40480000
  56. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  57. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  58. #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
  59. #define CONFIG_SYS_INIT_SP_OFFSET \
  60. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  61. #define CONFIG_SYS_INIT_SP_ADDR \
  62. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  63. #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
  64. /* Size of malloc() pool */
  65. #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
  66. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  67. #define PHYS_SDRAM 0x40000000
  68. #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
  69. #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
  70. /* Monitor Command Prompt */
  71. #define CONFIG_SYS_CBSIZE 1024
  72. #define CONFIG_SYS_MAXARGS 64
  73. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  74. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  75. sizeof(CONFIG_SYS_PROMPT) + 16)
  76. #define CONFIG_IMX_BOOTAUX
  77. #define CONFIG_SYS_FSL_USDHC_NUM 2
  78. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  79. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  80. #endif