mtu3_plat.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2016 MediaTek Inc.
  4. *
  5. * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
  6. */
  7. #include <common.h>
  8. #include <dm/lists.h>
  9. #include <linux/iopoll.h>
  10. #include "mtu3.h"
  11. #include "mtu3_dr.h"
  12. void ssusb_set_force_mode(struct ssusb_mtk *ssusb,
  13. enum mtu3_dr_force_mode mode)
  14. {
  15. u32 value;
  16. value = mtu3_readl(ssusb->ippc_base, SSUSB_U2_CTRL(0));
  17. switch (mode) {
  18. case MTU3_DR_FORCE_DEVICE:
  19. value |= SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG;
  20. break;
  21. case MTU3_DR_FORCE_HOST:
  22. value |= SSUSB_U2_PORT_FORCE_IDDIG;
  23. value &= ~SSUSB_U2_PORT_RG_IDDIG;
  24. break;
  25. case MTU3_DR_FORCE_NONE:
  26. value &= ~(SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG);
  27. break;
  28. default:
  29. return;
  30. }
  31. mtu3_writel(ssusb->ippc_base, SSUSB_U2_CTRL(0), value);
  32. }
  33. /* u2-port0 should be powered on and enabled; */
  34. int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
  35. {
  36. void __iomem *ibase = ssusb->ippc_base;
  37. u32 value, check_val;
  38. int ret;
  39. check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
  40. SSUSB_REF_RST_B_STS;
  41. ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
  42. ((value & check_val) == check_val), 10000);
  43. if (ret) {
  44. dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
  45. return ret;
  46. }
  47. ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
  48. (value & SSUSB_U2_MAC_SYS_RST_B_STS), 10000);
  49. if (ret) {
  50. dev_err(ssusb->dev, "mac2 clock is not stable\n");
  51. return ret;
  52. }
  53. return 0;
  54. }
  55. int ssusb_phy_setup(struct ssusb_mtk *ssusb)
  56. {
  57. struct udevice *dev = ssusb->dev;
  58. struct phy_bulk *phys = &ssusb->phys;
  59. int ret;
  60. ret = generic_phy_get_bulk(dev, phys);
  61. if (ret)
  62. return ret;
  63. ret = generic_phy_init_bulk(phys);
  64. if (ret)
  65. return ret;
  66. ret = generic_phy_power_on_bulk(phys);
  67. if (ret)
  68. generic_phy_exit_bulk(phys);
  69. return ret;
  70. }
  71. void ssusb_phy_shutdown(struct ssusb_mtk *ssusb)
  72. {
  73. generic_phy_power_off_bulk(&ssusb->phys);
  74. generic_phy_exit_bulk(&ssusb->phys);
  75. }
  76. static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
  77. {
  78. int ret = 0;
  79. ret = regulator_set_enable(ssusb->vusb33_supply, true);
  80. if (ret < 0 && ret != -ENOSYS) {
  81. dev_err(ssusb->dev, "failed to enable vusb33\n");
  82. goto vusb33_err;
  83. }
  84. ret = clk_enable_bulk(&ssusb->clks);
  85. if (ret)
  86. goto clks_err;
  87. ret = ssusb_phy_setup(ssusb);
  88. if (ret) {
  89. dev_err(ssusb->dev, "failed to setup phy\n");
  90. goto phy_err;
  91. }
  92. return 0;
  93. phy_err:
  94. clk_disable_bulk(&ssusb->clks);
  95. clks_err:
  96. regulator_set_enable(ssusb->vusb33_supply, false);
  97. vusb33_err:
  98. return ret;
  99. }
  100. static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
  101. {
  102. clk_disable_bulk(&ssusb->clks);
  103. regulator_set_enable(ssusb->vusb33_supply, false);
  104. ssusb_phy_shutdown(ssusb);
  105. }
  106. static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
  107. {
  108. /* reset whole ip (xhci & u3d) */
  109. mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
  110. udelay(1);
  111. mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
  112. }
  113. static int get_ssusb_rscs(struct udevice *dev, struct ssusb_mtk *ssusb)
  114. {
  115. struct udevice *child;
  116. int ret;
  117. ret = device_get_supply_regulator(dev, "vusb33-supply",
  118. &ssusb->vusb33_supply);
  119. if (ret) /* optional, ignore error */
  120. dev_warn(dev, "can't get optional vusb33 %d\n", ret);
  121. ret = device_get_supply_regulator(dev, "vbus-supply",
  122. &ssusb->vbus_supply);
  123. if (ret) /* optional, ignore error */
  124. dev_warn(dev, "can't get optional vbus regulator %d!\n", ret);
  125. ret = clk_get_bulk(dev, &ssusb->clks);
  126. if (ret) {
  127. dev_err(dev, "failed to get clocks %d!\n", ret);
  128. return ret;
  129. }
  130. ssusb->ippc_base = devfdt_remap_addr_name(dev, "ippc");
  131. if (!ssusb->ippc_base) {
  132. dev_err(dev, "error mapping memory for ippc\n");
  133. return -ENODEV;
  134. }
  135. ret = device_find_first_child(dev, &child);
  136. if (ret || !child) {
  137. dev_err(dev, "failed to get child %d!\n", ret);
  138. return ret;
  139. }
  140. ssusb->mac_base = devfdt_remap_addr_name(child, "mac");
  141. if (!ssusb->mac_base) {
  142. dev_err(dev, "error mapping memory for mac\n");
  143. return -ENODEV;
  144. }
  145. ssusb->dr_mode = usb_get_dr_mode(dev_ofnode(child));
  146. if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN ||
  147. ssusb->dr_mode == USB_DR_MODE_OTG)
  148. ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
  149. if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
  150. ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
  151. else if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
  152. ssusb->dr_mode = USB_DR_MODE_HOST;
  153. dev_info(dev, "dr_mode: %d, ippc: 0x%p, mac: 0x%p\n",
  154. ssusb->dr_mode, ssusb->ippc_base, ssusb->mac_base);
  155. return 0;
  156. }
  157. static int mtu3_probe(struct udevice *dev)
  158. {
  159. struct ssusb_mtk *ssusb = dev_get_priv(dev);
  160. int ret = -ENOMEM;
  161. ssusb->dev = dev;
  162. ret = get_ssusb_rscs(dev, ssusb);
  163. if (ret)
  164. return ret;
  165. ret = ssusb_rscs_init(ssusb);
  166. if (ret)
  167. return ret;
  168. ssusb_ip_sw_reset(ssusb);
  169. return 0;
  170. }
  171. static int mtu3_remove(struct udevice *dev)
  172. {
  173. struct ssusb_mtk *ssusb = dev_to_ssusb(dev);
  174. ssusb_rscs_exit(ssusb);
  175. return 0;
  176. }
  177. static const struct udevice_id ssusb_of_match[] = {
  178. {.compatible = "mediatek,ssusb",},
  179. {},
  180. };
  181. #if CONFIG_IS_ENABLED(DM_USB_GADGET)
  182. int dm_usb_gadget_handle_interrupts(struct udevice *dev)
  183. {
  184. struct mtu3 *mtu = dev_get_priv(dev);
  185. mtu3_irq(0, mtu);
  186. return 0;
  187. }
  188. static int mtu3_gadget_probe(struct udevice *dev)
  189. {
  190. struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
  191. struct mtu3 *mtu = dev_get_priv(dev);
  192. mtu->dev = dev;
  193. ssusb->u3d = mtu;
  194. return ssusb_gadget_init(ssusb);
  195. }
  196. static int mtu3_gadget_remove(struct udevice *dev)
  197. {
  198. struct mtu3 *mtu = dev_get_priv(dev);
  199. ssusb_gadget_exit(mtu->ssusb);
  200. return 0;
  201. }
  202. U_BOOT_DRIVER(mtu3_peripheral) = {
  203. .name = "mtu3-peripheral",
  204. .id = UCLASS_USB_GADGET_GENERIC,
  205. .of_match = ssusb_of_match,
  206. .probe = mtu3_gadget_probe,
  207. .remove = mtu3_gadget_remove,
  208. .priv_auto = sizeof(struct mtu3),
  209. };
  210. #endif
  211. #if defined(CONFIG_SPL_USB_HOST) || \
  212. (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
  213. static int mtu3_host_probe(struct udevice *dev)
  214. {
  215. struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
  216. struct mtu3_host *u3h = dev_get_priv(dev);
  217. struct xhci_hcor *hcor;
  218. int rc;
  219. u3h->dev = dev;
  220. ssusb->u3h = u3h;
  221. rc = ssusb_host_init(ssusb);
  222. if (rc)
  223. return rc;
  224. u3h->ctrl.quirks = XHCI_MTK_HOST;
  225. hcor = (struct xhci_hcor *)((uintptr_t)u3h->hcd +
  226. HC_LENGTH(xhci_readl(&u3h->hcd->cr_capbase)));
  227. return xhci_register(dev, u3h->hcd, hcor);
  228. }
  229. static int mtu3_host_remove(struct udevice *dev)
  230. {
  231. struct mtu3_host *u3h = dev_get_priv(dev);
  232. xhci_deregister(dev);
  233. ssusb_host_exit(u3h->ssusb);
  234. return 0;
  235. }
  236. U_BOOT_DRIVER(mtu3_host) = {
  237. .name = "mtu3-host",
  238. .id = UCLASS_USB,
  239. .of_match = ssusb_of_match,
  240. .probe = mtu3_host_probe,
  241. .remove = mtu3_host_remove,
  242. .priv_auto = sizeof(struct mtu3_host),
  243. .ops = &xhci_usb_ops,
  244. .flags = DM_FLAG_ALLOC_PRIV_DMA,
  245. };
  246. #endif
  247. static int mtu3_glue_bind(struct udevice *parent)
  248. {
  249. struct udevice *dev;
  250. enum usb_dr_mode dr_mode;
  251. const char *driver;
  252. const char *name;
  253. ofnode node;
  254. int ret;
  255. node = ofnode_by_compatible(dev_ofnode(parent), "mediatek,ssusb");
  256. if (!ofnode_valid(node))
  257. return -ENODEV;
  258. name = ofnode_get_name(node);
  259. dr_mode = usb_get_dr_mode(node);
  260. switch (dr_mode) {
  261. #if CONFIG_IS_ENABLED(DM_USB_GADGET)
  262. case USB_DR_MODE_PERIPHERAL:
  263. case USB_DR_MODE_OTG:
  264. dev_dbg(parent, "%s: dr_mode: peripheral\n", __func__);
  265. driver = "mtu3-peripheral";
  266. break;
  267. #endif
  268. #if defined(CONFIG_SPL_USB_HOST) || \
  269. (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
  270. case USB_DR_MODE_HOST:
  271. dev_dbg(parent, "%s: dr_mode: host\n", __func__);
  272. driver = "mtu3-host";
  273. break;
  274. #endif
  275. default:
  276. dev_err(parent, "%s: unsupported dr_mode %d\n",
  277. __func__, dr_mode);
  278. return -ENODEV;
  279. };
  280. dev_dbg(parent, "%s: node name: %s, driver %s, dr_mode %d\n",
  281. __func__, name, driver, dr_mode);
  282. ret = device_bind_driver_to_node(parent, driver, name, node, &dev);
  283. if (ret)
  284. dev_err(parent, "%s: not able to bind usb device mode\n",
  285. __func__);
  286. return ret;
  287. }
  288. static const struct udevice_id mtu3_of_match[] = {
  289. {.compatible = "mediatek,mtu3",},
  290. {},
  291. };
  292. U_BOOT_DRIVER(mtu3) = {
  293. .name = "mtu3",
  294. .id = UCLASS_NOP,
  295. .of_match = mtu3_of_match,
  296. .bind = mtu3_glue_bind,
  297. .probe = mtu3_probe,
  298. .remove = mtu3_remove,
  299. .priv_auto = sizeof(struct ssusb_mtk),
  300. };