mtu3_gadget_ep0.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
  4. *
  5. * Copyright (c) 2016 MediaTek Inc.
  6. *
  7. * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
  8. */
  9. #include <linux/iopoll.h>
  10. #include <linux/usb/composite.h>
  11. #include "mtu3.h"
  12. /* ep0 is always mtu3->in_eps[0] */
  13. #define next_ep0_request(mtu) next_request((mtu)->ep0)
  14. /* for high speed test mode; see USB 2.0 spec 7.1.20 */
  15. static const u8 mtu3_test_packet[53] = {
  16. /* implicit SYNC then DATA0 to start */
  17. /* JKJKJKJK x9 */
  18. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  19. /* JJKKJJKK x8 */
  20. 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
  21. /* JJJJKKKK x8 */
  22. 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
  23. /* JJJJJJJKKKKKKK x8 */
  24. 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  25. /* JJJJJJJK x8 */
  26. 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
  27. /* JKKKKKKK x10, JK */
  28. 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
  29. /* implicit CRC16 then EOP to end */
  30. };
  31. static char *decode_ep0_state(struct mtu3 *mtu)
  32. {
  33. switch (mtu->ep0_state) {
  34. case MU3D_EP0_STATE_SETUP:
  35. return "SETUP";
  36. case MU3D_EP0_STATE_TX:
  37. return "IN";
  38. case MU3D_EP0_STATE_RX:
  39. return "OUT";
  40. case MU3D_EP0_STATE_TX_END:
  41. return "TX-END";
  42. case MU3D_EP0_STATE_STALL:
  43. return "STALL";
  44. default:
  45. return "??";
  46. }
  47. }
  48. static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
  49. {
  50. mtu3_req_complete(mtu->ep0, req, 0);
  51. }
  52. static int
  53. forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  54. __releases(mtu->lock)
  55. __acquires(mtu->lock)
  56. {
  57. int ret;
  58. if (!mtu->gadget_driver)
  59. return -EOPNOTSUPP;
  60. spin_unlock(&mtu->lock);
  61. ret = mtu->gadget_driver->setup(&mtu->g, setup);
  62. spin_lock(&mtu->lock);
  63. dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
  64. return ret;
  65. }
  66. static inline void writel_rep(volatile void *addr, const void *buffer,
  67. unsigned int count)
  68. {
  69. if (count) {
  70. const u32 *buf = buffer;
  71. do {
  72. writel(*buf++, addr);
  73. } while (--count);
  74. }
  75. }
  76. static inline void readl_rep(const volatile void *addr, void *buffer,
  77. unsigned int count)
  78. {
  79. if (count) {
  80. u32 *buf = buffer;
  81. do {
  82. u32 x = readl(addr);
  83. *buf++ = x;
  84. } while (--count);
  85. }
  86. }
  87. static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
  88. {
  89. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  90. u16 index = 0;
  91. dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
  92. __func__, mep->epnum, len, src);
  93. if (len >= 4) {
  94. writel_rep(fifo, src, len >> 2);
  95. index = len & ~0x03;
  96. }
  97. if (len & 0x02) {
  98. writew(*(u16 *)&src[index], fifo);
  99. index += 2;
  100. }
  101. if (len & 0x01)
  102. writeb(src[index], fifo);
  103. }
  104. static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
  105. {
  106. void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
  107. u32 value;
  108. u16 index = 0;
  109. dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
  110. __func__, mep->epnum, len, dst);
  111. if (len >= 4) {
  112. readl_rep(fifo, dst, len >> 2);
  113. index = len & ~0x03;
  114. }
  115. if (len & 0x3) {
  116. value = readl(fifo);
  117. memcpy(&dst[index], &value, len & 0x3);
  118. }
  119. }
  120. static void ep0_load_test_packet(struct mtu3 *mtu)
  121. {
  122. /*
  123. * because the length of test packet is less than max packet of HS ep0,
  124. * write it into fifo directly.
  125. */
  126. ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
  127. }
  128. /*
  129. * A. send STALL for setup transfer without data stage:
  130. * set SENDSTALL and SETUPPKTRDY at the same time;
  131. * B. send STALL for other cases:
  132. * set SENDSTALL only.
  133. */
  134. static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
  135. {
  136. struct mtu3 *mtu = mep0->mtu;
  137. void __iomem *mbase = mtu->mac_base;
  138. u32 csr;
  139. /* EP0_SENTSTALL is W1C */
  140. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  141. if (set)
  142. csr |= EP0_SENDSTALL | pktrdy;
  143. else
  144. csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
  145. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
  146. mtu->delayed_status = false;
  147. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  148. dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
  149. set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
  150. }
  151. static void ep0_do_status_stage(struct mtu3 *mtu)
  152. {
  153. void __iomem *mbase = mtu->mac_base;
  154. u32 value;
  155. value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  156. mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY | EP0_DATAEND);
  157. }
  158. static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
  159. static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
  160. {}
  161. static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
  162. {
  163. struct mtu3_request *mreq;
  164. struct mtu3 *mtu;
  165. struct usb_set_sel_req sel;
  166. memcpy(&sel, req->buf, sizeof(sel));
  167. mreq = to_mtu3_request(req);
  168. mtu = mreq->mtu;
  169. dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
  170. sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
  171. }
  172. /* queue data stage to handle 6 byte SET_SEL request */
  173. static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  174. {
  175. int ret;
  176. u16 length = le16_to_cpu(setup->wLength);
  177. if (unlikely(length != 6)) {
  178. dev_err(mtu->dev, "%s wrong wLength:%d\n",
  179. __func__, length);
  180. return -EINVAL;
  181. }
  182. mtu->ep0_req.mep = mtu->ep0;
  183. mtu->ep0_req.request.length = 6;
  184. mtu->ep0_req.request.buf = mtu->setup_buf;
  185. mtu->ep0_req.request.complete = ep0_set_sel_complete;
  186. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  187. return ret < 0 ? ret : 1;
  188. }
  189. static int
  190. ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
  191. {
  192. struct mtu3_ep *mep = NULL;
  193. int handled = 1;
  194. u8 result[2] = {0, 0};
  195. u8 epnum = 0;
  196. int is_in;
  197. switch (setup->bRequestType & USB_RECIP_MASK) {
  198. case USB_RECIP_DEVICE:
  199. result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
  200. result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
  201. if (mtu->g.speed >= USB_SPEED_SUPER) {
  202. result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
  203. result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
  204. }
  205. dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
  206. result[0], mtu->u1_enable, mtu->u2_enable);
  207. break;
  208. case USB_RECIP_INTERFACE:
  209. break;
  210. case USB_RECIP_ENDPOINT:
  211. epnum = (u8)le16_to_cpu(setup->wIndex);
  212. is_in = epnum & USB_DIR_IN;
  213. epnum &= USB_ENDPOINT_NUMBER_MASK;
  214. if (epnum >= mtu->num_eps) {
  215. handled = -EINVAL;
  216. break;
  217. }
  218. if (!epnum)
  219. break;
  220. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  221. if (!mep->desc) {
  222. handled = -EINVAL;
  223. break;
  224. }
  225. if (mep->flags & MTU3_EP_STALL)
  226. result[0] |= 1 << USB_ENDPOINT_HALT;
  227. break;
  228. default:
  229. /* class, vendor, etc ... delegate */
  230. handled = 0;
  231. break;
  232. }
  233. if (handled > 0) {
  234. int ret;
  235. /* prepare a data stage for GET_STATUS */
  236. dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
  237. memcpy(mtu->setup_buf, result, sizeof(result));
  238. mtu->ep0_req.mep = mtu->ep0;
  239. mtu->ep0_req.request.length = 2;
  240. mtu->ep0_req.request.buf = &mtu->setup_buf;
  241. mtu->ep0_req.request.complete = ep0_dummy_complete;
  242. ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
  243. if (ret < 0)
  244. handled = ret;
  245. }
  246. return handled;
  247. }
  248. static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  249. {
  250. void __iomem *mbase = mtu->mac_base;
  251. int handled = 1;
  252. u32 value = 0;
  253. switch (le16_to_cpu(setup->wIndex) >> 8) {
  254. case TEST_J:
  255. dev_dbg(mtu->dev, "TEST_J\n");
  256. mtu->test_mode_nr = TEST_J_MODE;
  257. break;
  258. case TEST_K:
  259. dev_dbg(mtu->dev, "TEST_K\n");
  260. mtu->test_mode_nr = TEST_K_MODE;
  261. break;
  262. case TEST_SE0_NAK:
  263. dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
  264. mtu->test_mode_nr = TEST_SE0_NAK_MODE;
  265. break;
  266. case TEST_PACKET:
  267. dev_dbg(mtu->dev, "TEST_PACKET\n");
  268. mtu->test_mode_nr = TEST_PACKET_MODE;
  269. break;
  270. default:
  271. handled = -EINVAL;
  272. goto out;
  273. }
  274. mtu->test_mode = true;
  275. /* no TX completion interrupt, and need restart platform after test */
  276. if (mtu->test_mode_nr == TEST_PACKET_MODE)
  277. ep0_load_test_packet(mtu);
  278. /* send status before entering test mode. */
  279. ep0_do_status_stage(mtu);
  280. /* wait for ACK status sent by host */
  281. readl_poll_timeout(mbase + U3D_EP0CSR, value,
  282. !(value & EP0_DATAEND), 5000);
  283. mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
  284. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  285. out:
  286. return handled;
  287. }
  288. static int ep0_handle_feature_dev(struct mtu3 *mtu,
  289. struct usb_ctrlrequest *setup, bool set)
  290. {
  291. void __iomem *mbase = mtu->mac_base;
  292. int handled = -EINVAL;
  293. u32 lpc;
  294. switch (le16_to_cpu(setup->wValue)) {
  295. case USB_DEVICE_REMOTE_WAKEUP:
  296. mtu->may_wakeup = !!set;
  297. handled = 1;
  298. break;
  299. case USB_DEVICE_TEST_MODE:
  300. if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
  301. (le16_to_cpu(setup->wIndex) & 0xff))
  302. break;
  303. handled = handle_test_mode(mtu, setup);
  304. break;
  305. case USB_DEVICE_U1_ENABLE:
  306. if (mtu->g.speed < USB_SPEED_SUPER ||
  307. mtu->g.state != USB_STATE_CONFIGURED)
  308. break;
  309. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  310. if (set)
  311. lpc |= SW_U1_REQUEST_ENABLE;
  312. else
  313. lpc &= ~SW_U1_REQUEST_ENABLE;
  314. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  315. mtu->u1_enable = !!set;
  316. handled = 1;
  317. break;
  318. case USB_DEVICE_U2_ENABLE:
  319. if (mtu->g.speed < USB_SPEED_SUPER ||
  320. mtu->g.state != USB_STATE_CONFIGURED)
  321. break;
  322. lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
  323. if (set)
  324. lpc |= SW_U2_REQUEST_ENABLE;
  325. else
  326. lpc &= ~SW_U2_REQUEST_ENABLE;
  327. mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
  328. mtu->u2_enable = !!set;
  329. handled = 1;
  330. break;
  331. default:
  332. handled = -EINVAL;
  333. break;
  334. }
  335. return handled;
  336. }
  337. static int ep0_handle_feature(struct mtu3 *mtu,
  338. struct usb_ctrlrequest *setup, bool set)
  339. {
  340. struct mtu3_ep *mep;
  341. int handled = -EINVAL;
  342. int is_in;
  343. u16 value;
  344. u16 index;
  345. u8 epnum;
  346. value = le16_to_cpu(setup->wValue);
  347. index = le16_to_cpu(setup->wIndex);
  348. switch (setup->bRequestType & USB_RECIP_MASK) {
  349. case USB_RECIP_DEVICE:
  350. handled = ep0_handle_feature_dev(mtu, setup, set);
  351. break;
  352. case USB_RECIP_INTERFACE:
  353. /* superspeed only */
  354. if (value == USB_INTRF_FUNC_SUSPEND &&
  355. mtu->g.speed >= USB_SPEED_SUPER) {
  356. /*
  357. * forward the request because function drivers
  358. * should handle it
  359. */
  360. handled = 0;
  361. }
  362. break;
  363. case USB_RECIP_ENDPOINT:
  364. epnum = index & USB_ENDPOINT_NUMBER_MASK;
  365. if (epnum == 0 || epnum >= mtu->num_eps ||
  366. value != USB_ENDPOINT_HALT)
  367. break;
  368. is_in = index & USB_DIR_IN;
  369. mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
  370. if (!mep->desc)
  371. break;
  372. handled = 1;
  373. /* ignore request if endpoint is wedged */
  374. if (mep->flags & MTU3_EP_WEDGE)
  375. break;
  376. mtu3_ep_stall_set(mep, set);
  377. break;
  378. default:
  379. /* class, vendor, etc ... delegate */
  380. handled = 0;
  381. break;
  382. }
  383. return handled;
  384. }
  385. /*
  386. * handle all control requests can be handled
  387. * returns:
  388. * negative errno - error happened
  389. * zero - need delegate SETUP to gadget driver
  390. * positive - already handled
  391. */
  392. static int handle_standard_request(struct mtu3 *mtu,
  393. struct usb_ctrlrequest *setup)
  394. {
  395. void __iomem *mbase = mtu->mac_base;
  396. enum usb_device_state state = mtu->g.state;
  397. int handled = -EINVAL;
  398. u32 dev_conf;
  399. u16 value;
  400. value = le16_to_cpu(setup->wValue);
  401. /* the gadget driver handles everything except what we must handle */
  402. switch (setup->bRequest) {
  403. case USB_REQ_SET_ADDRESS:
  404. /* change it after the status stage */
  405. mtu->address = (u8)(value & 0x7f);
  406. dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
  407. dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
  408. dev_conf &= ~DEV_ADDR_MSK;
  409. dev_conf |= DEV_ADDR(mtu->address);
  410. mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
  411. if (mtu->address)
  412. usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
  413. else
  414. usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
  415. handled = 1;
  416. break;
  417. case USB_REQ_SET_CONFIGURATION:
  418. if (state == USB_STATE_ADDRESS) {
  419. usb_gadget_set_state(&mtu->g,
  420. USB_STATE_CONFIGURED);
  421. } else if (state == USB_STATE_CONFIGURED) {
  422. /*
  423. * USB2 spec sec 9.4.7, if wValue is 0 then dev
  424. * is moved to addressed state
  425. */
  426. if (!value)
  427. usb_gadget_set_state(&mtu->g,
  428. USB_STATE_ADDRESS);
  429. }
  430. handled = 0;
  431. break;
  432. case USB_REQ_CLEAR_FEATURE:
  433. handled = ep0_handle_feature(mtu, setup, 0);
  434. break;
  435. case USB_REQ_SET_FEATURE:
  436. handled = ep0_handle_feature(mtu, setup, 1);
  437. break;
  438. case USB_REQ_GET_STATUS:
  439. handled = ep0_get_status(mtu, setup);
  440. break;
  441. case USB_REQ_SET_SEL:
  442. handled = ep0_set_sel(mtu, setup);
  443. break;
  444. case USB_REQ_SET_ISOCH_DELAY:
  445. handled = 1;
  446. break;
  447. default:
  448. /* delegate SET_CONFIGURATION, etc */
  449. handled = 0;
  450. }
  451. return handled;
  452. }
  453. /* receive an data packet (OUT) */
  454. static void ep0_rx_state(struct mtu3 *mtu)
  455. {
  456. struct mtu3_request *mreq;
  457. struct usb_request *req;
  458. void __iomem *mbase = mtu->mac_base;
  459. u32 maxp;
  460. u32 csr;
  461. u16 count = 0;
  462. dev_dbg(mtu->dev, "%s\n", __func__);
  463. csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
  464. mreq = next_ep0_request(mtu);
  465. req = &mreq->request;
  466. /* read packet and ack; or stall because of gadget driver bug */
  467. if (req) {
  468. void *buf = req->buf + req->actual;
  469. unsigned int len = req->length - req->actual;
  470. /* read the buffer */
  471. count = mtu3_readl(mbase, U3D_RXCOUNT0);
  472. if (count > len) {
  473. req->status = -EOVERFLOW;
  474. count = len;
  475. }
  476. ep0_read_fifo(mtu->ep0, buf, count);
  477. req->actual += count;
  478. csr |= EP0_RXPKTRDY;
  479. maxp = mtu->g.ep0->maxpacket;
  480. if (count < maxp || req->actual == req->length) {
  481. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  482. dev_dbg(mtu->dev, "ep0 state: %s\n",
  483. decode_ep0_state(mtu));
  484. csr |= EP0_DATAEND;
  485. } else {
  486. req = NULL;
  487. }
  488. } else {
  489. csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
  490. dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
  491. }
  492. mtu3_writel(mbase, U3D_EP0CSR, csr);
  493. /* give back the request if have received all data */
  494. if (req)
  495. ep0_req_giveback(mtu, req);
  496. }
  497. /* transmitting to the host (IN) */
  498. static void ep0_tx_state(struct mtu3 *mtu)
  499. {
  500. struct mtu3_request *mreq = next_ep0_request(mtu);
  501. struct usb_request *req;
  502. u32 csr;
  503. u8 *src;
  504. u32 count;
  505. u32 maxp;
  506. dev_dbg(mtu->dev, "%s\n", __func__);
  507. if (!mreq)
  508. return;
  509. maxp = mtu->g.ep0->maxpacket;
  510. req = &mreq->request;
  511. /* load the data */
  512. src = (u8 *)req->buf + req->actual;
  513. count = min(maxp, req->length - req->actual);
  514. if (count)
  515. ep0_write_fifo(mtu->ep0, src, count);
  516. dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
  517. __func__, req->actual, req->length, count, maxp, req->zero);
  518. req->actual += count;
  519. if ((count < maxp) ||
  520. ((req->actual == req->length) && !req->zero))
  521. mtu->ep0_state = MU3D_EP0_STATE_TX_END;
  522. /* send it out, triggering a "txpktrdy cleared" irq */
  523. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  524. mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
  525. dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
  526. mtu3_readl(mtu->mac_base, U3D_EP0CSR));
  527. }
  528. static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
  529. {
  530. struct mtu3_request *mreq;
  531. u32 count;
  532. u32 csr;
  533. csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
  534. count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
  535. ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
  536. dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
  537. setup->bRequestType, setup->bRequest,
  538. le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
  539. le16_to_cpu(setup->wLength));
  540. /* clean up any leftover transfers */
  541. mreq = next_ep0_request(mtu);
  542. if (mreq)
  543. ep0_req_giveback(mtu, &mreq->request);
  544. if (le16_to_cpu(setup->wLength) == 0) {
  545. ; /* no data stage, nothing to do */
  546. } else if (setup->bRequestType & USB_DIR_IN) {
  547. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  548. csr | EP0_SETUPPKTRDY | EP0_DPHTX);
  549. mtu->ep0_state = MU3D_EP0_STATE_TX;
  550. } else {
  551. mtu3_writel(mtu->mac_base, U3D_EP0CSR,
  552. (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
  553. mtu->ep0_state = MU3D_EP0_STATE_RX;
  554. }
  555. }
  556. static int ep0_handle_setup(struct mtu3 *mtu)
  557. __releases(mtu->lock)
  558. __acquires(mtu->lock)
  559. {
  560. struct usb_ctrlrequest setup;
  561. struct mtu3_request *mreq;
  562. int handled = 0;
  563. ep0_read_setup(mtu, &setup);
  564. if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
  565. handled = handle_standard_request(mtu, &setup);
  566. dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
  567. handled, decode_ep0_state(mtu));
  568. if (handled < 0)
  569. goto stall;
  570. else if (handled > 0)
  571. goto finish;
  572. handled = forward_to_driver(mtu, &setup);
  573. if (handled < 0) {
  574. stall:
  575. dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
  576. ep0_stall_set(mtu->ep0, true,
  577. le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
  578. return 0;
  579. }
  580. finish:
  581. if (mtu->test_mode) {
  582. ; /* nothing to do */
  583. } else if (handled == USB_GADGET_DELAYED_STATUS) {
  584. mreq = next_ep0_request(mtu);
  585. if (mreq) {
  586. /* already asked us to continue delayed status */
  587. ep0_do_status_stage(mtu);
  588. ep0_req_giveback(mtu, &mreq->request);
  589. } else {
  590. /* do delayed STATUS stage till receive ep0_queue */
  591. mtu->delayed_status = true;
  592. }
  593. } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
  594. ep0_do_status_stage(mtu);
  595. /* complete zlp request directly */
  596. mreq = next_ep0_request(mtu);
  597. if (mreq && !mreq->request.length)
  598. ep0_req_giveback(mtu, &mreq->request);
  599. }
  600. return 0;
  601. }
  602. irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
  603. {
  604. void __iomem *mbase = mtu->mac_base;
  605. struct mtu3_request *mreq;
  606. u32 int_status;
  607. irqreturn_t ret = IRQ_NONE;
  608. u32 csr;
  609. u32 len;
  610. int_status = mtu3_readl(mbase, U3D_EPISR);
  611. int_status &= mtu3_readl(mbase, U3D_EPIER);
  612. mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
  613. /* only handle ep0's */
  614. if (!(int_status & (EP0ISR | SETUPENDISR)))
  615. return IRQ_NONE;
  616. /* abort current SETUP, and process new one */
  617. if (int_status & SETUPENDISR)
  618. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  619. csr = mtu3_readl(mbase, U3D_EP0CSR);
  620. dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
  621. /* we sent a stall.. need to clear it now.. */
  622. if (csr & EP0_SENTSTALL) {
  623. ep0_stall_set(mtu->ep0, false, 0);
  624. csr = mtu3_readl(mbase, U3D_EP0CSR);
  625. ret = IRQ_HANDLED;
  626. }
  627. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  628. switch (mtu->ep0_state) {
  629. case MU3D_EP0_STATE_TX:
  630. /* irq on clearing txpktrdy */
  631. if ((csr & EP0_FIFOFULL) == 0) {
  632. ep0_tx_state(mtu);
  633. ret = IRQ_HANDLED;
  634. }
  635. break;
  636. case MU3D_EP0_STATE_RX:
  637. /* irq on set rxpktrdy */
  638. if (csr & EP0_RXPKTRDY) {
  639. ep0_rx_state(mtu);
  640. ret = IRQ_HANDLED;
  641. }
  642. break;
  643. case MU3D_EP0_STATE_TX_END:
  644. mtu3_writel(mbase, U3D_EP0CSR,
  645. (csr & EP0_W1C_BITS) | EP0_DATAEND);
  646. mreq = next_ep0_request(mtu);
  647. if (mreq)
  648. ep0_req_giveback(mtu, &mreq->request);
  649. mtu->ep0_state = MU3D_EP0_STATE_SETUP;
  650. ret = IRQ_HANDLED;
  651. dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
  652. break;
  653. case MU3D_EP0_STATE_SETUP:
  654. if (!(csr & EP0_SETUPPKTRDY))
  655. break;
  656. len = mtu3_readl(mbase, U3D_RXCOUNT0);
  657. if (len != 8) {
  658. dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
  659. break;
  660. }
  661. ep0_handle_setup(mtu);
  662. ret = IRQ_HANDLED;
  663. break;
  664. default:
  665. /* can't happen */
  666. ep0_stall_set(mtu->ep0, true, 0);
  667. WARN_ON(1);
  668. break;
  669. }
  670. return ret;
  671. }
  672. static int mtu3_ep0_enable(struct usb_ep *ep,
  673. const struct usb_endpoint_descriptor *desc)
  674. {
  675. /* always enabled */
  676. return -EINVAL;
  677. }
  678. static int mtu3_ep0_disable(struct usb_ep *ep)
  679. {
  680. /* always enabled */
  681. return -EINVAL;
  682. }
  683. static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
  684. {
  685. struct mtu3 *mtu = mep->mtu;
  686. mreq->mtu = mtu;
  687. mreq->request.actual = 0;
  688. mreq->request.status = -EINPROGRESS;
  689. dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
  690. mep->name, decode_ep0_state(mtu), mreq->request.length);
  691. switch (mtu->ep0_state) {
  692. case MU3D_EP0_STATE_SETUP:
  693. case MU3D_EP0_STATE_RX: /* control-OUT data */
  694. case MU3D_EP0_STATE_TX: /* control-IN data */
  695. break;
  696. default:
  697. dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
  698. decode_ep0_state(mtu));
  699. return -EINVAL;
  700. }
  701. if (mtu->delayed_status) {
  702. mtu->delayed_status = false;
  703. ep0_do_status_stage(mtu);
  704. /* needn't giveback the request for handling delay STATUS */
  705. return 0;
  706. }
  707. if (!list_empty(&mep->req_list))
  708. return -EBUSY;
  709. list_add_tail(&mreq->list, &mep->req_list);
  710. /* sequence #1, IN ... start writing the data */
  711. if (mtu->ep0_state == MU3D_EP0_STATE_TX)
  712. ep0_tx_state(mtu);
  713. return 0;
  714. }
  715. static int mtu3_ep0_queue(struct usb_ep *ep,
  716. struct usb_request *req, gfp_t gfp)
  717. {
  718. struct mtu3_ep *mep;
  719. struct mtu3_request *mreq;
  720. struct mtu3 *mtu;
  721. unsigned long flags;
  722. int ret = 0;
  723. if (!ep || !req)
  724. return -EINVAL;
  725. mep = to_mtu3_ep(ep);
  726. mtu = mep->mtu;
  727. mreq = to_mtu3_request(req);
  728. spin_lock_irqsave(&mtu->lock, flags);
  729. ret = ep0_queue(mep, mreq);
  730. spin_unlock_irqrestore(&mtu->lock, flags);
  731. return ret;
  732. }
  733. static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
  734. {
  735. /* we just won't support this */
  736. return -EINVAL;
  737. }
  738. static int mtu3_ep0_halt(struct usb_ep *ep, int value)
  739. {
  740. struct mtu3_ep *mep;
  741. struct mtu3 *mtu;
  742. unsigned long flags;
  743. int ret = 0;
  744. if (!ep || !value)
  745. return -EINVAL;
  746. mep = to_mtu3_ep(ep);
  747. mtu = mep->mtu;
  748. dev_dbg(mtu->dev, "%s\n", __func__);
  749. spin_lock_irqsave(&mtu->lock, flags);
  750. if (!list_empty(&mep->req_list)) {
  751. ret = -EBUSY;
  752. goto cleanup;
  753. }
  754. switch (mtu->ep0_state) {
  755. /*
  756. * stalls are usually issued after parsing SETUP packet, either
  757. * directly in irq context from setup() or else later.
  758. */
  759. case MU3D_EP0_STATE_TX:
  760. case MU3D_EP0_STATE_TX_END:
  761. case MU3D_EP0_STATE_RX:
  762. case MU3D_EP0_STATE_SETUP:
  763. ep0_stall_set(mtu->ep0, true, 0);
  764. break;
  765. default:
  766. dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
  767. decode_ep0_state(mtu));
  768. ret = -EINVAL;
  769. }
  770. cleanup:
  771. spin_unlock_irqrestore(&mtu->lock, flags);
  772. return ret;
  773. }
  774. const struct usb_ep_ops mtu3_ep0_ops = {
  775. .enable = mtu3_ep0_enable,
  776. .disable = mtu3_ep0_disable,
  777. .alloc_request = mtu3_alloc_request,
  778. .free_request = mtu3_free_request,
  779. .queue = mtu3_ep0_queue,
  780. .dequeue = mtu3_ep0_dequeue,
  781. .set_halt = mtu3_ep0_halt,
  782. };