test.dts 26 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/pinctrl/sandbox-pinmux.h>
  6. #include <dt-bindings/mux/mux.h>
  7. / {
  8. model = "sandbox";
  9. compatible = "sandbox";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. aliases {
  13. console = &uart0;
  14. eth0 = "/eth@10002000";
  15. eth3 = &eth_3;
  16. eth5 = &eth_5;
  17. gpio1 = &gpio_a;
  18. gpio2 = &gpio_b;
  19. gpio3 = &gpio_c;
  20. i2c0 = "/i2c@0";
  21. mmc0 = "/mmc0";
  22. mmc1 = "/mmc1";
  23. pci0 = &pci0;
  24. pci1 = &pci1;
  25. pci2 = &pci2;
  26. remoteproc0 = &rproc_1;
  27. remoteproc1 = &rproc_2;
  28. rtc0 = &rtc_0;
  29. rtc1 = &rtc_1;
  30. spi0 = "/spi@0";
  31. testfdt6 = "/e-test";
  32. testbus3 = "/some-bus";
  33. testfdt0 = "/some-bus/c-test@0";
  34. testfdt12 = "/some-bus/c-test@1";
  35. testfdt3 = "/b-test";
  36. testfdt5 = "/some-bus/c-test@5";
  37. testfdt8 = "/a-test";
  38. testfdtm1 = &testfdtm1;
  39. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  40. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  41. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  42. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  43. fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
  44. usb0 = &usb_0;
  45. usb1 = &usb_1;
  46. usb2 = &usb_2;
  47. axi0 = &axi;
  48. osd0 = "/osd";
  49. };
  50. audio: audio-codec {
  51. compatible = "sandbox,audio-codec";
  52. #sound-dai-cells = <1>;
  53. };
  54. buttons {
  55. compatible = "gpio-keys";
  56. btn1 {
  57. gpios = <&gpio_a 3 0>;
  58. label = "button1";
  59. };
  60. btn2 {
  61. gpios = <&gpio_a 4 0>;
  62. label = "button2";
  63. };
  64. };
  65. buttons2 {
  66. compatible = "adc-keys";
  67. io-channels = <&adc 3>;
  68. keyup-threshold-microvolt = <3000000>;
  69. button-up {
  70. label = "button3";
  71. linux,code = <KEY_F3>;
  72. press-threshold-microvolt = <1500000>;
  73. };
  74. button-down {
  75. label = "button4";
  76. linux,code = <KEY_F4>;
  77. press-threshold-microvolt = <1000000>;
  78. };
  79. button-enter {
  80. label = "button5";
  81. linux,code = <KEY_F5>;
  82. press-threshold-microvolt = <500000>;
  83. };
  84. };
  85. cros_ec: cros-ec {
  86. reg = <0 0>;
  87. compatible = "google,cros-ec-sandbox";
  88. /*
  89. * This describes the flash memory within the EC. Note
  90. * that the STM32L flash erases to 0, not 0xff.
  91. */
  92. flash {
  93. image-pos = <0x08000000>;
  94. size = <0x20000>;
  95. erase-value = <0>;
  96. /* Information for sandbox */
  97. ro {
  98. image-pos = <0>;
  99. size = <0xf000>;
  100. };
  101. wp-ro {
  102. image-pos = <0xf000>;
  103. size = <0x1000>;
  104. used = <0x884>;
  105. compress = "lz4";
  106. uncomp-size = <0xcf8>;
  107. hash {
  108. algo = "sha256";
  109. value = [00 01 02 03 04 05 06 07
  110. 08 09 0a 0b 0c 0d 0e 0f
  111. 10 11 12 13 14 15 16 17
  112. 18 19 1a 1b 1c 1d 1e 1f];
  113. };
  114. };
  115. rw {
  116. image-pos = <0x10000>;
  117. size = <0x10000>;
  118. };
  119. };
  120. };
  121. dsi_host: dsi_host {
  122. compatible = "sandbox,dsi-host";
  123. };
  124. a-test {
  125. reg = <0 1>;
  126. compatible = "denx,u-boot-fdt-test";
  127. ping-expect = <0>;
  128. ping-add = <0>;
  129. u-boot,dm-pre-reloc;
  130. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  131. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  132. <0>, <&gpio_a 12>;
  133. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  134. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  135. <&gpio_b 7 GPIO_IN 3 2 1>,
  136. <&gpio_b 8 GPIO_OUT 3 2 1>,
  137. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  138. test3-gpios =
  139. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  140. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  141. <&gpio_c 2 GPIO_OUT>,
  142. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  143. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  144. <&gpio_c 5 GPIO_IN>,
  145. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  146. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  147. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  148. test5-gpios = <&gpio_a 19>;
  149. int-value = <1234>;
  150. uint-value = <(-1234)>;
  151. int64-value = /bits/ 64 <0x1111222233334444>;
  152. int-array = <5678 9123 4567>;
  153. str-value = "test string";
  154. interrupts-extended = <&irq 3 0>;
  155. acpi,name = "GHIJ";
  156. phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
  157. mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
  158. <&muxcontroller0 2>, <&muxcontroller0 3>,
  159. <&muxcontroller1>;
  160. mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
  161. mux-syscon = <&syscon3>;
  162. display-timings {
  163. timing0: 240x320 {
  164. clock-frequency = <6500000>;
  165. hactive = <240>;
  166. vactive = <320>;
  167. hfront-porch = <6>;
  168. hback-porch = <7>;
  169. hsync-len = <1>;
  170. vback-porch = <5>;
  171. vfront-porch = <8>;
  172. vsync-len = <2>;
  173. hsync-active = <1>;
  174. vsync-active = <0>;
  175. de-active = <1>;
  176. pixelclk-active = <1>;
  177. interlaced;
  178. doublescan;
  179. doubleclk;
  180. };
  181. timing1: 480x800 {
  182. clock-frequency = <9000000>;
  183. hactive = <480>;
  184. vactive = <800>;
  185. hfront-porch = <10>;
  186. hback-porch = <59>;
  187. hsync-len = <12>;
  188. vback-porch = <15>;
  189. vfront-porch = <17>;
  190. vsync-len = <16>;
  191. hsync-active = <0>;
  192. vsync-active = <1>;
  193. de-active = <0>;
  194. pixelclk-active = <0>;
  195. };
  196. timing2: 800x480 {
  197. clock-frequency = <33500000>;
  198. hactive = <800>;
  199. vactive = <480>;
  200. hback-porch = <89>;
  201. hfront-porch = <164>;
  202. vback-porch = <23>;
  203. vfront-porch = <10>;
  204. hsync-len = <11>;
  205. vsync-len = <13>;
  206. };
  207. };
  208. };
  209. junk {
  210. reg = <1 1>;
  211. compatible = "not,compatible";
  212. };
  213. no-compatible {
  214. reg = <2 1>;
  215. };
  216. backlight: backlight {
  217. compatible = "pwm-backlight";
  218. enable-gpios = <&gpio_a 1>;
  219. power-supply = <&ldo_1>;
  220. pwms = <&pwm 0 1000>;
  221. default-brightness-level = <5>;
  222. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  223. };
  224. bind-test {
  225. compatible = "simple-bus";
  226. bind-test-child1 {
  227. compatible = "sandbox,phy";
  228. #phy-cells = <1>;
  229. };
  230. bind-test-child2 {
  231. compatible = "simple-bus";
  232. };
  233. };
  234. b-test {
  235. reg = <3 1>;
  236. compatible = "denx,u-boot-fdt-test";
  237. ping-expect = <3>;
  238. ping-add = <3>;
  239. mux-controls = <&muxcontroller0 0>;
  240. mux-control-names = "mux0";
  241. };
  242. phy_provider0: gen_phy@0 {
  243. compatible = "sandbox,phy";
  244. #phy-cells = <1>;
  245. };
  246. phy_provider1: gen_phy@1 {
  247. compatible = "sandbox,phy";
  248. #phy-cells = <0>;
  249. broken;
  250. };
  251. phy_provider2: gen_phy@2 {
  252. compatible = "sandbox,phy";
  253. #phy-cells = <0>;
  254. };
  255. gen_phy_user: gen_phy_user {
  256. compatible = "simple-bus";
  257. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  258. phy-names = "phy1", "phy2", "phy3";
  259. };
  260. gen_phy_user1: gen_phy_user1 {
  261. compatible = "simple-bus";
  262. phys = <&phy_provider0 0>, <&phy_provider2>;
  263. phy-names = "phy1", "phy2";
  264. };
  265. some-bus {
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. compatible = "denx,u-boot-test-bus";
  269. reg = <3 1>;
  270. ping-expect = <4>;
  271. ping-add = <4>;
  272. c-test@5 {
  273. compatible = "denx,u-boot-fdt-test";
  274. reg = <5>;
  275. ping-expect = <5>;
  276. ping-add = <5>;
  277. };
  278. c-test@0 {
  279. compatible = "denx,u-boot-fdt-test";
  280. reg = <0>;
  281. ping-expect = <6>;
  282. ping-add = <6>;
  283. };
  284. c-test@1 {
  285. compatible = "denx,u-boot-fdt-test";
  286. reg = <1>;
  287. ping-expect = <7>;
  288. ping-add = <7>;
  289. };
  290. };
  291. d-test {
  292. reg = <3 1>;
  293. ping-expect = <6>;
  294. ping-add = <6>;
  295. compatible = "google,another-fdt-test";
  296. };
  297. e-test {
  298. reg = <3 1>;
  299. ping-expect = <6>;
  300. ping-add = <6>;
  301. compatible = "google,another-fdt-test";
  302. };
  303. f-test {
  304. compatible = "denx,u-boot-fdt-test";
  305. };
  306. g-test {
  307. compatible = "denx,u-boot-fdt-test";
  308. };
  309. h-test {
  310. compatible = "denx,u-boot-fdt-test1";
  311. };
  312. i-test {
  313. compatible = "mediatek,u-boot-fdt-test";
  314. #address-cells = <1>;
  315. #size-cells = <0>;
  316. subnode@0 {
  317. reg = <0>;
  318. };
  319. subnode@1 {
  320. reg = <1>;
  321. };
  322. subnode@2 {
  323. reg = <2>;
  324. };
  325. };
  326. devres-test {
  327. compatible = "denx,u-boot-devres-test";
  328. };
  329. another-test {
  330. reg = <0 2>;
  331. compatible = "denx,u-boot-fdt-test";
  332. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  333. test5-gpios = <&gpio_a 19>;
  334. };
  335. acpi_test1: acpi-test {
  336. compatible = "denx,u-boot-acpi-test";
  337. acpi-ssdt-test-data = "ab";
  338. acpi-dsdt-test-data = "hi";
  339. child {
  340. compatible = "denx,u-boot-acpi-test";
  341. };
  342. };
  343. acpi_test2: acpi-test2 {
  344. compatible = "denx,u-boot-acpi-test";
  345. acpi-ssdt-test-data = "cd";
  346. acpi-dsdt-test-data = "jk";
  347. };
  348. clocks {
  349. clk_fixed: clk-fixed {
  350. compatible = "fixed-clock";
  351. #clock-cells = <0>;
  352. clock-frequency = <1234>;
  353. };
  354. clk_fixed_factor: clk-fixed-factor {
  355. compatible = "fixed-factor-clock";
  356. #clock-cells = <0>;
  357. clock-div = <3>;
  358. clock-mult = <2>;
  359. clocks = <&clk_fixed>;
  360. };
  361. osc {
  362. compatible = "fixed-clock";
  363. #clock-cells = <0>;
  364. clock-frequency = <20000000>;
  365. };
  366. };
  367. clk_sandbox: clk-sbox {
  368. compatible = "sandbox,clk";
  369. #clock-cells = <1>;
  370. assigned-clocks = <&clk_sandbox 3>;
  371. assigned-clock-rates = <321>;
  372. };
  373. clk-test {
  374. compatible = "sandbox,clk-test";
  375. clocks = <&clk_fixed>,
  376. <&clk_sandbox 1>,
  377. <&clk_sandbox 0>,
  378. <&clk_sandbox 3>,
  379. <&clk_sandbox 2>;
  380. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  381. };
  382. ccf: clk-ccf {
  383. compatible = "sandbox,clk-ccf";
  384. };
  385. eth@10002000 {
  386. compatible = "sandbox,eth";
  387. reg = <0x10002000 0x1000>;
  388. fake-host-hwaddr = [00 00 66 44 22 00];
  389. };
  390. eth_5: eth@10003000 {
  391. compatible = "sandbox,eth";
  392. reg = <0x10003000 0x1000>;
  393. fake-host-hwaddr = [00 00 66 44 22 11];
  394. };
  395. eth_3: sbe5 {
  396. compatible = "sandbox,eth";
  397. reg = <0x10005000 0x1000>;
  398. fake-host-hwaddr = [00 00 66 44 22 33];
  399. };
  400. eth@10004000 {
  401. compatible = "sandbox,eth";
  402. reg = <0x10004000 0x1000>;
  403. fake-host-hwaddr = [00 00 66 44 22 22];
  404. };
  405. firmware {
  406. sandbox_firmware: sandbox-firmware {
  407. compatible = "sandbox,firmware";
  408. };
  409. sandbox-scmi-agent@0 {
  410. compatible = "sandbox,scmi-agent";
  411. #address-cells = <1>;
  412. #size-cells = <0>;
  413. clk_scmi0: protocol@14 {
  414. reg = <0x14>;
  415. #clock-cells = <1>;
  416. };
  417. reset_scmi0: protocol@16 {
  418. reg = <0x16>;
  419. #reset-cells = <1>;
  420. };
  421. };
  422. sandbox-scmi-agent@1 {
  423. compatible = "sandbox,scmi-agent";
  424. #address-cells = <1>;
  425. #size-cells = <0>;
  426. clk_scmi1: protocol@14 {
  427. reg = <0x14>;
  428. #clock-cells = <1>;
  429. };
  430. protocol@10 {
  431. reg = <0x10>;
  432. };
  433. };
  434. };
  435. pinctrl-gpio {
  436. compatible = "sandbox,pinctrl-gpio";
  437. gpio_a: base-gpios {
  438. compatible = "sandbox,gpio";
  439. gpio-controller;
  440. #gpio-cells = <1>;
  441. gpio-bank-name = "a";
  442. sandbox,gpio-count = <20>;
  443. hog_input_active_low {
  444. gpio-hog;
  445. input;
  446. gpios = <10 GPIO_ACTIVE_LOW>;
  447. };
  448. hog_input_active_high {
  449. gpio-hog;
  450. input;
  451. gpios = <11 GPIO_ACTIVE_HIGH>;
  452. };
  453. hog_output_low {
  454. gpio-hog;
  455. output-low;
  456. gpios = <12 GPIO_ACTIVE_HIGH>;
  457. };
  458. hog_output_high {
  459. gpio-hog;
  460. output-high;
  461. gpios = <13 GPIO_ACTIVE_HIGH>;
  462. };
  463. };
  464. gpio_b: extra-gpios {
  465. compatible = "sandbox,gpio";
  466. gpio-controller;
  467. #gpio-cells = <5>;
  468. gpio-bank-name = "b";
  469. sandbox,gpio-count = <10>;
  470. };
  471. gpio_c: pinmux-gpios {
  472. compatible = "sandbox,gpio";
  473. gpio-controller;
  474. #gpio-cells = <2>;
  475. gpio-bank-name = "c";
  476. sandbox,gpio-count = <10>;
  477. };
  478. };
  479. i2c@0 {
  480. #address-cells = <1>;
  481. #size-cells = <0>;
  482. reg = <0 1>;
  483. compatible = "sandbox,i2c";
  484. clock-frequency = <100000>;
  485. eeprom@2c {
  486. reg = <0x2c>;
  487. compatible = "i2c-eeprom";
  488. sandbox,emul = <&emul_eeprom>;
  489. partitions {
  490. compatible = "fixed-partitions";
  491. #address-cells = <1>;
  492. #size-cells = <1>;
  493. bootcount_i2c: bootcount@10 {
  494. reg = <10 2>;
  495. };
  496. };
  497. };
  498. rtc_0: rtc@43 {
  499. reg = <0x43>;
  500. compatible = "sandbox-rtc";
  501. sandbox,emul = <&emul0>;
  502. };
  503. rtc_1: rtc@61 {
  504. reg = <0x61>;
  505. compatible = "sandbox-rtc";
  506. sandbox,emul = <&emul1>;
  507. };
  508. i2c_emul: emul {
  509. reg = <0xff>;
  510. compatible = "sandbox,i2c-emul-parent";
  511. emul_eeprom: emul-eeprom {
  512. compatible = "sandbox,i2c-eeprom";
  513. sandbox,filename = "i2c.bin";
  514. sandbox,size = <256>;
  515. };
  516. emul0: emul0 {
  517. compatible = "sandbox,i2c-rtc";
  518. };
  519. emul1: emull {
  520. compatible = "sandbox,i2c-rtc";
  521. };
  522. };
  523. sandbox_pmic: sandbox_pmic {
  524. reg = <0x40>;
  525. sandbox,emul = <&emul_pmic0>;
  526. };
  527. mc34708: pmic@41 {
  528. reg = <0x41>;
  529. sandbox,emul = <&emul_pmic1>;
  530. };
  531. };
  532. bootcount@0 {
  533. compatible = "u-boot,bootcount-rtc";
  534. rtc = <&rtc_1>;
  535. offset = <0x13>;
  536. };
  537. bootcount {
  538. compatible = "u-boot,bootcount-i2c-eeprom";
  539. i2c-eeprom = <&bootcount_i2c>;
  540. };
  541. adc: adc@0 {
  542. compatible = "sandbox,adc";
  543. #io-channel-cells = <1>;
  544. vdd-supply = <&buck2>;
  545. vss-microvolts = <0>;
  546. };
  547. irq: irq {
  548. compatible = "sandbox,irq";
  549. interrupt-controller;
  550. #interrupt-cells = <2>;
  551. };
  552. lcd {
  553. u-boot,dm-pre-reloc;
  554. compatible = "sandbox,lcd-sdl";
  555. xres = <1366>;
  556. yres = <768>;
  557. };
  558. leds {
  559. compatible = "gpio-leds";
  560. iracibble {
  561. gpios = <&gpio_a 1 0>;
  562. label = "sandbox:red";
  563. };
  564. martinet {
  565. gpios = <&gpio_a 2 0>;
  566. label = "sandbox:green";
  567. };
  568. default_on {
  569. gpios = <&gpio_a 5 0>;
  570. label = "sandbox:default_on";
  571. default-state = "on";
  572. };
  573. default_off {
  574. gpios = <&gpio_a 6 0>;
  575. /* label intentionally omitted */
  576. default-state = "off";
  577. };
  578. };
  579. mbox: mbox {
  580. compatible = "sandbox,mbox";
  581. #mbox-cells = <1>;
  582. };
  583. mbox-test {
  584. compatible = "sandbox,mbox-test";
  585. mboxes = <&mbox 100>, <&mbox 1>;
  586. mbox-names = "other", "test";
  587. };
  588. cpus {
  589. timebase-frequency = <2000000>;
  590. cpu-test1 {
  591. timebase-frequency = <3000000>;
  592. compatible = "sandbox,cpu_sandbox";
  593. u-boot,dm-pre-reloc;
  594. };
  595. cpu-test2 {
  596. compatible = "sandbox,cpu_sandbox";
  597. u-boot,dm-pre-reloc;
  598. };
  599. cpu-test3 {
  600. compatible = "sandbox,cpu_sandbox";
  601. u-boot,dm-pre-reloc;
  602. };
  603. };
  604. chipid: chipid {
  605. compatible = "sandbox,soc";
  606. };
  607. i2s: i2s {
  608. compatible = "sandbox,i2s";
  609. #sound-dai-cells = <1>;
  610. sandbox,silent; /* Don't emit sounds while testing */
  611. };
  612. nop-test_0 {
  613. compatible = "sandbox,nop_sandbox1";
  614. nop-test_1 {
  615. compatible = "sandbox,nop_sandbox2";
  616. bind = "True";
  617. };
  618. nop-test_2 {
  619. compatible = "sandbox,nop_sandbox2";
  620. bind = "False";
  621. };
  622. };
  623. misc-test {
  624. compatible = "sandbox,misc_sandbox";
  625. };
  626. mmc2 {
  627. compatible = "sandbox,mmc";
  628. };
  629. mmc1 {
  630. compatible = "sandbox,mmc";
  631. };
  632. mmc0 {
  633. compatible = "sandbox,mmc";
  634. };
  635. pch {
  636. compatible = "sandbox,pch";
  637. };
  638. pci0: pci@0 {
  639. compatible = "sandbox,pci";
  640. device_type = "pci";
  641. bus-range = <0x00 0xff>;
  642. #address-cells = <3>;
  643. #size-cells = <2>;
  644. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  645. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  646. pci@0,0 {
  647. compatible = "pci-generic";
  648. reg = <0x0000 0 0 0 0>;
  649. sandbox,emul = <&swap_case_emul0_0>;
  650. };
  651. pci@1,0 {
  652. compatible = "pci-generic";
  653. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  654. reg = <0x02000814 0 0 0 0
  655. 0x01000810 0 0 0 0>;
  656. sandbox,emul = <&swap_case_emul0_1>;
  657. };
  658. p2sb-pci@2,0 {
  659. compatible = "sandbox,p2sb";
  660. reg = <0x02001010 0 0 0 0>;
  661. sandbox,emul = <&p2sb_emul>;
  662. adder {
  663. intel,p2sb-port-id = <3>;
  664. compatible = "sandbox,adder";
  665. };
  666. };
  667. pci@1e,0 {
  668. compatible = "sandbox,pmc";
  669. reg = <0xf000 0 0 0 0>;
  670. sandbox,emul = <&pmc_emul1e>;
  671. acpi-base = <0x400>;
  672. gpe0-dwx-mask = <0xf>;
  673. gpe0-dwx-shift-base = <4>;
  674. gpe0-dw = <6 7 9>;
  675. gpe0-sts = <0x20>;
  676. gpe0-en = <0x30>;
  677. };
  678. pci@1f,0 {
  679. compatible = "pci-generic";
  680. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  681. reg = <0x0100f810 0 0 0 0>;
  682. sandbox,emul = <&swap_case_emul0_1f>;
  683. };
  684. };
  685. pci-emul0 {
  686. compatible = "sandbox,pci-emul-parent";
  687. swap_case_emul0_0: emul0@0,0 {
  688. compatible = "sandbox,swap-case";
  689. };
  690. swap_case_emul0_1: emul0@1,0 {
  691. compatible = "sandbox,swap-case";
  692. use-ea;
  693. };
  694. swap_case_emul0_1f: emul0@1f,0 {
  695. compatible = "sandbox,swap-case";
  696. };
  697. p2sb_emul: emul@2,0 {
  698. compatible = "sandbox,p2sb-emul";
  699. };
  700. pmc_emul1e: emul@1e,0 {
  701. compatible = "sandbox,pmc-emul";
  702. };
  703. };
  704. pci1: pci@1 {
  705. compatible = "sandbox,pci";
  706. device_type = "pci";
  707. bus-range = <0x00 0xff>;
  708. #address-cells = <3>;
  709. #size-cells = <2>;
  710. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  711. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  712. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  713. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  714. 0x0c 0x00 0x1234 0x5678
  715. 0x10 0x00 0x1234 0x5678>;
  716. pci@10,0 {
  717. reg = <0x8000 0 0 0 0>;
  718. };
  719. };
  720. pci2: pci@2 {
  721. compatible = "sandbox,pci";
  722. device_type = "pci";
  723. bus-range = <0x00 0xff>;
  724. #address-cells = <3>;
  725. #size-cells = <2>;
  726. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  727. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  728. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  729. pci@1f,0 {
  730. compatible = "pci-generic";
  731. reg = <0xf800 0 0 0 0>;
  732. sandbox,emul = <&swap_case_emul2_1f>;
  733. };
  734. };
  735. pci-emul2 {
  736. compatible = "sandbox,pci-emul-parent";
  737. swap_case_emul2_1f: emul2@1f,0 {
  738. compatible = "sandbox,swap-case";
  739. };
  740. };
  741. pci_ep: pci_ep {
  742. compatible = "sandbox,pci_ep";
  743. };
  744. probing {
  745. compatible = "simple-bus";
  746. test1 {
  747. compatible = "denx,u-boot-probe-test";
  748. };
  749. test2 {
  750. compatible = "denx,u-boot-probe-test";
  751. };
  752. test3 {
  753. compatible = "denx,u-boot-probe-test";
  754. };
  755. test4 {
  756. compatible = "denx,u-boot-probe-test";
  757. first-syscon = <&syscon0>;
  758. second-sys-ctrl = <&another_system_controller>;
  759. third-syscon = <&syscon2>;
  760. };
  761. };
  762. pwrdom: power-domain {
  763. compatible = "sandbox,power-domain";
  764. #power-domain-cells = <1>;
  765. };
  766. power-domain-test {
  767. compatible = "sandbox,power-domain-test";
  768. power-domains = <&pwrdom 2>;
  769. };
  770. pwm: pwm {
  771. compatible = "sandbox,pwm";
  772. #pwm-cells = <2>;
  773. };
  774. pwm2 {
  775. compatible = "sandbox,pwm";
  776. #pwm-cells = <2>;
  777. };
  778. ram {
  779. compatible = "sandbox,ram";
  780. };
  781. reset@0 {
  782. compatible = "sandbox,warm-reset";
  783. };
  784. reset@1 {
  785. compatible = "sandbox,reset";
  786. };
  787. resetc: reset-ctl {
  788. compatible = "sandbox,reset-ctl";
  789. #reset-cells = <1>;
  790. };
  791. reset-ctl-test {
  792. compatible = "sandbox,reset-ctl-test";
  793. resets = <&resetc 100>, <&resetc 2>;
  794. reset-names = "other", "test";
  795. };
  796. rng {
  797. compatible = "sandbox,sandbox-rng";
  798. };
  799. rproc_1: rproc@1 {
  800. compatible = "sandbox,test-processor";
  801. remoteproc-name = "remoteproc-test-dev1";
  802. };
  803. rproc_2: rproc@2 {
  804. compatible = "sandbox,test-processor";
  805. internal-memory-mapped;
  806. remoteproc-name = "remoteproc-test-dev2";
  807. };
  808. panel {
  809. compatible = "simple-panel";
  810. backlight = <&backlight 0 100>;
  811. };
  812. smem@0 {
  813. compatible = "sandbox,smem";
  814. };
  815. sound {
  816. compatible = "sandbox,sound";
  817. cpu {
  818. sound-dai = <&i2s 0>;
  819. };
  820. codec {
  821. sound-dai = <&audio 0>;
  822. };
  823. };
  824. spi@0 {
  825. #address-cells = <1>;
  826. #size-cells = <0>;
  827. reg = <0 1>;
  828. compatible = "sandbox,spi";
  829. cs-gpios = <0>, <0>, <&gpio_a 0>;
  830. spi.bin@0 {
  831. reg = <0>;
  832. compatible = "spansion,m25p16", "jedec,spi-nor";
  833. spi-max-frequency = <40000000>;
  834. sandbox,filename = "spi.bin";
  835. };
  836. spi.bin@1 {
  837. reg = <1>;
  838. compatible = "spansion,m25p16", "jedec,spi-nor";
  839. spi-max-frequency = <50000000>;
  840. sandbox,filename = "spi.bin";
  841. spi-cpol;
  842. spi-cpha;
  843. };
  844. };
  845. syscon0: syscon@0 {
  846. compatible = "sandbox,syscon0";
  847. reg = <0x10 16>;
  848. };
  849. another_system_controller: syscon@1 {
  850. compatible = "sandbox,syscon1";
  851. reg = <0x20 5
  852. 0x28 6
  853. 0x30 7
  854. 0x38 8>;
  855. };
  856. syscon2: syscon@2 {
  857. compatible = "simple-mfd", "syscon";
  858. reg = <0x40 5
  859. 0x48 6
  860. 0x50 7
  861. 0x58 8>;
  862. };
  863. syscon3: syscon@3 {
  864. compatible = "simple-mfd", "syscon";
  865. reg = <0x000100 0x10>;
  866. muxcontroller0: a-mux-controller {
  867. compatible = "mmio-mux";
  868. #mux-control-cells = <1>;
  869. mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
  870. <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
  871. <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
  872. idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
  873. u-boot,mux-autoprobe;
  874. };
  875. };
  876. muxcontroller1: emul-mux-controller {
  877. compatible = "mux-emul";
  878. #mux-control-cells = <0>;
  879. u-boot,mux-autoprobe;
  880. idle-state = <0xabcd>;
  881. };
  882. testfdtm0 {
  883. compatible = "denx,u-boot-fdtm-test";
  884. };
  885. testfdtm1: testfdtm1 {
  886. compatible = "denx,u-boot-fdtm-test";
  887. };
  888. testfdtm2 {
  889. compatible = "denx,u-boot-fdtm-test";
  890. };
  891. timer@0 {
  892. compatible = "sandbox,timer";
  893. clock-frequency = <1000000>;
  894. };
  895. timer@1 {
  896. compatible = "sandbox,timer";
  897. sandbox,timebase-frequency-fallback;
  898. };
  899. tpm2 {
  900. compatible = "sandbox,tpm2";
  901. };
  902. uart0: serial {
  903. compatible = "sandbox,serial";
  904. u-boot,dm-pre-reloc;
  905. };
  906. usb_0: usb@0 {
  907. compatible = "sandbox,usb";
  908. status = "disabled";
  909. hub {
  910. compatible = "sandbox,usb-hub";
  911. #address-cells = <1>;
  912. #size-cells = <0>;
  913. flash-stick {
  914. reg = <0>;
  915. compatible = "sandbox,usb-flash";
  916. };
  917. };
  918. };
  919. usb_1: usb@1 {
  920. compatible = "sandbox,usb";
  921. hub {
  922. compatible = "usb-hub";
  923. usb,device-class = <9>;
  924. #address-cells = <1>;
  925. #size-cells = <0>;
  926. hub-emul {
  927. compatible = "sandbox,usb-hub";
  928. #address-cells = <1>;
  929. #size-cells = <0>;
  930. flash-stick@0 {
  931. reg = <0>;
  932. compatible = "sandbox,usb-flash";
  933. sandbox,filepath = "testflash.bin";
  934. };
  935. flash-stick@1 {
  936. reg = <1>;
  937. compatible = "sandbox,usb-flash";
  938. sandbox,filepath = "testflash1.bin";
  939. };
  940. flash-stick@2 {
  941. reg = <2>;
  942. compatible = "sandbox,usb-flash";
  943. sandbox,filepath = "testflash2.bin";
  944. };
  945. keyb@3 {
  946. reg = <3>;
  947. compatible = "sandbox,usb-keyb";
  948. };
  949. };
  950. usbstor@1 {
  951. reg = <1>;
  952. };
  953. usbstor@3 {
  954. reg = <3>;
  955. };
  956. };
  957. };
  958. usb_2: usb@2 {
  959. compatible = "sandbox,usb";
  960. status = "disabled";
  961. };
  962. spmi: spmi@0 {
  963. compatible = "sandbox,spmi";
  964. #address-cells = <0x1>;
  965. #size-cells = <0x1>;
  966. ranges;
  967. pm8916@0 {
  968. compatible = "qcom,spmi-pmic";
  969. reg = <0x0 0x1>;
  970. #address-cells = <0x1>;
  971. #size-cells = <0x1>;
  972. ranges;
  973. spmi_gpios: gpios@c000 {
  974. compatible = "qcom,pm8916-gpio";
  975. reg = <0xc000 0x400>;
  976. gpio-controller;
  977. gpio-count = <4>;
  978. #gpio-cells = <2>;
  979. gpio-bank-name="spmi";
  980. };
  981. };
  982. };
  983. wdt0: wdt@0 {
  984. compatible = "sandbox,wdt";
  985. };
  986. axi: axi@0 {
  987. compatible = "sandbox,axi";
  988. #address-cells = <0x1>;
  989. #size-cells = <0x1>;
  990. store@0 {
  991. compatible = "sandbox,sandbox_store";
  992. reg = <0x0 0x400>;
  993. };
  994. };
  995. chosen {
  996. #address-cells = <1>;
  997. #size-cells = <1>;
  998. setting = "sunrise ohoka";
  999. other-node = "/some-bus/c-test@5";
  1000. int-values = <0x1937 72993>;
  1001. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  1002. chosen-test {
  1003. compatible = "denx,u-boot-fdt-test";
  1004. reg = <9 1>;
  1005. };
  1006. };
  1007. translation-test@8000 {
  1008. compatible = "simple-bus";
  1009. reg = <0x8000 0x4000>;
  1010. #address-cells = <0x2>;
  1011. #size-cells = <0x1>;
  1012. ranges = <0 0x0 0x8000 0x1000
  1013. 1 0x100 0x9000 0x1000
  1014. 2 0x200 0xA000 0x1000
  1015. 3 0x300 0xB000 0x1000
  1016. 4 0x400 0xC000 0x1000
  1017. >;
  1018. dma-ranges = <0 0x000 0x10000000 0x1000
  1019. 1 0x100 0x20000000 0x1000
  1020. >;
  1021. dev@0,0 {
  1022. compatible = "denx,u-boot-fdt-dummy";
  1023. reg = <0 0x0 0x1000>;
  1024. reg-names = "sandbox-dummy-0";
  1025. };
  1026. dev@1,100 {
  1027. compatible = "denx,u-boot-fdt-dummy";
  1028. reg = <1 0x100 0x1000>;
  1029. };
  1030. dev@2,200 {
  1031. compatible = "denx,u-boot-fdt-dummy";
  1032. reg = <2 0x200 0x1000>;
  1033. };
  1034. noxlatebus@3,300 {
  1035. compatible = "simple-bus";
  1036. reg = <3 0x300 0x1000>;
  1037. #address-cells = <0x1>;
  1038. #size-cells = <0x0>;
  1039. dev@42 {
  1040. compatible = "denx,u-boot-fdt-dummy";
  1041. reg = <0x42>;
  1042. };
  1043. };
  1044. xlatebus@4,400 {
  1045. compatible = "sandbox,zero-size-cells-bus";
  1046. reg = <4 0x400 0x1000>;
  1047. #address-cells = <1>;
  1048. #size-cells = <1>;
  1049. ranges = <0 4 0x400 0x1000>;
  1050. devs {
  1051. #address-cells = <1>;
  1052. #size-cells = <0>;
  1053. dev@19 {
  1054. compatible = "denx,u-boot-fdt-dummy";
  1055. reg = <0x19>;
  1056. };
  1057. };
  1058. };
  1059. };
  1060. osd {
  1061. compatible = "sandbox,sandbox_osd";
  1062. };
  1063. sandbox_tee {
  1064. compatible = "sandbox,tee";
  1065. };
  1066. sandbox_virtio1 {
  1067. compatible = "sandbox,virtio1";
  1068. };
  1069. sandbox_virtio2 {
  1070. compatible = "sandbox,virtio2";
  1071. };
  1072. sandbox_scmi {
  1073. compatible = "sandbox,scmi-devices";
  1074. clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
  1075. resets = <&reset_scmi0 3>;
  1076. };
  1077. pinctrl {
  1078. compatible = "sandbox,pinctrl";
  1079. pinctrl-names = "default", "alternate";
  1080. pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
  1081. pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
  1082. pinctrl_gpios: gpios {
  1083. gpio0 {
  1084. pins = "P5";
  1085. function = "GPIO";
  1086. bias-pull-up;
  1087. input-disable;
  1088. };
  1089. gpio1 {
  1090. pins = "P6";
  1091. function = "GPIO";
  1092. output-high;
  1093. drive-open-drain;
  1094. };
  1095. gpio2 {
  1096. pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
  1097. bias-pull-down;
  1098. input-enable;
  1099. };
  1100. gpio3 {
  1101. pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
  1102. bias-disable;
  1103. };
  1104. };
  1105. pinctrl_i2c: i2c {
  1106. groups {
  1107. groups = "I2C_UART";
  1108. function = "I2C";
  1109. };
  1110. pins {
  1111. pins = "P0", "P1";
  1112. drive-open-drain;
  1113. };
  1114. };
  1115. pinctrl_i2s: i2s {
  1116. groups = "SPI_I2S";
  1117. function = "I2S";
  1118. };
  1119. pinctrl_spi: spi {
  1120. groups = "SPI_I2S";
  1121. function = "SPI";
  1122. cs {
  1123. pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
  1124. <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
  1125. };
  1126. };
  1127. };
  1128. hwspinlock@0 {
  1129. compatible = "sandbox,hwspinlock";
  1130. };
  1131. dma: dma {
  1132. compatible = "sandbox,dma";
  1133. #dma-cells = <1>;
  1134. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  1135. dma-names = "m2m", "tx0", "rx0";
  1136. };
  1137. /*
  1138. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  1139. * end of the test. If parent mdio is removed first, clean-up of the
  1140. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  1141. * active at the end of the test. That it turn doesn't allow the mdio
  1142. * class to be destroyed, triggering an error.
  1143. */
  1144. mdio-mux-test {
  1145. compatible = "sandbox,mdio-mux";
  1146. #address-cells = <1>;
  1147. #size-cells = <0>;
  1148. mdio-parent-bus = <&mdio>;
  1149. mdio-ch-test@0 {
  1150. reg = <0>;
  1151. };
  1152. mdio-ch-test@1 {
  1153. reg = <1>;
  1154. };
  1155. };
  1156. mdio: mdio-test {
  1157. compatible = "sandbox,mdio";
  1158. };
  1159. pm-bus-test {
  1160. compatible = "simple-pm-bus";
  1161. clocks = <&clk_sandbox 4>;
  1162. power-domains = <&pwrdom 1>;
  1163. };
  1164. resetc2: syscon-reset {
  1165. compatible = "syscon-reset";
  1166. #reset-cells = <1>;
  1167. regmap = <&syscon0>;
  1168. offset = <1>;
  1169. mask = <0x27FFFFFF>;
  1170. assert-high = <0>;
  1171. };
  1172. syscon-reset-test {
  1173. compatible = "sandbox,misc_sandbox";
  1174. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  1175. reset-names = "valid", "no_mask", "out_of_range";
  1176. };
  1177. sysinfo {
  1178. compatible = "sandbox,sysinfo-sandbox";
  1179. };
  1180. some_regmapped-bus {
  1181. #address-cells = <0x1>;
  1182. #size-cells = <0x1>;
  1183. ranges = <0x0 0x0 0x10>;
  1184. compatible = "simple-bus";
  1185. regmap-test_0 {
  1186. reg = <0 0x10>;
  1187. compatible = "sandbox,regmap_test";
  1188. };
  1189. };
  1190. };
  1191. #include "sandbox_pmic.dtsi"