global_data.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2002-2010
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #ifndef __ASM_GBL_DATA_H
  7. #define __ASM_GBL_DATA_H
  8. #ifndef __ASSEMBLY__
  9. #include <asm/types.h>
  10. #include <linux/types.h>
  11. /* Architecture-specific global data */
  12. struct arch_global_data {
  13. #if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
  14. u32 sdhc_clk;
  15. #endif
  16. #if defined(CONFIG_FSL_ESDHC)
  17. u32 sdhc_per_clk;
  18. #endif
  19. #if defined(CONFIG_U_QE)
  20. u32 qe_clk;
  21. u32 brg_clk;
  22. uint mp_alloc_base;
  23. uint mp_alloc_top;
  24. #endif /* CONFIG_U_QE */
  25. #ifdef CONFIG_AT91FAMILY
  26. /* "static data" needed by at91's clock.c */
  27. unsigned long cpu_clk_rate_hz;
  28. unsigned long main_clk_rate_hz;
  29. unsigned long mck_rate_hz;
  30. unsigned long plla_rate_hz;
  31. unsigned long pllb_rate_hz;
  32. unsigned long at91_pllb_usb_init;
  33. #endif
  34. /* "static data" needed by most of timer.c on ARM platforms */
  35. unsigned long timer_rate_hz;
  36. unsigned int tbu;
  37. unsigned int tbl;
  38. unsigned long lastinc;
  39. unsigned long long timer_reset_value;
  40. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  41. unsigned long tlb_addr;
  42. unsigned long tlb_size;
  43. #if defined(CONFIG_ARM64)
  44. unsigned long tlb_fillptr;
  45. unsigned long tlb_emerg;
  46. #endif
  47. #endif
  48. #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
  49. #define MEM_RESERVE_SECURE_SECURED 0x1
  50. #define MEM_RESERVE_SECURE_MAINTAINED 0x2
  51. #define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
  52. /*
  53. * Secure memory addr
  54. * This variable needs maintenance if the RAM base is not zero,
  55. * or if RAM splits into non-consecutive banks. It also has a
  56. * flag indicating the secure memory is marked as secure by MMU.
  57. * Flags used: 0x1 secured
  58. * 0x2 maintained
  59. */
  60. phys_addr_t secure_ram;
  61. unsigned long tlb_allocated;
  62. #endif
  63. #ifdef CONFIG_RESV_RAM
  64. /*
  65. * Reserved RAM for memory resident, eg. Management Complex (MC)
  66. * driver which continues to run after U-Boot exits.
  67. */
  68. phys_addr_t resv_ram;
  69. #endif
  70. #ifdef CONFIG_ARCH_OMAP2PLUS
  71. u32 omap_boot_device;
  72. u32 omap_boot_mode;
  73. u8 omap_ch_flags;
  74. #endif
  75. #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
  76. unsigned long mem2_clk;
  77. #endif
  78. #ifdef CONFIG_ARCH_IMX8
  79. struct udevice *scu_dev;
  80. #endif
  81. };
  82. #include <asm-generic/global_data.h>
  83. #if defined(__clang__) || defined(CONFIG_LTO)
  84. #define DECLARE_GLOBAL_DATA_PTR
  85. #define gd get_gd()
  86. static inline gd_t *get_gd(void)
  87. {
  88. gd_t *gd_ptr;
  89. #ifdef CONFIG_ARM64
  90. __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
  91. #else
  92. __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
  93. #endif
  94. return gd_ptr;
  95. }
  96. #else
  97. #ifdef CONFIG_ARM64
  98. #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
  99. #else
  100. #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
  101. #endif
  102. #endif
  103. static inline void set_gd(volatile gd_t *gd_ptr)
  104. {
  105. #ifdef CONFIG_ARM64
  106. __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
  107. #elif __ARM_ARCH >= 7
  108. __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
  109. #else
  110. __asm__ volatile("mov r9, %0\n" : : "r"(gd_ptr));
  111. #endif
  112. }
  113. #endif /* __ASSEMBLY__ */
  114. #endif /* __ASM_GBL_DATA_H */