fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <fdt_support.h>
  13. #include <mapmem.h>
  14. #include <linux/libfdt.h>
  15. #include <serial.h>
  16. #include <asm/sections.h>
  17. #include <linux/ctype.h>
  18. #include <linux/lzo.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. /*
  21. * Here are the type we know about. One day we might allow drivers to
  22. * register. For now we just put them here. The COMPAT macro allows us to
  23. * turn this into a sparse list later, and keeps the ID with the name.
  24. *
  25. * NOTE: This list is basically a TODO list for things that need to be
  26. * converted to driver model. So don't add new things here unless there is a
  27. * good reason why driver-model conversion is infeasible. Examples include
  28. * things which are used before driver model is available.
  29. */
  30. #define COMPAT(id, name) name
  31. static const char * const compat_names[COMPAT_COUNT] = {
  32. COMPAT(UNKNOWN, "<none>"),
  33. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  34. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  35. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  36. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  37. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  38. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  39. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  40. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  41. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  42. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  43. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  44. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  45. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  46. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  47. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  48. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  49. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  50. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  51. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  52. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  53. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  54. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  55. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  56. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  57. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  58. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  59. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  60. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  61. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  62. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  63. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  64. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  65. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  66. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  67. };
  68. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  69. {
  70. /* We allow reading of the 'unknown' ID for testing purposes */
  71. assert(id >= 0 && id < COMPAT_COUNT);
  72. return compat_names[id];
  73. }
  74. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  75. const char *prop_name, int index, int na,
  76. int ns, fdt_size_t *sizep,
  77. bool translate)
  78. {
  79. const fdt32_t *prop, *prop_end;
  80. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  81. int len;
  82. fdt_addr_t addr;
  83. debug("%s: %s: ", __func__, prop_name);
  84. prop = fdt_getprop(blob, node, prop_name, &len);
  85. if (!prop) {
  86. debug("(not found)\n");
  87. return FDT_ADDR_T_NONE;
  88. }
  89. prop_end = prop + (len / sizeof(*prop));
  90. prop_addr = prop + (index * (na + ns));
  91. prop_size = prop_addr + na;
  92. prop_after_size = prop_size + ns;
  93. if (prop_after_size > prop_end) {
  94. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  95. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  96. return FDT_ADDR_T_NONE;
  97. }
  98. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  99. if (translate)
  100. addr = fdt_translate_address(blob, node, prop_addr);
  101. else
  102. #endif
  103. addr = fdtdec_get_number(prop_addr, na);
  104. if (sizep) {
  105. *sizep = fdtdec_get_number(prop_size, ns);
  106. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  107. (unsigned long long)*sizep);
  108. } else {
  109. debug("addr=%08llx\n", (unsigned long long)addr);
  110. }
  111. return addr;
  112. }
  113. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  114. int node, const char *prop_name,
  115. int index, fdt_size_t *sizep,
  116. bool translate)
  117. {
  118. int na, ns;
  119. debug("%s: ", __func__);
  120. na = fdt_address_cells(blob, parent);
  121. if (na < 1) {
  122. debug("(bad #address-cells)\n");
  123. return FDT_ADDR_T_NONE;
  124. }
  125. ns = fdt_size_cells(blob, parent);
  126. if (ns < 0) {
  127. debug("(bad #size-cells)\n");
  128. return FDT_ADDR_T_NONE;
  129. }
  130. debug("na=%d, ns=%d, ", na, ns);
  131. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  132. ns, sizep, translate);
  133. }
  134. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  135. const char *prop_name, int index,
  136. fdt_size_t *sizep,
  137. bool translate)
  138. {
  139. int parent;
  140. debug("%s: ", __func__);
  141. parent = fdt_parent_offset(blob, node);
  142. if (parent < 0) {
  143. debug("(no parent found)\n");
  144. return FDT_ADDR_T_NONE;
  145. }
  146. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  147. index, sizep, translate);
  148. }
  149. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  150. const char *prop_name, fdt_size_t *sizep)
  151. {
  152. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  153. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  154. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  155. ns, sizep, false);
  156. }
  157. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  158. {
  159. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  160. }
  161. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  162. int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
  163. const char *prop_name, struct fdt_pci_addr *addr)
  164. {
  165. const u32 *cell;
  166. int len;
  167. int ret = -ENOENT;
  168. debug("%s: %s: ", __func__, prop_name);
  169. /*
  170. * If we follow the pci bus bindings strictly, we should check
  171. * the value of the node's parent node's #address-cells and
  172. * #size-cells. They need to be 3 and 2 accordingly. However,
  173. * for simplicity we skip the check here.
  174. */
  175. cell = fdt_getprop(blob, node, prop_name, &len);
  176. if (!cell)
  177. goto fail;
  178. if ((len % FDT_PCI_REG_SIZE) == 0) {
  179. int num = len / FDT_PCI_REG_SIZE;
  180. int i;
  181. for (i = 0; i < num; i++) {
  182. debug("pci address #%d: %08lx %08lx %08lx\n", i,
  183. (ulong)fdt32_to_cpu(cell[0]),
  184. (ulong)fdt32_to_cpu(cell[1]),
  185. (ulong)fdt32_to_cpu(cell[2]));
  186. if ((fdt32_to_cpu(*cell) & type) == type) {
  187. addr->phys_hi = fdt32_to_cpu(cell[0]);
  188. addr->phys_mid = fdt32_to_cpu(cell[1]);
  189. addr->phys_lo = fdt32_to_cpu(cell[1]);
  190. break;
  191. }
  192. cell += (FDT_PCI_ADDR_CELLS +
  193. FDT_PCI_SIZE_CELLS);
  194. }
  195. if (i == num) {
  196. ret = -ENXIO;
  197. goto fail;
  198. }
  199. return 0;
  200. }
  201. ret = -EINVAL;
  202. fail:
  203. debug("(not found)\n");
  204. return ret;
  205. }
  206. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  207. {
  208. const char *list, *end;
  209. int len;
  210. list = fdt_getprop(blob, node, "compatible", &len);
  211. if (!list)
  212. return -ENOENT;
  213. end = list + len;
  214. while (list < end) {
  215. len = strlen(list);
  216. if (len >= strlen("pciVVVV,DDDD")) {
  217. char *s = strstr(list, "pci");
  218. /*
  219. * check if the string is something like pciVVVV,DDDD.RR
  220. * or just pciVVVV,DDDD
  221. */
  222. if (s && s[7] == ',' &&
  223. (s[12] == '.' || s[12] == 0)) {
  224. s += 3;
  225. *vendor = simple_strtol(s, NULL, 16);
  226. s += 5;
  227. *device = simple_strtol(s, NULL, 16);
  228. return 0;
  229. }
  230. }
  231. list += (len + 1);
  232. }
  233. return -ENOENT;
  234. }
  235. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  236. u32 *bar)
  237. {
  238. int barnum;
  239. /* extract the bar number from fdt_pci_addr */
  240. barnum = addr->phys_hi & 0xff;
  241. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  242. return -EINVAL;
  243. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  244. *bar = dm_pci_read_bar32(dev, barnum);
  245. return 0;
  246. }
  247. #endif
  248. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  249. uint64_t default_val)
  250. {
  251. const uint64_t *cell64;
  252. int length;
  253. cell64 = fdt_getprop(blob, node, prop_name, &length);
  254. if (!cell64 || length < sizeof(*cell64))
  255. return default_val;
  256. return fdt64_to_cpu(*cell64);
  257. }
  258. int fdtdec_get_is_enabled(const void *blob, int node)
  259. {
  260. const char *cell;
  261. /*
  262. * It should say "okay", so only allow that. Some fdts use "ok" but
  263. * this is a bug. Please fix your device tree source file. See here
  264. * for discussion:
  265. *
  266. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  267. */
  268. cell = fdt_getprop(blob, node, "status", NULL);
  269. if (cell)
  270. return strcmp(cell, "okay") == 0;
  271. return 1;
  272. }
  273. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  274. {
  275. enum fdt_compat_id id;
  276. /* Search our drivers */
  277. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  278. if (fdt_node_check_compatible(blob, node,
  279. compat_names[id]) == 0)
  280. return id;
  281. return COMPAT_UNKNOWN;
  282. }
  283. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  284. {
  285. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  286. }
  287. int fdtdec_next_compatible_subnode(const void *blob, int node,
  288. enum fdt_compat_id id, int *depthp)
  289. {
  290. do {
  291. node = fdt_next_node(blob, node, depthp);
  292. } while (*depthp > 1);
  293. /* If this is a direct subnode, and compatible, return it */
  294. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  295. blob, node, compat_names[id]))
  296. return node;
  297. return -FDT_ERR_NOTFOUND;
  298. }
  299. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  300. int *upto)
  301. {
  302. #define MAX_STR_LEN 20
  303. char str[MAX_STR_LEN + 20];
  304. int node, err;
  305. /* snprintf() is not available */
  306. assert(strlen(name) < MAX_STR_LEN);
  307. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  308. node = fdt_path_offset(blob, str);
  309. if (node < 0)
  310. return node;
  311. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  312. if (err < 0)
  313. return err;
  314. if (err)
  315. return -FDT_ERR_NOTFOUND;
  316. (*upto)++;
  317. return node;
  318. }
  319. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  320. enum fdt_compat_id id, int *node_list,
  321. int maxcount)
  322. {
  323. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  324. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  325. }
  326. /* TODO: Can we tighten this code up a little? */
  327. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  328. enum fdt_compat_id id, int *node_list,
  329. int maxcount)
  330. {
  331. int name_len = strlen(name);
  332. int nodes[maxcount];
  333. int num_found = 0;
  334. int offset, node;
  335. int alias_node;
  336. int count;
  337. int i, j;
  338. /* find the alias node if present */
  339. alias_node = fdt_path_offset(blob, "/aliases");
  340. /*
  341. * start with nothing, and we can assume that the root node can't
  342. * match
  343. */
  344. memset(nodes, '\0', sizeof(nodes));
  345. /* First find all the compatible nodes */
  346. for (node = count = 0; node >= 0 && count < maxcount;) {
  347. node = fdtdec_next_compatible(blob, node, id);
  348. if (node >= 0)
  349. nodes[count++] = node;
  350. }
  351. if (node >= 0)
  352. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  353. __func__, name);
  354. /* Now find all the aliases */
  355. for (offset = fdt_first_property_offset(blob, alias_node);
  356. offset > 0;
  357. offset = fdt_next_property_offset(blob, offset)) {
  358. const struct fdt_property *prop;
  359. const char *path;
  360. int number;
  361. int found;
  362. node = 0;
  363. prop = fdt_get_property_by_offset(blob, offset, NULL);
  364. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  365. if (prop->len && 0 == strncmp(path, name, name_len))
  366. node = fdt_path_offset(blob, prop->data);
  367. if (node <= 0)
  368. continue;
  369. /* Get the alias number */
  370. number = simple_strtoul(path + name_len, NULL, 10);
  371. if (number < 0 || number >= maxcount) {
  372. debug("%s: warning: alias '%s' is out of range\n",
  373. __func__, path);
  374. continue;
  375. }
  376. /* Make sure the node we found is actually in our list! */
  377. found = -1;
  378. for (j = 0; j < count; j++)
  379. if (nodes[j] == node) {
  380. found = j;
  381. break;
  382. }
  383. if (found == -1) {
  384. debug("%s: warning: alias '%s' points to a node "
  385. "'%s' that is missing or is not compatible "
  386. " with '%s'\n", __func__, path,
  387. fdt_get_name(blob, node, NULL),
  388. compat_names[id]);
  389. continue;
  390. }
  391. /*
  392. * Add this node to our list in the right place, and mark
  393. * it as done.
  394. */
  395. if (fdtdec_get_is_enabled(blob, node)) {
  396. if (node_list[number]) {
  397. debug("%s: warning: alias '%s' requires that "
  398. "a node be placed in the list in a "
  399. "position which is already filled by "
  400. "node '%s'\n", __func__, path,
  401. fdt_get_name(blob, node, NULL));
  402. continue;
  403. }
  404. node_list[number] = node;
  405. if (number >= num_found)
  406. num_found = number + 1;
  407. }
  408. nodes[found] = 0;
  409. }
  410. /* Add any nodes not mentioned by an alias */
  411. for (i = j = 0; i < maxcount; i++) {
  412. if (!node_list[i]) {
  413. for (; j < maxcount; j++)
  414. if (nodes[j] &&
  415. fdtdec_get_is_enabled(blob, nodes[j]))
  416. break;
  417. /* Have we run out of nodes to add? */
  418. if (j == maxcount)
  419. break;
  420. assert(!node_list[i]);
  421. node_list[i] = nodes[j++];
  422. if (i >= num_found)
  423. num_found = i + 1;
  424. }
  425. }
  426. return num_found;
  427. }
  428. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  429. int *seqp)
  430. {
  431. int base_len = strlen(base);
  432. const char *find_name;
  433. int find_namelen;
  434. int prop_offset;
  435. int aliases;
  436. find_name = fdt_get_name(blob, offset, &find_namelen);
  437. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  438. aliases = fdt_path_offset(blob, "/aliases");
  439. for (prop_offset = fdt_first_property_offset(blob, aliases);
  440. prop_offset > 0;
  441. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  442. const char *prop;
  443. const char *name;
  444. const char *slash;
  445. int len, val;
  446. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  447. debug(" - %s, %s\n", name, prop);
  448. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  449. strncmp(name, base, base_len))
  450. continue;
  451. slash = strrchr(prop, '/');
  452. if (strcmp(slash + 1, find_name))
  453. continue;
  454. val = trailing_strtol(name);
  455. if (val != -1) {
  456. *seqp = val;
  457. debug("Found seq %d\n", *seqp);
  458. return 0;
  459. }
  460. }
  461. debug("Not found\n");
  462. return -ENOENT;
  463. }
  464. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  465. {
  466. int base_len = strlen(base);
  467. int prop_offset;
  468. int aliases;
  469. int max = -1;
  470. debug("Looking for highest alias id for '%s'\n", base);
  471. aliases = fdt_path_offset(blob, "/aliases");
  472. for (prop_offset = fdt_first_property_offset(blob, aliases);
  473. prop_offset > 0;
  474. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  475. const char *prop;
  476. const char *name;
  477. int len, val;
  478. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  479. debug(" - %s, %s\n", name, prop);
  480. if (*prop != '/' || prop[len - 1] ||
  481. strncmp(name, base, base_len))
  482. continue;
  483. val = trailing_strtol(name);
  484. if (val > max) {
  485. debug("Found seq %d\n", val);
  486. max = val;
  487. }
  488. }
  489. return max;
  490. }
  491. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  492. {
  493. int chosen_node;
  494. if (!blob)
  495. return NULL;
  496. chosen_node = fdt_path_offset(blob, "/chosen");
  497. return fdt_getprop(blob, chosen_node, name, NULL);
  498. }
  499. int fdtdec_get_chosen_node(const void *blob, const char *name)
  500. {
  501. const char *prop;
  502. prop = fdtdec_get_chosen_prop(blob, name);
  503. if (!prop)
  504. return -FDT_ERR_NOTFOUND;
  505. return fdt_path_offset(blob, prop);
  506. }
  507. int fdtdec_check_fdt(void)
  508. {
  509. /*
  510. * We must have an FDT, but we cannot panic() yet since the console
  511. * is not ready. So for now, just assert(). Boards which need an early
  512. * FDT (prior to console ready) will need to make their own
  513. * arrangements and do their own checks.
  514. */
  515. assert(!fdtdec_prepare_fdt());
  516. return 0;
  517. }
  518. /*
  519. * This function is a little odd in that it accesses global data. At some
  520. * point if the architecture board.c files merge this will make more sense.
  521. * Even now, it is common code.
  522. */
  523. int fdtdec_prepare_fdt(void)
  524. {
  525. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  526. fdt_check_header(gd->fdt_blob)) {
  527. #ifdef CONFIG_SPL_BUILD
  528. puts("Missing DTB\n");
  529. #else
  530. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  531. # ifdef DEBUG
  532. if (gd->fdt_blob) {
  533. printf("fdt_blob=%p\n", gd->fdt_blob);
  534. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  535. 32, 0);
  536. }
  537. # endif
  538. #endif
  539. return -1;
  540. }
  541. return 0;
  542. }
  543. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  544. {
  545. const u32 *phandle;
  546. int lookup;
  547. debug("%s: %s\n", __func__, prop_name);
  548. phandle = fdt_getprop(blob, node, prop_name, NULL);
  549. if (!phandle)
  550. return -FDT_ERR_NOTFOUND;
  551. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  552. return lookup;
  553. }
  554. /**
  555. * Look up a property in a node and check that it has a minimum length.
  556. *
  557. * @param blob FDT blob
  558. * @param node node to examine
  559. * @param prop_name name of property to find
  560. * @param min_len minimum property length in bytes
  561. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  562. found, or -FDT_ERR_BADLAYOUT if not enough data
  563. * @return pointer to cell, which is only valid if err == 0
  564. */
  565. static const void *get_prop_check_min_len(const void *blob, int node,
  566. const char *prop_name, int min_len,
  567. int *err)
  568. {
  569. const void *cell;
  570. int len;
  571. debug("%s: %s\n", __func__, prop_name);
  572. cell = fdt_getprop(blob, node, prop_name, &len);
  573. if (!cell)
  574. *err = -FDT_ERR_NOTFOUND;
  575. else if (len < min_len)
  576. *err = -FDT_ERR_BADLAYOUT;
  577. else
  578. *err = 0;
  579. return cell;
  580. }
  581. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  582. u32 *array, int count)
  583. {
  584. const u32 *cell;
  585. int err = 0;
  586. debug("%s: %s\n", __func__, prop_name);
  587. cell = get_prop_check_min_len(blob, node, prop_name,
  588. sizeof(u32) * count, &err);
  589. if (!err) {
  590. int i;
  591. for (i = 0; i < count; i++)
  592. array[i] = fdt32_to_cpu(cell[i]);
  593. }
  594. return err;
  595. }
  596. int fdtdec_get_int_array_count(const void *blob, int node,
  597. const char *prop_name, u32 *array, int count)
  598. {
  599. const u32 *cell;
  600. int len, elems;
  601. int i;
  602. debug("%s: %s\n", __func__, prop_name);
  603. cell = fdt_getprop(blob, node, prop_name, &len);
  604. if (!cell)
  605. return -FDT_ERR_NOTFOUND;
  606. elems = len / sizeof(u32);
  607. if (count > elems)
  608. count = elems;
  609. for (i = 0; i < count; i++)
  610. array[i] = fdt32_to_cpu(cell[i]);
  611. return count;
  612. }
  613. const u32 *fdtdec_locate_array(const void *blob, int node,
  614. const char *prop_name, int count)
  615. {
  616. const u32 *cell;
  617. int err;
  618. cell = get_prop_check_min_len(blob, node, prop_name,
  619. sizeof(u32) * count, &err);
  620. return err ? NULL : cell;
  621. }
  622. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  623. {
  624. const s32 *cell;
  625. int len;
  626. debug("%s: %s\n", __func__, prop_name);
  627. cell = fdt_getprop(blob, node, prop_name, &len);
  628. return cell != NULL;
  629. }
  630. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  631. const char *list_name,
  632. const char *cells_name,
  633. int cell_count, int index,
  634. struct fdtdec_phandle_args *out_args)
  635. {
  636. const __be32 *list, *list_end;
  637. int rc = 0, size, cur_index = 0;
  638. uint32_t count = 0;
  639. int node = -1;
  640. int phandle;
  641. /* Retrieve the phandle list property */
  642. list = fdt_getprop(blob, src_node, list_name, &size);
  643. if (!list)
  644. return -ENOENT;
  645. list_end = list + size / sizeof(*list);
  646. /* Loop over the phandles until all the requested entry is found */
  647. while (list < list_end) {
  648. rc = -EINVAL;
  649. count = 0;
  650. /*
  651. * If phandle is 0, then it is an empty entry with no
  652. * arguments. Skip forward to the next entry.
  653. */
  654. phandle = be32_to_cpup(list++);
  655. if (phandle) {
  656. /*
  657. * Find the provider node and parse the #*-cells
  658. * property to determine the argument length.
  659. *
  660. * This is not needed if the cell count is hard-coded
  661. * (i.e. cells_name not set, but cell_count is set),
  662. * except when we're going to return the found node
  663. * below.
  664. */
  665. if (cells_name || cur_index == index) {
  666. node = fdt_node_offset_by_phandle(blob,
  667. phandle);
  668. if (!node) {
  669. debug("%s: could not find phandle\n",
  670. fdt_get_name(blob, src_node,
  671. NULL));
  672. goto err;
  673. }
  674. }
  675. if (cells_name) {
  676. count = fdtdec_get_int(blob, node, cells_name,
  677. -1);
  678. if (count == -1) {
  679. debug("%s: could not get %s for %s\n",
  680. fdt_get_name(blob, src_node,
  681. NULL),
  682. cells_name,
  683. fdt_get_name(blob, node,
  684. NULL));
  685. goto err;
  686. }
  687. } else {
  688. count = cell_count;
  689. }
  690. /*
  691. * Make sure that the arguments actually fit in the
  692. * remaining property data length
  693. */
  694. if (list + count > list_end) {
  695. debug("%s: arguments longer than property\n",
  696. fdt_get_name(blob, src_node, NULL));
  697. goto err;
  698. }
  699. }
  700. /*
  701. * All of the error cases above bail out of the loop, so at
  702. * this point, the parsing is successful. If the requested
  703. * index matches, then fill the out_args structure and return,
  704. * or return -ENOENT for an empty entry.
  705. */
  706. rc = -ENOENT;
  707. if (cur_index == index) {
  708. if (!phandle)
  709. goto err;
  710. if (out_args) {
  711. int i;
  712. if (count > MAX_PHANDLE_ARGS) {
  713. debug("%s: too many arguments %d\n",
  714. fdt_get_name(blob, src_node,
  715. NULL), count);
  716. count = MAX_PHANDLE_ARGS;
  717. }
  718. out_args->node = node;
  719. out_args->args_count = count;
  720. for (i = 0; i < count; i++) {
  721. out_args->args[i] =
  722. be32_to_cpup(list++);
  723. }
  724. }
  725. /* Found it! return success */
  726. return 0;
  727. }
  728. node = -1;
  729. list += count;
  730. cur_index++;
  731. }
  732. /*
  733. * Result will be one of:
  734. * -ENOENT : index is for empty phandle
  735. * -EINVAL : parsing error on data
  736. * [1..n] : Number of phandle (count mode; when index = -1)
  737. */
  738. rc = index < 0 ? cur_index : -ENOENT;
  739. err:
  740. return rc;
  741. }
  742. int fdtdec_get_child_count(const void *blob, int node)
  743. {
  744. int subnode;
  745. int num = 0;
  746. fdt_for_each_subnode(subnode, blob, node)
  747. num++;
  748. return num;
  749. }
  750. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  751. u8 *array, int count)
  752. {
  753. const u8 *cell;
  754. int err;
  755. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  756. if (!err)
  757. memcpy(array, cell, count);
  758. return err;
  759. }
  760. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  761. const char *prop_name, int count)
  762. {
  763. const u8 *cell;
  764. int err;
  765. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  766. if (err)
  767. return NULL;
  768. return cell;
  769. }
  770. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  771. int default_val)
  772. {
  773. int config_node;
  774. debug("%s: %s\n", __func__, prop_name);
  775. config_node = fdt_path_offset(blob, "/config");
  776. if (config_node < 0)
  777. return default_val;
  778. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  779. }
  780. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  781. {
  782. int config_node;
  783. const void *prop;
  784. debug("%s: %s\n", __func__, prop_name);
  785. config_node = fdt_path_offset(blob, "/config");
  786. if (config_node < 0)
  787. return 0;
  788. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  789. return prop != NULL;
  790. }
  791. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  792. {
  793. const char *nodep;
  794. int nodeoffset;
  795. int len;
  796. debug("%s: %s\n", __func__, prop_name);
  797. nodeoffset = fdt_path_offset(blob, "/config");
  798. if (nodeoffset < 0)
  799. return NULL;
  800. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  801. if (!nodep)
  802. return NULL;
  803. return (char *)nodep;
  804. }
  805. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  806. {
  807. u64 number = 0;
  808. while (cells--)
  809. number = (number << 32) | fdt32_to_cpu(*ptr++);
  810. return number;
  811. }
  812. int fdt_get_resource(const void *fdt, int node, const char *property,
  813. unsigned int index, struct fdt_resource *res)
  814. {
  815. const fdt32_t *ptr, *end;
  816. int na, ns, len, parent;
  817. unsigned int i = 0;
  818. parent = fdt_parent_offset(fdt, node);
  819. if (parent < 0)
  820. return parent;
  821. na = fdt_address_cells(fdt, parent);
  822. ns = fdt_size_cells(fdt, parent);
  823. ptr = fdt_getprop(fdt, node, property, &len);
  824. if (!ptr)
  825. return len;
  826. end = ptr + len / sizeof(*ptr);
  827. while (ptr + na + ns <= end) {
  828. if (i == index) {
  829. res->start = fdtdec_get_number(ptr, na);
  830. res->end = res->start;
  831. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  832. return 0;
  833. }
  834. ptr += na + ns;
  835. i++;
  836. }
  837. return -FDT_ERR_NOTFOUND;
  838. }
  839. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  840. const char *prop_names, const char *name,
  841. struct fdt_resource *res)
  842. {
  843. int index;
  844. index = fdt_stringlist_search(fdt, node, prop_names, name);
  845. if (index < 0)
  846. return index;
  847. return fdt_get_resource(fdt, node, property, index, res);
  848. }
  849. static int decode_timing_property(const void *blob, int node, const char *name,
  850. struct timing_entry *result)
  851. {
  852. int length, ret = 0;
  853. const u32 *prop;
  854. prop = fdt_getprop(blob, node, name, &length);
  855. if (!prop) {
  856. debug("%s: could not find property %s\n",
  857. fdt_get_name(blob, node, NULL), name);
  858. return length;
  859. }
  860. if (length == sizeof(u32)) {
  861. result->typ = fdtdec_get_int(blob, node, name, 0);
  862. result->min = result->typ;
  863. result->max = result->typ;
  864. } else {
  865. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  866. }
  867. return ret;
  868. }
  869. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  870. struct display_timing *dt)
  871. {
  872. int i, node, timings_node;
  873. u32 val = 0;
  874. int ret = 0;
  875. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  876. if (timings_node < 0)
  877. return timings_node;
  878. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  879. node > 0 && i != index;
  880. node = fdt_next_subnode(blob, node))
  881. i++;
  882. if (node < 0)
  883. return node;
  884. memset(dt, 0, sizeof(*dt));
  885. ret |= decode_timing_property(blob, node, "hback-porch",
  886. &dt->hback_porch);
  887. ret |= decode_timing_property(blob, node, "hfront-porch",
  888. &dt->hfront_porch);
  889. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  890. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  891. ret |= decode_timing_property(blob, node, "vback-porch",
  892. &dt->vback_porch);
  893. ret |= decode_timing_property(blob, node, "vfront-porch",
  894. &dt->vfront_porch);
  895. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  896. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  897. ret |= decode_timing_property(blob, node, "clock-frequency",
  898. &dt->pixelclock);
  899. dt->flags = 0;
  900. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  901. if (val != -1) {
  902. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  903. DISPLAY_FLAGS_VSYNC_LOW;
  904. }
  905. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  906. if (val != -1) {
  907. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  908. DISPLAY_FLAGS_HSYNC_LOW;
  909. }
  910. val = fdtdec_get_int(blob, node, "de-active", -1);
  911. if (val != -1) {
  912. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  913. DISPLAY_FLAGS_DE_LOW;
  914. }
  915. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  916. if (val != -1) {
  917. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  918. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  919. }
  920. if (fdtdec_get_bool(blob, node, "interlaced"))
  921. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  922. if (fdtdec_get_bool(blob, node, "doublescan"))
  923. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  924. if (fdtdec_get_bool(blob, node, "doubleclk"))
  925. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  926. return ret;
  927. }
  928. int fdtdec_setup_mem_size_base_fdt(const void *blob)
  929. {
  930. int ret, mem;
  931. struct fdt_resource res;
  932. mem = fdt_path_offset(blob, "/memory");
  933. if (mem < 0) {
  934. debug("%s: Missing /memory node\n", __func__);
  935. return -EINVAL;
  936. }
  937. ret = fdt_get_resource(blob, mem, "reg", 0, &res);
  938. if (ret != 0) {
  939. debug("%s: Unable to decode first memory bank\n", __func__);
  940. return -EINVAL;
  941. }
  942. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  943. gd->ram_base = (unsigned long)res.start;
  944. debug("%s: Initial DRAM size %llx\n", __func__,
  945. (unsigned long long)gd->ram_size);
  946. return 0;
  947. }
  948. int fdtdec_setup_mem_size_base(void)
  949. {
  950. return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
  951. }
  952. #if defined(CONFIG_NR_DRAM_BANKS)
  953. static int get_next_memory_node(const void *blob, int mem)
  954. {
  955. do {
  956. mem = fdt_node_offset_by_prop_value(blob, mem,
  957. "device_type", "memory", 7);
  958. } while (!fdtdec_get_is_enabled(blob, mem));
  959. return mem;
  960. }
  961. int fdtdec_setup_memory_banksize_fdt(const void *blob)
  962. {
  963. int bank, ret, mem, reg = 0;
  964. struct fdt_resource res;
  965. mem = get_next_memory_node(blob, -1);
  966. if (mem < 0) {
  967. debug("%s: Missing /memory node\n", __func__);
  968. return -EINVAL;
  969. }
  970. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  971. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  972. if (ret == -FDT_ERR_NOTFOUND) {
  973. reg = 0;
  974. mem = get_next_memory_node(blob, mem);
  975. if (mem == -FDT_ERR_NOTFOUND)
  976. break;
  977. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  978. if (ret == -FDT_ERR_NOTFOUND)
  979. break;
  980. }
  981. if (ret != 0) {
  982. return -EINVAL;
  983. }
  984. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  985. gd->bd->bi_dram[bank].size =
  986. (phys_size_t)(res.end - res.start + 1);
  987. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  988. __func__, bank,
  989. (unsigned long long)gd->bd->bi_dram[bank].start,
  990. (unsigned long long)gd->bd->bi_dram[bank].size);
  991. }
  992. return 0;
  993. }
  994. int fdtdec_setup_memory_banksize(void)
  995. {
  996. return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
  997. }
  998. #endif
  999. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1000. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1001. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1002. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1003. {
  1004. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1005. bool gzip = 0, lzo = 0;
  1006. ulong sz_in = sz_src;
  1007. void *dst;
  1008. int rc;
  1009. if (CONFIG_IS_ENABLED(GZIP))
  1010. if (gzip_parse_header(src, sz_in) >= 0)
  1011. gzip = 1;
  1012. if (CONFIG_IS_ENABLED(LZO))
  1013. if (!gzip && lzop_is_valid_header(src))
  1014. lzo = 1;
  1015. if (!gzip && !lzo)
  1016. return -EBADMSG;
  1017. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1018. dst = malloc(sz_out);
  1019. if (!dst) {
  1020. puts("uncompress_blob: Unable to allocate memory\n");
  1021. return -ENOMEM;
  1022. }
  1023. } else {
  1024. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1025. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1026. # else
  1027. return -ENOTSUPP;
  1028. # endif
  1029. }
  1030. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1031. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1032. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1033. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1034. else
  1035. hang();
  1036. if (rc < 0) {
  1037. /* not a valid compressed blob */
  1038. puts("uncompress_blob: Unable to uncompress\n");
  1039. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1040. free(dst);
  1041. return -EBADMSG;
  1042. }
  1043. *dstp = dst;
  1044. return 0;
  1045. }
  1046. # else
  1047. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1048. {
  1049. *dstp = (void *)src;
  1050. return 0;
  1051. }
  1052. # endif
  1053. #endif
  1054. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1055. /*
  1056. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1057. * provide and/or fixup the fdt.
  1058. */
  1059. __weak void *board_fdt_blob_setup(void)
  1060. {
  1061. void *fdt_blob = NULL;
  1062. #ifdef CONFIG_SPL_BUILD
  1063. /* FDT is at end of BSS unless it is in a different memory region */
  1064. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1065. fdt_blob = (ulong *)&_image_binary_end;
  1066. else
  1067. fdt_blob = (ulong *)&__bss_end;
  1068. #else
  1069. /* FDT is at end of image */
  1070. fdt_blob = (ulong *)&_end;
  1071. #endif
  1072. return fdt_blob;
  1073. }
  1074. #endif
  1075. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1076. {
  1077. const char *path;
  1078. int offset, err;
  1079. if (!is_valid_ethaddr(mac))
  1080. return -EINVAL;
  1081. path = fdt_get_alias(fdt, "ethernet");
  1082. if (!path)
  1083. return 0;
  1084. debug("ethernet alias found: %s\n", path);
  1085. offset = fdt_path_offset(fdt, path);
  1086. if (offset < 0) {
  1087. debug("ethernet alias points to absent node %s\n", path);
  1088. return -ENOENT;
  1089. }
  1090. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1091. if (err < 0)
  1092. return err;
  1093. debug("MAC address: %pM\n", mac);
  1094. return 0;
  1095. }
  1096. static int fdtdec_init_reserved_memory(void *blob)
  1097. {
  1098. int na, ns, node, err;
  1099. fdt32_t value;
  1100. /* inherit #address-cells and #size-cells from the root node */
  1101. na = fdt_address_cells(blob, 0);
  1102. ns = fdt_size_cells(blob, 0);
  1103. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1104. if (node < 0)
  1105. return node;
  1106. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1107. if (err < 0)
  1108. return err;
  1109. value = cpu_to_fdt32(ns);
  1110. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1111. if (err < 0)
  1112. return err;
  1113. value = cpu_to_fdt32(na);
  1114. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1115. if (err < 0)
  1116. return err;
  1117. return node;
  1118. }
  1119. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1120. const struct fdt_memory *carveout,
  1121. uint32_t *phandlep)
  1122. {
  1123. fdt32_t cells[4] = {}, *ptr = cells;
  1124. uint32_t upper, lower, phandle;
  1125. int parent, node, na, ns, err;
  1126. fdt_size_t size;
  1127. char name[64];
  1128. /* create an empty /reserved-memory node if one doesn't exist */
  1129. parent = fdt_path_offset(blob, "/reserved-memory");
  1130. if (parent < 0) {
  1131. parent = fdtdec_init_reserved_memory(blob);
  1132. if (parent < 0)
  1133. return parent;
  1134. }
  1135. /* only 1 or 2 #address-cells and #size-cells are supported */
  1136. na = fdt_address_cells(blob, parent);
  1137. if (na < 1 || na > 2)
  1138. return -FDT_ERR_BADNCELLS;
  1139. ns = fdt_size_cells(blob, parent);
  1140. if (ns < 1 || ns > 2)
  1141. return -FDT_ERR_BADNCELLS;
  1142. /* find a matching node and return the phandle to that */
  1143. fdt_for_each_subnode(node, blob, parent) {
  1144. const char *name = fdt_get_name(blob, node, NULL);
  1145. phys_addr_t addr, size;
  1146. addr = fdtdec_get_addr_size(blob, node, "reg", &size);
  1147. if (addr == FDT_ADDR_T_NONE) {
  1148. debug("failed to read address/size for %s\n", name);
  1149. continue;
  1150. }
  1151. if (addr == carveout->start && (addr + size) == carveout->end) {
  1152. *phandlep = fdt_get_phandle(blob, node);
  1153. return 0;
  1154. }
  1155. }
  1156. /*
  1157. * Unpack the start address and generate the name of the new node
  1158. * base on the basename and the unit-address.
  1159. */
  1160. upper = upper_32_bits(carveout->start);
  1161. lower = lower_32_bits(carveout->start);
  1162. if (na > 1 && upper > 0)
  1163. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1164. lower);
  1165. else {
  1166. if (upper > 0) {
  1167. debug("address %08x:%08x exceeds addressable space\n",
  1168. upper, lower);
  1169. return -FDT_ERR_BADVALUE;
  1170. }
  1171. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1172. }
  1173. node = fdt_add_subnode(blob, parent, name);
  1174. if (node < 0)
  1175. return node;
  1176. err = fdt_generate_phandle(blob, &phandle);
  1177. if (err < 0)
  1178. return err;
  1179. err = fdtdec_set_phandle(blob, node, phandle);
  1180. if (err < 0)
  1181. return err;
  1182. /* store one or two address cells */
  1183. if (na > 1)
  1184. *ptr++ = cpu_to_fdt32(upper);
  1185. *ptr++ = cpu_to_fdt32(lower);
  1186. /* store one or two size cells */
  1187. size = carveout->end - carveout->start + 1;
  1188. upper = upper_32_bits(size);
  1189. lower = lower_32_bits(size);
  1190. if (ns > 1)
  1191. *ptr++ = cpu_to_fdt32(upper);
  1192. *ptr++ = cpu_to_fdt32(lower);
  1193. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1194. if (err < 0)
  1195. return err;
  1196. /* return the phandle for the new node for the caller to use */
  1197. if (phandlep)
  1198. *phandlep = phandle;
  1199. return 0;
  1200. }
  1201. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1202. unsigned int index, struct fdt_memory *carveout)
  1203. {
  1204. const fdt32_t *prop;
  1205. uint32_t phandle;
  1206. int offset, len;
  1207. fdt_size_t size;
  1208. offset = fdt_path_offset(blob, node);
  1209. if (offset < 0)
  1210. return offset;
  1211. prop = fdt_getprop(blob, offset, name, &len);
  1212. if (!prop) {
  1213. debug("failed to get %s for %s\n", name, node);
  1214. return -FDT_ERR_NOTFOUND;
  1215. }
  1216. if ((len % sizeof(phandle)) != 0) {
  1217. debug("invalid phandle property\n");
  1218. return -FDT_ERR_BADPHANDLE;
  1219. }
  1220. if (len < (sizeof(phandle) * (index + 1))) {
  1221. debug("invalid phandle index\n");
  1222. return -FDT_ERR_BADPHANDLE;
  1223. }
  1224. phandle = fdt32_to_cpu(prop[index]);
  1225. offset = fdt_node_offset_by_phandle(blob, phandle);
  1226. if (offset < 0) {
  1227. debug("failed to find node for phandle %u\n", phandle);
  1228. return offset;
  1229. }
  1230. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1231. "reg", 0, &size,
  1232. true);
  1233. if (carveout->start == FDT_ADDR_T_NONE) {
  1234. debug("failed to read address/size from \"reg\" property\n");
  1235. return -FDT_ERR_NOTFOUND;
  1236. }
  1237. carveout->end = carveout->start + size - 1;
  1238. return 0;
  1239. }
  1240. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1241. unsigned int index, const char *name,
  1242. const struct fdt_memory *carveout)
  1243. {
  1244. uint32_t phandle;
  1245. int err, offset;
  1246. fdt32_t value;
  1247. /* XXX implement support for multiple phandles */
  1248. if (index > 0) {
  1249. debug("invalid index %u\n", index);
  1250. return -FDT_ERR_BADOFFSET;
  1251. }
  1252. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
  1253. if (err < 0) {
  1254. debug("failed to add reserved memory: %d\n", err);
  1255. return err;
  1256. }
  1257. offset = fdt_path_offset(blob, node);
  1258. if (offset < 0) {
  1259. debug("failed to find offset for node %s: %d\n", node, offset);
  1260. return offset;
  1261. }
  1262. value = cpu_to_fdt32(phandle);
  1263. err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
  1264. if (err < 0) {
  1265. debug("failed to set %s property for node %s: %d\n", prop_name,
  1266. node, err);
  1267. return err;
  1268. }
  1269. return 0;
  1270. }
  1271. int fdtdec_setup(void)
  1272. {
  1273. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1274. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1275. void *fdt_blob;
  1276. # endif
  1277. # ifdef CONFIG_OF_EMBED
  1278. /* Get a pointer to the FDT */
  1279. # ifdef CONFIG_SPL_BUILD
  1280. gd->fdt_blob = __dtb_dt_spl_begin;
  1281. # else
  1282. gd->fdt_blob = __dtb_dt_begin;
  1283. # endif
  1284. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1285. /* Allow the board to override the fdt address. */
  1286. gd->fdt_blob = board_fdt_blob_setup();
  1287. # elif defined(CONFIG_OF_HOSTFILE)
  1288. if (sandbox_read_fdt_from_file()) {
  1289. puts("Failed to read control FDT\n");
  1290. return -1;
  1291. }
  1292. # endif
  1293. # ifndef CONFIG_SPL_BUILD
  1294. /* Allow the early environment to override the fdt address */
  1295. # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
  1296. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1297. # else
  1298. gd->fdt_blob = map_sysmem
  1299. (env_get_ulong("fdtcontroladdr", 16,
  1300. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1301. # endif
  1302. # endif
  1303. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1304. /*
  1305. * Try and uncompress the blob.
  1306. * Unfortunately there is no way to know how big the input blob really
  1307. * is. So let us set the maximum input size arbitrarily high. 16MB
  1308. * ought to be more than enough for packed DTBs.
  1309. */
  1310. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1311. gd->fdt_blob = fdt_blob;
  1312. /*
  1313. * Check if blob is a FIT images containings DTBs.
  1314. * If so, pick the most relevant
  1315. */
  1316. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1317. if (fdt_blob) {
  1318. gd->multi_dtb_fit = gd->fdt_blob;
  1319. gd->fdt_blob = fdt_blob;
  1320. }
  1321. # endif
  1322. #endif
  1323. return fdtdec_prepare_fdt();
  1324. }
  1325. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1326. int fdtdec_resetup(int *rescan)
  1327. {
  1328. void *fdt_blob;
  1329. /*
  1330. * If the current DTB is part of a compressed FIT image,
  1331. * try to locate the best match from the uncompressed
  1332. * FIT image stillpresent there. Save the time and space
  1333. * required to uncompress it again.
  1334. */
  1335. if (gd->multi_dtb_fit) {
  1336. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1337. if (fdt_blob == gd->fdt_blob) {
  1338. /*
  1339. * The best match did not change. no need to tear down
  1340. * the DM and rescan the fdt.
  1341. */
  1342. *rescan = 0;
  1343. return 0;
  1344. }
  1345. *rescan = 1;
  1346. gd->fdt_blob = fdt_blob;
  1347. return fdtdec_prepare_fdt();
  1348. }
  1349. /*
  1350. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1351. * not a FIT image containings DTB, but a single DTB. There is no need
  1352. * to teard down DM and rescan the DT in this case.
  1353. */
  1354. *rescan = 0;
  1355. return 0;
  1356. }
  1357. #endif
  1358. #ifdef CONFIG_NR_DRAM_BANKS
  1359. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1360. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1361. {
  1362. int addr_cells, size_cells;
  1363. const u32 *cell, *end;
  1364. u64 total_size, size, addr;
  1365. int node, child;
  1366. bool auto_size;
  1367. int bank;
  1368. int len;
  1369. debug("%s: board_id=%d\n", __func__, board_id);
  1370. if (!area)
  1371. area = "/memory";
  1372. node = fdt_path_offset(blob, area);
  1373. if (node < 0) {
  1374. debug("No %s node found\n", area);
  1375. return -ENOENT;
  1376. }
  1377. cell = fdt_getprop(blob, node, "reg", &len);
  1378. if (!cell) {
  1379. debug("No reg property found\n");
  1380. return -ENOENT;
  1381. }
  1382. addr_cells = fdt_address_cells(blob, node);
  1383. size_cells = fdt_size_cells(blob, node);
  1384. /* Check the board id and mask */
  1385. for (child = fdt_first_subnode(blob, node);
  1386. child >= 0;
  1387. child = fdt_next_subnode(blob, child)) {
  1388. int match_mask, match_value;
  1389. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1390. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1391. if (match_value >= 0 &&
  1392. ((board_id & match_mask) == match_value)) {
  1393. /* Found matching mask */
  1394. debug("Found matching mask %d\n", match_mask);
  1395. node = child;
  1396. cell = fdt_getprop(blob, node, "reg", &len);
  1397. if (!cell) {
  1398. debug("No memory-banks property found\n");
  1399. return -EINVAL;
  1400. }
  1401. break;
  1402. }
  1403. }
  1404. /* Note: if no matching subnode was found we use the parent node */
  1405. if (bd) {
  1406. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1407. CONFIG_NR_DRAM_BANKS);
  1408. }
  1409. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1410. total_size = 0;
  1411. end = cell + len / 4 - addr_cells - size_cells;
  1412. debug("cell at %p, end %p\n", cell, end);
  1413. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1414. if (cell > end)
  1415. break;
  1416. addr = 0;
  1417. if (addr_cells == 2)
  1418. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1419. addr += fdt32_to_cpu(*cell++);
  1420. if (bd)
  1421. bd->bi_dram[bank].start = addr;
  1422. if (basep && !bank)
  1423. *basep = (phys_addr_t)addr;
  1424. size = 0;
  1425. if (size_cells == 2)
  1426. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1427. size += fdt32_to_cpu(*cell++);
  1428. if (auto_size) {
  1429. u64 new_size;
  1430. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1431. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1432. if (new_size == size) {
  1433. debug("OK\n");
  1434. } else {
  1435. debug("sized to %llx\n", new_size);
  1436. size = new_size;
  1437. }
  1438. }
  1439. if (bd)
  1440. bd->bi_dram[bank].size = size;
  1441. total_size += size;
  1442. }
  1443. debug("Memory size %llu\n", total_size);
  1444. if (sizep)
  1445. *sizep = (phys_size_t)total_size;
  1446. return 0;
  1447. }
  1448. #endif /* CONFIG_NR_DRAM_BANKS */
  1449. #endif /* !USE_HOSTCC */