am642_init.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * AM642: SoC specific initialization
  4. *
  5. * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
  6. * Keerthy <j-keerthy@ti.com>
  7. * Dave Gerlach <d-gerlach@ti.com>
  8. */
  9. #include <common.h>
  10. #include <spl.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/hardware.h>
  13. #include <asm/arch/sysfw-loader.h>
  14. #include <asm/arch/sys_proto.h>
  15. #include "common.h"
  16. #include <asm/arch/sys_proto.h>
  17. #include <linux/soc/ti/ti_sci_protocol.h>
  18. #include <dm.h>
  19. #include <dm/uclass-internal.h>
  20. #include <dm/pinctrl.h>
  21. #include <mmc.h>
  22. #include <dm/root.h>
  23. #if defined(CONFIG_SPL_BUILD)
  24. static void ctrl_mmr_unlock(void)
  25. {
  26. /* Unlock all PADCFG_MMR1 module registers */
  27. mmr_unlock(PADCFG_MMR1_BASE, 1);
  28. /* Unlock all CTRL_MMR0 module registers */
  29. mmr_unlock(CTRL_MMR0_BASE, 0);
  30. mmr_unlock(CTRL_MMR0_BASE, 1);
  31. mmr_unlock(CTRL_MMR0_BASE, 2);
  32. mmr_unlock(CTRL_MMR0_BASE, 3);
  33. mmr_unlock(CTRL_MMR0_BASE, 5);
  34. mmr_unlock(CTRL_MMR0_BASE, 6);
  35. }
  36. /*
  37. * This uninitialized global variable would normal end up in the .bss section,
  38. * but the .bss is cleared between writing and reading this variable, so move
  39. * it to the .data section.
  40. */
  41. u32 bootindex __section(".data");
  42. static struct rom_extended_boot_data bootdata __section(".data");
  43. static void store_boot_info_from_rom(void)
  44. {
  45. bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
  46. memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
  47. sizeof(struct rom_extended_boot_data));
  48. }
  49. #if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
  50. void k3_mmc_stop_clock(void)
  51. {
  52. if (spl_boot_device() == BOOT_DEVICE_MMC1) {
  53. struct mmc *mmc = find_mmc_device(0);
  54. if (!mmc)
  55. return;
  56. mmc->saved_clock = mmc->clock;
  57. mmc_set_clock(mmc, 0, true);
  58. }
  59. }
  60. void k3_mmc_restart_clock(void)
  61. {
  62. if (spl_boot_device() == BOOT_DEVICE_MMC1) {
  63. struct mmc *mmc = find_mmc_device(0);
  64. if (!mmc)
  65. return;
  66. mmc_set_clock(mmc, mmc->saved_clock, false);
  67. }
  68. }
  69. #else
  70. void k3_mmc_stop_clock(void) {}
  71. void k3_mmc_restart_clock(void) {}
  72. #endif
  73. #ifdef CONFIG_SPL_OF_LIST
  74. void do_dt_magic(void)
  75. {
  76. int ret, rescan;
  77. if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
  78. do_board_detect();
  79. /*
  80. * Board detection has been done.
  81. * Let us see if another dtb wouldn't be a better match
  82. * for our board
  83. */
  84. if (IS_ENABLED(CONFIG_CPU_V7R)) {
  85. ret = fdtdec_resetup(&rescan);
  86. if (!ret && rescan) {
  87. dm_uninit();
  88. dm_init_and_scan(true);
  89. }
  90. }
  91. }
  92. #endif
  93. void board_init_f(ulong dummy)
  94. {
  95. #if defined(CONFIG_K3_LOAD_SYSFW)
  96. struct udevice *dev;
  97. int ret;
  98. #endif
  99. #if defined(CONFIG_CPU_V7R)
  100. setup_k3_mpu_regions();
  101. #endif
  102. /*
  103. * Cannot delay this further as there is a chance that
  104. * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
  105. */
  106. store_boot_info_from_rom();
  107. ctrl_mmr_unlock();
  108. /* Init DM early */
  109. spl_early_init();
  110. preloader_console_init();
  111. do_dt_magic();
  112. #if defined(CONFIG_K3_LOAD_SYSFW)
  113. /*
  114. * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
  115. * regardless of the result of pinctrl. Do this without probing the
  116. * device, but instead by searching the device that would request the
  117. * given sequence number if probed. The UART will be used by the system
  118. * firmware (SYSFW) image for various purposes and SYSFW depends on us
  119. * to initialize its pin settings.
  120. */
  121. ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
  122. if (!ret)
  123. pinctrl_select_state(dev, "default");
  124. /*
  125. * Load, start up, and configure system controller firmware.
  126. * This will determine whether or not ROM has already loaded
  127. * system firmware and if so, will only perform needed config
  128. * and not attempt to load firmware again.
  129. */
  130. k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
  131. k3_mmc_restart_clock);
  132. #endif
  133. /* Output System Firmware version info */
  134. k3_sysfw_print_ver();
  135. #if defined(CONFIG_K3_AM64_DDRSS)
  136. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  137. if (ret)
  138. panic("DRAM init failed: %d\n", ret);
  139. #endif
  140. }
  141. u32 spl_boot_mode(const u32 boot_device)
  142. {
  143. switch (boot_device) {
  144. case BOOT_DEVICE_MMC1:
  145. return MMCSD_MODE_EMMCBOOT;
  146. case BOOT_DEVICE_MMC2:
  147. return MMCSD_MODE_FS;
  148. default:
  149. return MMCSD_MODE_RAW;
  150. }
  151. }
  152. static u32 __get_backup_bootmedia(u32 main_devstat)
  153. {
  154. u32 bkup_bootmode =
  155. (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
  156. MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
  157. u32 bkup_bootmode_cfg =
  158. (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
  159. MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
  160. switch (bkup_bootmode) {
  161. case BACKUP_BOOT_DEVICE_UART:
  162. return BOOT_DEVICE_UART;
  163. case BACKUP_BOOT_DEVICE_USB:
  164. return BOOT_DEVICE_USB;
  165. case BACKUP_BOOT_DEVICE_ETHERNET:
  166. return BOOT_DEVICE_ETHERNET;
  167. case BACKUP_BOOT_DEVICE_MMC:
  168. if (bkup_bootmode_cfg)
  169. return BOOT_DEVICE_MMC2;
  170. return BOOT_DEVICE_MMC1;
  171. case BACKUP_BOOT_DEVICE_SPI:
  172. return BOOT_DEVICE_SPI;
  173. case BACKUP_BOOT_DEVICE_I2C:
  174. return BOOT_DEVICE_I2C;
  175. };
  176. return BOOT_DEVICE_RAM;
  177. }
  178. static u32 __get_primary_bootmedia(u32 main_devstat)
  179. {
  180. u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
  181. MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
  182. u32 bootmode_cfg =
  183. (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
  184. MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
  185. switch (bootmode) {
  186. case BOOT_DEVICE_OSPI:
  187. fallthrough;
  188. case BOOT_DEVICE_QSPI:
  189. fallthrough;
  190. case BOOT_DEVICE_XSPI:
  191. fallthrough;
  192. case BOOT_DEVICE_SPI:
  193. return BOOT_DEVICE_SPI;
  194. case BOOT_DEVICE_ETHERNET_RGMII:
  195. fallthrough;
  196. case BOOT_DEVICE_ETHERNET_RMII:
  197. return BOOT_DEVICE_ETHERNET;
  198. case BOOT_DEVICE_EMMC:
  199. return BOOT_DEVICE_MMC1;
  200. case BOOT_DEVICE_MMC:
  201. if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
  202. MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
  203. return BOOT_DEVICE_MMC2;
  204. return BOOT_DEVICE_MMC1;
  205. case BOOT_DEVICE_NOBOOT:
  206. return BOOT_DEVICE_RAM;
  207. }
  208. return bootmode;
  209. }
  210. u32 spl_boot_device(void)
  211. {
  212. u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
  213. if (bootindex == K3_PRIMARY_BOOTMODE)
  214. return __get_primary_bootmedia(devstat);
  215. else
  216. return __get_backup_bootmedia(devstat);
  217. }
  218. #endif
  219. #if defined(CONFIG_SYS_K3_SPL_ATF)
  220. #define AM64X_DEV_RTI8 127
  221. #define AM64X_DEV_RTI9 128
  222. #define AM64X_DEV_R5FSS0_CORE0 121
  223. #define AM64X_DEV_R5FSS0_CORE1 122
  224. void release_resources_for_core_shutdown(void)
  225. {
  226. struct ti_sci_handle *ti_sci = get_ti_sci_handle();
  227. struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
  228. struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
  229. int ret;
  230. u32 i;
  231. const u32 put_device_ids[] = {
  232. AM64X_DEV_RTI9,
  233. AM64X_DEV_RTI8,
  234. };
  235. /* Iterate through list of devices to put (shutdown) */
  236. for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
  237. u32 id = put_device_ids[i];
  238. ret = dev_ops->put_device(ti_sci, id);
  239. if (ret)
  240. panic("Failed to put device %u (%d)\n", id, ret);
  241. }
  242. const u32 put_core_ids[] = {
  243. AM64X_DEV_R5FSS0_CORE1,
  244. AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
  245. };
  246. /* Iterate through list of cores to put (shutdown) */
  247. for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
  248. u32 id = put_core_ids[i];
  249. /*
  250. * Queue up the core shutdown request. Note that this call
  251. * needs to be followed up by an actual invocation of an WFE
  252. * or WFI CPU instruction.
  253. */
  254. ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
  255. if (ret)
  256. panic("Failed sending core %u shutdown message (%d)\n",
  257. id, ret);
  258. }
  259. }
  260. #endif