lpc.c 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016 Google, Inc
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <fdtdec.h>
  9. #include <pch.h>
  10. #include <pci.h>
  11. #include <asm/global_data.h>
  12. #include <asm/intel_regs.h>
  13. #include <asm/io.h>
  14. #include <asm/lpc_common.h>
  15. #include <linux/bitops.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. /* Enable Prefetching and Caching */
  18. static void enable_spi_prefetch(struct udevice *pch)
  19. {
  20. u8 reg8;
  21. dm_pci_read_config8(pch, 0xdc, &reg8);
  22. reg8 &= ~(3 << 2);
  23. reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
  24. dm_pci_write_config8(pch, 0xdc, reg8);
  25. }
  26. static void enable_port80_on_lpc(struct udevice *pch)
  27. {
  28. /* Enable port 80 POST on LPC */
  29. dm_pci_write_config32(pch, PCH_RCBA_BASE, RCB_BASE_ADDRESS | 1);
  30. clrbits_le32(RCB_REG(GCS), 4);
  31. }
  32. /**
  33. * lpc_early_init() - set up LPC serial ports and other early things
  34. *
  35. * @dev: LPC device
  36. * @return 0 if OK, -ve on error
  37. */
  38. int lpc_common_early_init(struct udevice *dev)
  39. {
  40. struct udevice *pch = dev->parent;
  41. struct reg_info {
  42. u32 base;
  43. u32 size;
  44. } values[4], *ptr;
  45. int count;
  46. int i;
  47. count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
  48. "intel,gen-dec", (u32 *)values,
  49. sizeof(values) / (sizeof(u32)));
  50. if (count < 0)
  51. return -EINVAL;
  52. /* Set COM1/COM2 decode range */
  53. dm_pci_write_config16(pch, LPC_IO_DEC, 0x0010);
  54. /* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */
  55. dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | MC_LPC_EN |
  56. GAMEL_LPC_EN | COMA_LPC_EN);
  57. /* Write all registers but use 0 if we run out of data */
  58. count = count * sizeof(u32) / sizeof(values[0]);
  59. for (i = 0, ptr = values; i < ARRAY_SIZE(values); i++, ptr++) {
  60. u32 reg = 0;
  61. if (i < count)
  62. reg = ptr->base | PCI_COMMAND_IO | (ptr->size << 16);
  63. dm_pci_write_config32(pch, LPC_GENX_DEC(i), reg);
  64. }
  65. enable_spi_prefetch(pch);
  66. /* This is already done in start.S, but let's do it in C */
  67. enable_port80_on_lpc(pch);
  68. return 0;
  69. }
  70. int lpc_set_spi_protect(struct udevice *dev, int bios_ctrl, bool protect)
  71. {
  72. uint8_t bios_cntl;
  73. /* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */
  74. dm_pci_read_config8(dev, bios_ctrl, &bios_cntl);
  75. if (protect) {
  76. bios_cntl &= ~BIOS_CTRL_BIOSWE;
  77. bios_cntl |= BIT(5);
  78. } else {
  79. bios_cntl |= BIOS_CTRL_BIOSWE;
  80. bios_cntl &= ~BIT(5);
  81. }
  82. dm_pci_write_config8(dev, bios_ctrl, bios_cntl);
  83. return 0;
  84. }